* [Qemu-devel] [PATCH 0/3] target/riscv: use tcg_lookup_and_goto_ptr
@ 2018-08-09 21:43 Emilio G. Cota
2018-08-09 21:43 ` [Qemu-devel] [PATCH 1/3] target/riscv: optimize cross-page direct jumps in softmmu Emilio G. Cota
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Emilio G. Cota @ 2018-08-09 21:43 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Michael Clark, Palmer Dabbelt,
Sagar Karandikar, Bastian Koppelmann
There are a few more places where the lookup could be inserted,
but I think these are the ones that will matter performance-wise.
Perf results in patch 3's log.
Regarding the benchmarks: I'd have used SPEC06 but I don't have
much time to get it to compile. Is there a guide on how to do so?
Ideally I'd like to use the fedora image, which works very well.
Thanks,
Emilio
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH 1/3] target/riscv: optimize cross-page direct jumps in softmmu
2018-08-09 21:43 [Qemu-devel] [PATCH 0/3] target/riscv: use tcg_lookup_and_goto_ptr Emilio G. Cota
@ 2018-08-09 21:43 ` Emilio G. Cota
2018-08-10 15:06 ` Richard Henderson
2018-08-09 21:43 ` [Qemu-devel] [PATCH 2/3] target/riscv: optimize indirect branches Emilio G. Cota
2018-08-09 21:43 ` [Qemu-devel] [PATCH 3/3] target/riscv: call tcg_lookup_and_goto_ptr on DISAS_TOO_MANY Emilio G. Cota
2 siblings, 1 reply; 7+ messages in thread
From: Emilio G. Cota @ 2018-08-09 21:43 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Michael Clark, Palmer Dabbelt,
Sagar Karandikar, Bastian Koppelmann
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 0b6be74f2d..ec2988b4f6 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -135,7 +135,7 @@ static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
if (ctx->base.singlestep_enabled) {
gen_exception_debug();
} else {
- tcg_gen_exit_tb(NULL, 0);
+ tcg_gen_lookup_and_goto_ptr();
}
}
}
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH 2/3] target/riscv: optimize indirect branches
2018-08-09 21:43 [Qemu-devel] [PATCH 0/3] target/riscv: use tcg_lookup_and_goto_ptr Emilio G. Cota
2018-08-09 21:43 ` [Qemu-devel] [PATCH 1/3] target/riscv: optimize cross-page direct jumps in softmmu Emilio G. Cota
@ 2018-08-09 21:43 ` Emilio G. Cota
2018-08-10 15:06 ` Richard Henderson
2018-08-09 21:43 ` [Qemu-devel] [PATCH 3/3] target/riscv: call tcg_lookup_and_goto_ptr on DISAS_TOO_MANY Emilio G. Cota
2 siblings, 1 reply; 7+ messages in thread
From: Emilio G. Cota @ 2018-08-09 21:43 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Michael Clark, Palmer Dabbelt,
Sagar Karandikar, Bastian Koppelmann
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index ec2988b4f6..66a80ca772 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -548,7 +548,7 @@ static void gen_jalr(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
if (rd != 0) {
tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn);
}
- tcg_gen_exit_tb(NULL, 0);
+ tcg_gen_lookup_and_goto_ptr();
if (misaligned) {
gen_set_label(misaligned);
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH 3/3] target/riscv: call tcg_lookup_and_goto_ptr on DISAS_TOO_MANY
2018-08-09 21:43 [Qemu-devel] [PATCH 0/3] target/riscv: use tcg_lookup_and_goto_ptr Emilio G. Cota
2018-08-09 21:43 ` [Qemu-devel] [PATCH 1/3] target/riscv: optimize cross-page direct jumps in softmmu Emilio G. Cota
2018-08-09 21:43 ` [Qemu-devel] [PATCH 2/3] target/riscv: optimize indirect branches Emilio G. Cota
@ 2018-08-09 21:43 ` Emilio G. Cota
2018-08-10 15:08 ` Richard Henderson
2 siblings, 1 reply; 7+ messages in thread
From: Emilio G. Cota @ 2018-08-09 21:43 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Michael Clark, Palmer Dabbelt,
Sagar Karandikar, Bastian Koppelmann
Performance impact of this and the previous commit, measured with
the very-easy-to-cross-compile rv8-bench:
https://github.com/rv8-io/rv8-bench
Host: Intel(R) Core(TM) i7-4790K CPU @ 4.00GHz
- Key:
before: master
after1,2,3: the 3 commits in this series (i.e. 3 is this commit)
- User-mode:
bench before after1 after2 after3 final speedup
---------------------------------------------------------
aes 1.12s 1.12s 1.10s 1.00s 1.12
bigint 0.78s 0.78s 0.78s 0.78s 1
dhrystone 0.96s 0.97s 0.49s 0.49s 1.9591837
miniz 1.94s 1.94s 1.88s 1.86s 1.0430108
norx 0.51s 0.51s 0.49s 0.48s 1.0625
primes 0.85s 0.85s 0.84s 0.84s 1.0119048
qsort 4.87s 4.88s 1.86s 1.86s 2.6182796
sha512 0.76s 0.77s 0.64s 0.64s 1.1875
(after1 only applies to softmmu, so no surprises here)
- Full-system (fedora):
bench before after1 after2 after3 final speedup
---------------------------------------------------------
aes 2.68s 2.54s 2.60s 2.34s 1.1452991
bigint 1.61s 1.56s 1.55s 1.64s 0.98170732
dhrystone 1.78s 1.67s 1.25s 1.24s 1.4354839
miniz 3.53s 3.35s 3.28s 3.35s 1.0537313
norx 1.13s 1.09s 1.07s 1.06s 1.0660377
primes 15.37s 15.41s 15.20s 15.37s 1
qsort 7.20s 6.71s 3.85s 3.96s 1.8181818
sha512 1.07s 1.04s 0.90s 0.90s 1.1888889
SoftMMU slows things down, so the numbers are less sensitive.
Cross-page jumps improve things a little bit, though.
Note that I'm not showing here averages, just results from a
single run, so with primes there isn't much to worry about.
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
target/riscv/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 66a80ca772..98e0311606 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -1872,7 +1872,7 @@ static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
if (ctx->base.singlestep_enabled) {
gen_exception_debug();
} else {
- tcg_gen_exit_tb(NULL, 0);
+ tcg_gen_lookup_and_goto_ptr();
}
break;
case DISAS_NORETURN:
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 1/3] target/riscv: optimize cross-page direct jumps in softmmu
2018-08-09 21:43 ` [Qemu-devel] [PATCH 1/3] target/riscv: optimize cross-page direct jumps in softmmu Emilio G. Cota
@ 2018-08-10 15:06 ` Richard Henderson
0 siblings, 0 replies; 7+ messages in thread
From: Richard Henderson @ 2018-08-10 15:06 UTC (permalink / raw)
To: Emilio G. Cota, qemu-devel
Cc: Michael Clark, Palmer Dabbelt, Sagar Karandikar, Bastian Koppelmann
On 08/09/2018 02:43 PM, Emilio G. Cota wrote:
> Signed-off-by: Emilio G. Cota <cota@braap.org>
> ---
> target/riscv/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 0b6be74f2d..ec2988b4f6 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -135,7 +135,7 @@ static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
> if (ctx->base.singlestep_enabled) {
> gen_exception_debug();
> } else {
> - tcg_gen_exit_tb(NULL, 0);
> + tcg_gen_lookup_and_goto_ptr();
> }
> }
> }
>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 2/3] target/riscv: optimize indirect branches
2018-08-09 21:43 ` [Qemu-devel] [PATCH 2/3] target/riscv: optimize indirect branches Emilio G. Cota
@ 2018-08-10 15:06 ` Richard Henderson
0 siblings, 0 replies; 7+ messages in thread
From: Richard Henderson @ 2018-08-10 15:06 UTC (permalink / raw)
To: Emilio G. Cota, qemu-devel
Cc: Michael Clark, Palmer Dabbelt, Sagar Karandikar, Bastian Koppelmann
On 08/09/2018 02:43 PM, Emilio G. Cota wrote:
> Signed-off-by: Emilio G. Cota <cota@braap.org>
> ---
> target/riscv/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index ec2988b4f6..66a80ca772 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -548,7 +548,7 @@ static void gen_jalr(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
> if (rd != 0) {
> tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn);
> }
> - tcg_gen_exit_tb(NULL, 0);
> + tcg_gen_lookup_and_goto_ptr();
>
> if (misaligned) {
> gen_set_label(misaligned);
>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 3/3] target/riscv: call tcg_lookup_and_goto_ptr on DISAS_TOO_MANY
2018-08-09 21:43 ` [Qemu-devel] [PATCH 3/3] target/riscv: call tcg_lookup_and_goto_ptr on DISAS_TOO_MANY Emilio G. Cota
@ 2018-08-10 15:08 ` Richard Henderson
0 siblings, 0 replies; 7+ messages in thread
From: Richard Henderson @ 2018-08-10 15:08 UTC (permalink / raw)
To: Emilio G. Cota, qemu-devel
Cc: Michael Clark, Palmer Dabbelt, Sagar Karandikar, Bastian Koppelmann
On 08/09/2018 02:43 PM, Emilio G. Cota wrote:
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index 66a80ca772..98e0311606 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -1872,7 +1872,7 @@ static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
> if (ctx->base.singlestep_enabled) {
> gen_exception_debug();
> } else {
> - tcg_gen_exit_tb(NULL, 0);
> + tcg_gen_lookup_and_goto_ptr();
> }
> break;
> case DISAS_NORETURN:
This could just as easily use
case DISAS_TOO_MANY:
gen_goto_tb(ctx, 0, ctx->base.pc_next);
r~
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2018-08-10 15:08 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2018-08-09 21:43 [Qemu-devel] [PATCH 0/3] target/riscv: use tcg_lookup_and_goto_ptr Emilio G. Cota
2018-08-09 21:43 ` [Qemu-devel] [PATCH 1/3] target/riscv: optimize cross-page direct jumps in softmmu Emilio G. Cota
2018-08-10 15:06 ` Richard Henderson
2018-08-09 21:43 ` [Qemu-devel] [PATCH 2/3] target/riscv: optimize indirect branches Emilio G. Cota
2018-08-10 15:06 ` Richard Henderson
2018-08-09 21:43 ` [Qemu-devel] [PATCH 3/3] target/riscv: call tcg_lookup_and_goto_ptr on DISAS_TOO_MANY Emilio G. Cota
2018-08-10 15:08 ` Richard Henderson
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