[PATCH 0/6] *** some fixings ***

[PATCH 0/6] *** some fixings ***

[Monk Liu]

*** some bug fixings for SRIOV case ***

Emily Deng (1):
  drm/amdgpu: Correct sdma_v4 get_wptr(v2)

Monk Liu (5):
  drm/amdgpu: don't use MM idle_work for SRIOV(v2)
  drm/amdgpu: block till late_init_work done in dev_fini
  drm/amdgpu: should call drm_helper with dc support
  drm/amdgpu: adjust timeout for ib_ring_tests(v2)
  drm/amdgpu: cleanup SA inti and fini(v2)

 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c     |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c     | 38 ++++++++++++++----
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h |  2 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c     | 62 ++++++------------------------
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c    | 12 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c    |  9 ++---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c     | 17 ++++----
 8 files changed, 64 insertions(+), 82 deletions(-)

-- 
2.7.4

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[PATCH 1/6] drm/amdgpu: don't use MM idle_work for SRIOV(v2)

[Monk Liu]

SRIOV doesn't give VF cg/pg feature so the MM's idle_work
is skipped for SR-IOV

v2:
remove superfluous changes
since idle_work is not scheduled for SR-IOV so the condition
check for SR-IOV inside idle_work also can be dropped

Change-Id: I6dd7ea48d23b0fee74ecb9e93b53bfe36b0e8164
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 12 ++++++------
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c |  9 ++++-----
 2 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 9cd5517..85dc7fc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -297,7 +297,8 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev)
 	if (adev->uvd.vcpu_bo == NULL)
 		return 0;
 
-	cancel_delayed_work_sync(&adev->uvd.idle_work);
+	if (!amdgpu_sriov_vf(adev))
+		cancel_delayed_work_sync(&adev->uvd.idle_work);
 
 	for (i = 0; i < adev->uvd.max_handles; ++i)
 		if (atomic_read(&adev->uvd.handles[i]))
@@ -1116,9 +1117,6 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
 		container_of(work, struct amdgpu_device, uvd.idle_work.work);
 	unsigned fences = amdgpu_fence_count_emitted(&adev->uvd.ring);
 
-	if (amdgpu_sriov_vf(adev))
-		return;
-
 	if (fences == 0) {
 		if (adev->pm.dpm_enabled) {
 			amdgpu_dpm_enable_uvd(adev, false);
@@ -1138,11 +1136,12 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
 void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring)
 {
 	struct amdgpu_device *adev = ring->adev;
-	bool set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work);
+	bool set_clocks;
 
 	if (amdgpu_sriov_vf(adev))
 		return;
 
+	set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work);
 	if (set_clocks) {
 		if (adev->pm.dpm_enabled) {
 			amdgpu_dpm_enable_uvd(adev, true);
@@ -1158,7 +1157,8 @@ void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring)
 
 void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring)
 {
-	schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
+	if (!amdgpu_sriov_vf(ring->adev))
+		schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
 }
 
 /**
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index d274ae5..a5239b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -241,7 +241,8 @@ int amdgpu_vce_suspend(struct amdgpu_device *adev)
 	if (i == AMDGPU_MAX_VCE_HANDLES)
 		return 0;
 
-	cancel_delayed_work_sync(&adev->vce.idle_work);
+	if (!amdgpu_sriov_vf(adev))
+		cancel_delayed_work_sync(&adev->vce.idle_work);
 	/* TODO: suspending running encoding sessions isn't supported */
 	return -EINVAL;
 }
@@ -300,9 +301,6 @@ static void amdgpu_vce_idle_work_handler(struct work_struct *work)
 		container_of(work, struct amdgpu_device, vce.idle_work.work);
 	unsigned i, count = 0;
 
-	if (amdgpu_sriov_vf(adev))
-		return;
-
 	for (i = 0; i < adev->vce.num_rings; i++)
 		count += amdgpu_fence_count_emitted(&adev->vce.ring[i]);
 
@@ -362,7 +360,8 @@ void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring)
  */
 void amdgpu_vce_ring_end_use(struct amdgpu_ring *ring)
 {
-	schedule_delayed_work(&ring->adev->vce.idle_work, VCE_IDLE_TIMEOUT);
+	if (!amdgpu_sriov_vf(ring->adev))
+		schedule_delayed_work(&ring->adev->vce.idle_work, VCE_IDLE_TIMEOUT);
 }
 
 /**
-- 
2.7.4

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[PATCH 2/6] drm/amdgpu: block till late_init_work done in dev_fini

[Monk Liu]

otherwise page fault hit in the work if driver
finished too quick

Change-Id: I4fd47ccd836441b1b3f426dec5d364d9df02e23d
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 75d1733..3251f81 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2089,7 +2089,9 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
 		adev->firmware.gpu_info_fw = NULL;
 	}
 	adev->accel_working = false;
-	cancel_delayed_work_sync(&adev->late_init_work);
+
+	while (cancel_delayed_work_sync(&adev->late_init_work))
+		msleep(1);
 	/* free i2c buses */
 	if (!amdgpu_device_has_dc_support(adev))
 		amdgpu_i2c_fini(adev);
-- 
2.7.4

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[PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

[Monk Liu]

otherwise DRM keep reporting complain on ATOMIC flags
during kmd reloading

Change-Id: I835b96e6d61c7995bbd5dd5478d056671dde9192
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 1206301..2218416 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -345,7 +345,7 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev)
 	drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
 
 	/* disable all the possible outputs/crtcs before entering KMS mode */
-	if (!amdgpu_device_has_dc_support(adev))
+	if (amdgpu_device_has_dc_support(adev))
 		drm_helper_disable_unused_functions(adev->ddev);
 
 	drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
-- 
2.7.4

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[PATCH 4/6] drm/amdgpu: adjust timeout for ib_ring_tests(v2)

[Monk Liu]

issue:
sometime GFX/MM ib test hit timeout under SRIOV env, root cause
is that engine doesn't come back soon enough so the current
IB test considered as timed out.

fix:
for SRIOV GFX IB test wait time need to be expanded a lot during
SRIOV runtimei mode since it couldn't really begin before GFX engine
come back.

for SRIOV MM IB test it always need more time since MM scheduling
is not go together with GFX engine, it is controled by h/w MM
scheduler so no matter runtime or exclusive mode MM IB test
always need more time.

v2:
use ring type instead of idx to judge

Change-Id: I0342371bc073656476ad850e1f5d9a021846dc8c
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 7f2c314..d66171f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -322,14 +322,44 @@ int amdgpu_ib_ring_tests(struct amdgpu_device *adev)
 {
 	unsigned i;
 	int r, ret = 0;
+	long tmo_gfx, tmo_mm;
+
+	tmo_mm = tmo_gfx = AMDGPU_IB_TEST_TIMEOUT;
+	if (amdgpu_sriov_vf(adev)) {
+		/* for MM engines in hypervisor side they are not scheduled together
+		 * with CP and SDMA engines, so even in exclusive mode MM engine could
+		 * still running on other VF thus the IB TEST TIMEOUT for MM engines
+		 * under SR-IOV should be set to a long time.
+		 */
+		tmo_mm = 8 * AMDGPU_IB_TEST_TIMEOUT; /* 8 sec should be enough for the MM comes back to this VF */
+	}
+
+	if (amdgpu_sriov_runtime(adev)) {
+		/* for CP & SDMA engines since they are scheduled together so
+		 * need to make the timeout width enough to cover the time
+		 * cost waiting for it coming back under RUNTIME only
+		*/
+		tmo_gfx = 8 * AMDGPU_IB_TEST_TIMEOUT;
+	}
 
 	for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
 		struct amdgpu_ring *ring = adev->rings[i];
+		long tmo;
 
 		if (!ring || !ring->ready)
 			continue;
 
-		r = amdgpu_ring_test_ib(ring, AMDGPU_IB_TEST_TIMEOUT);
+		/* MM engine need more time */
+		if (ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
+			ring->funcs->type == AMDGPU_RING_TYPE_VCE ||
+			ring->funcs->type == AMDGPU_RING_TYPE_UVD_ENC ||
+			ring->funcs->type == AMDGPU_RING_TYPE_VCN_DEC ||
+			ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC)
+			tmo = tmo_mm;
+		else
+			tmo = tmo_gfx;
+
+		r = amdgpu_ring_test_ib(ring, tmo);
 		if (r) {
 			ring->ready = false;
 
-- 
2.7.4

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[PATCH 5/6] drm/amdgpu: Correct sdma_v4 get_wptr(v2)

[Monk Liu]

From: Emily Deng <Emily.Deng@amd.com>

the original method will change the wptr value in wb.
v2:
furthur cleanup

Change-Id: I984fabca35d9dcf1f5fa8ef7779b2afb7f7d7370
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 3d5385d..04e9cb0 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -238,15 +238,14 @@ static uint64_t sdma_v4_0_ring_get_rptr(struct amdgpu_ring *ring)
 static uint64_t sdma_v4_0_ring_get_wptr(struct amdgpu_ring *ring)
 {
 	struct amdgpu_device *adev = ring->adev;
-	u64 *wptr = NULL;
+	u64 wptr;
 	uint64_t local_wptr = 0;
+	u64 tmp = 0;
 
 	if (ring->use_doorbell) {
 		/* XXX check if swapping is necessary on BE */
-		wptr = ((u64 *)&adev->wb.wb[ring->wptr_offs]);
-		DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", *wptr);
-		*wptr = (*wptr) >> 2;
-		DRM_DEBUG("wptr/doorbell after shift == 0x%016llx\n", *wptr);
+		wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs]));
+		DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
 	} else {
 		u32 lowbit, highbit;
 		int me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1;
@@ -257,12 +256,12 @@ static uint64_t sdma_v4_0_ring_get_wptr(struct amdgpu_ring *ring)
 
 		DRM_DEBUG("wptr [%i]high== 0x%08x low==0x%08x\n",
 				me, highbit, lowbit);
-		*wptr = highbit;
-		*wptr = (*wptr) << 32;
-		*wptr |= lowbit;
+		wptr = highbit;
+		wptr = wptr << 32;
+		wptr |= lowbit;
 	}
 
-	return *wptr;
+	return wptr >> 2;
 }
 
 /**
-- 
2.7.4

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[PATCH 6/6] drm/amdgpu: cleanup SA inti and fini(v2)

[Monk Liu]

should use bo_create_kernel instead of split to two
function that create and pin the SA bo

issue:
before this patch, there are DMAR read error in host
side when running SRIOV test, the DMAR address dropped
in the range of SA bo.

fix:
after this cleanups of SA init and fini, above DMAR
eror gone.

v2:
keep sa_bo's fini instead of suspend, to keep
reporting error

Change-Id: I3f299a3342bd7263776bff69e4b31b0d3816749a
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c     |  6 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.h |  2 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c     | 62 ++++++------------------------
 3 files changed, 11 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index d66171f..5a1c678 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -279,11 +279,6 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev)
 		return r;
 	}
 
-	r = amdgpu_sa_bo_manager_start(adev, &adev->ring_tmp_bo);
-	if (r) {
-		return r;
-	}
-
 	adev->ib_pool_ready = true;
 	if (amdgpu_debugfs_sa_init(adev)) {
 		dev_err(adev->dev, "failed to register debugfs file for SA\n");
@@ -302,7 +297,6 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev)
 void amdgpu_ib_pool_fini(struct amdgpu_device *adev)
 {
 	if (adev->ib_pool_ready) {
-		amdgpu_sa_bo_manager_suspend(adev, &adev->ring_tmp_bo);
 		amdgpu_sa_bo_manager_fini(adev, &adev->ring_tmp_bo);
 		adev->ib_pool_ready = false;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index c2b02f5..1cef944 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -281,8 +281,6 @@ void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
 				      struct amdgpu_sa_manager *sa_manager);
 int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
 				      struct amdgpu_sa_manager *sa_manager);
-int amdgpu_sa_bo_manager_suspend(struct amdgpu_device *adev,
-					struct amdgpu_sa_manager *sa_manager);
 int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
 		     struct amdgpu_sa_bo **sa_bo,
 		     unsigned size, unsigned align);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index 5ca75a4..fb1667b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
@@ -63,21 +63,27 @@ int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
 	for (i = 0; i < AMDGPU_SA_NUM_FENCE_LISTS; ++i)
 		INIT_LIST_HEAD(&sa_manager->flist[i]);
 
-	r = amdgpu_bo_create(adev, size, align, true, domain,
-			     0, NULL, NULL, &sa_manager->bo);
+	r = amdgpu_bo_create_kernel(adev, size, align, domain, &sa_manager->bo,
+				&sa_manager->gpu_addr, &sa_manager->cpu_ptr);
 	if (r) {
 		dev_err(adev->dev, "(%d) failed to allocate bo for manager\n", r);
 		return r;
 	}
 
+	memset(sa_manager->cpu_ptr, 0, sa_manager->size);
 	return r;
 }
 
 void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
-			       struct amdgpu_sa_manager *sa_manager)
+                              struct amdgpu_sa_manager *sa_manager)
 {
 	struct amdgpu_sa_bo *sa_bo, *tmp;
 
+	if (sa_manager->bo == NULL) {
+		dev_err(adev->dev, "no bo for sa manager\n");
+		return;
+	}
+
 	if (!list_empty(&sa_manager->olist)) {
 		sa_manager->hole = &sa_manager->olist,
 		amdgpu_sa_bo_try_free(sa_manager);
@@ -88,55 +94,9 @@ void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
 	list_for_each_entry_safe(sa_bo, tmp, &sa_manager->olist, olist) {
 		amdgpu_sa_bo_remove_locked(sa_bo);
 	}
-	amdgpu_bo_unref(&sa_manager->bo);
-	sa_manager->size = 0;
-}
-
-int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
-			       struct amdgpu_sa_manager *sa_manager)
-{
-	int r;
-
-	if (sa_manager->bo == NULL) {
-		dev_err(adev->dev, "no bo for sa manager\n");
-		return -EINVAL;
-	}
 
-	/* map the buffer */
-	r = amdgpu_bo_reserve(sa_manager->bo, false);
-	if (r) {
-		dev_err(adev->dev, "(%d) failed to reserve manager bo\n", r);
-		return r;
-	}
-	r = amdgpu_bo_pin(sa_manager->bo, sa_manager->domain, &sa_manager->gpu_addr);
-	if (r) {
-		amdgpu_bo_unreserve(sa_manager->bo);
-		dev_err(adev->dev, "(%d) failed to pin manager bo\n", r);
-		return r;
-	}
-	r = amdgpu_bo_kmap(sa_manager->bo, &sa_manager->cpu_ptr);
-	memset(sa_manager->cpu_ptr, 0, sa_manager->size);
-	amdgpu_bo_unreserve(sa_manager->bo);
-	return r;
-}
-
-int amdgpu_sa_bo_manager_suspend(struct amdgpu_device *adev,
-				 struct amdgpu_sa_manager *sa_manager)
-{
-	int r;
-
-	if (sa_manager->bo == NULL) {
-		dev_err(adev->dev, "no bo for sa manager\n");
-		return -EINVAL;
-	}
-
-	r = amdgpu_bo_reserve(sa_manager->bo, true);
-	if (!r) {
-		amdgpu_bo_kunmap(sa_manager->bo);
-		amdgpu_bo_unpin(sa_manager->bo);
-		amdgpu_bo_unreserve(sa_manager->bo);
-	}
-	return r;
+	amdgpu_bo_free_kernel(&sa_manager->bo, &sa_manager->gpu_addr, &sa_manager->cpu_ptr);
+	sa_manager->size = 0;
 }
 
 static void amdgpu_sa_bo_remove_locked(struct amdgpu_sa_bo *sa_bo)
-- 
2.7.4

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Re: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

[Michel Dänzer]

On 2018-02-27 09:47 AM, Monk Liu wrote:
> otherwise DRM keep reporting complain on ATOMIC flags
> during kmd reloading
> 
> Change-Id: I835b96e6d61c7995bbd5dd5478d056671dde9192
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> index 1206301..2218416 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> @@ -345,7 +345,7 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev)
>  	drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
>  
>  	/* disable all the possible outputs/crtcs before entering KMS mode */
> -	if (!amdgpu_device_has_dc_support(adev))
> +	if (amdgpu_device_has_dc_support(adev))
>  		drm_helper_disable_unused_functions(adev->ddev);

This function definitely needs to be called without DC. *If* it also
needs to be called with DC (I'll leave that to the DC developers to
judge), just remove the conditional.


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RE: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

[Liu, Monk]

I'm not familiar with DC stuffs, I found without this patch DRM always reporting error like this:


[   89.783235] [drm] Found UVD firmware Version: 1.87 Family ID: 17
[   89.783285] [drm] PSP loading UVD firmware
[   89.784657] [drm] MM table gpu addr = 0xcfc000, cpu addr = 000000005ec858a9.
[   89.784883] [drm] Found VCE firmware Version: 53.45 Binary ID: 4
[   89.784936] [drm] PSP loading VCE firmware
[   89.928790] [drm] UVD and UVD ENC initialized successfully.
[   89.928972] [drm] VCE initialized successfully.
[   89.936514] [drm:drm_helper_disable_unused_functions [drm_kms_helper]] *ERROR* Called for atomic driver, this is not what you want.
[   89.958458] [drm] fb mappable at 0xE1200000
[   89.958460] [drm] vram apper at 0xE0000000
[   89.958461] [drm] size 9216000
[   89.958462] [drm] fb depth is 24
[   89.958463] [drm]    pitch is 7680




-----Original Message-----
From: Michel Dänzer [mailto:michel@daenzer.net] 
Sent: 2018年2月27日 17:17
To: Liu, Monk <Monk.Liu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

On 2018-02-27 09:47 AM, Monk Liu wrote:
> otherwise DRM keep reporting complain on ATOMIC flags during kmd 
> reloading
> 
> Change-Id: I835b96e6d61c7995bbd5dd5478d056671dde9192
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> index 1206301..2218416 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> @@ -345,7 +345,7 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev)
>  	drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
>  
>  	/* disable all the possible outputs/crtcs before entering KMS mode */
> -	if (!amdgpu_device_has_dc_support(adev))
> +	if (amdgpu_device_has_dc_support(adev))
>  		drm_helper_disable_unused_functions(adev->ddev);

This function definitely needs to be called without DC. *If* it also needs to be called with DC (I'll leave that to the DC developers to judge), just remove the conditional.


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RE: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

[Liu, Monk]

Okay, I think maybe the problem is sr-iov related, I'll prepare another one



-----Original Message-----
From: Liu, Monk 
Sent: 2018年2月27日 17:27
To: 'Michel Dänzer' <michel@daenzer.net>
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

I'm not familiar with DC stuffs, I found without this patch DRM always reporting error like this:


[   89.783235] [drm] Found UVD firmware Version: 1.87 Family ID: 17
[   89.783285] [drm] PSP loading UVD firmware
[   89.784657] [drm] MM table gpu addr = 0xcfc000, cpu addr = 000000005ec858a9.
[   89.784883] [drm] Found VCE firmware Version: 53.45 Binary ID: 4
[   89.784936] [drm] PSP loading VCE firmware
[   89.928790] [drm] UVD and UVD ENC initialized successfully.
[   89.928972] [drm] VCE initialized successfully.
[   89.936514] [drm:drm_helper_disable_unused_functions [drm_kms_helper]] *ERROR* Called for atomic driver, this is not what you want.
[   89.958458] [drm] fb mappable at 0xE1200000
[   89.958460] [drm] vram apper at 0xE0000000
[   89.958461] [drm] size 9216000
[   89.958462] [drm] fb depth is 24
[   89.958463] [drm]    pitch is 7680




-----Original Message-----
From: Michel Dänzer [mailto:michel@daenzer.net]
Sent: 2018年2月27日 17:17
To: Liu, Monk <Monk.Liu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

On 2018-02-27 09:47 AM, Monk Liu wrote:
> otherwise DRM keep reporting complain on ATOMIC flags during kmd 
> reloading
> 
> Change-Id: I835b96e6d61c7995bbd5dd5478d056671dde9192
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> index 1206301..2218416 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> @@ -345,7 +345,7 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev)
>  	drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
>  
>  	/* disable all the possible outputs/crtcs before entering KMS mode */
> -	if (!amdgpu_device_has_dc_support(adev))
> +	if (amdgpu_device_has_dc_support(adev))
>  		drm_helper_disable_unused_functions(adev->ddev);

This function definitely needs to be called without DC. *If* it also needs to be called with DC (I'll leave that to the DC developers to judge), just remove the conditional.


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Re: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

[Michel Dänzer]

On 2018-02-27 10:26 AM, Liu, Monk wrote:
> I'm not familiar with DC stuffs, I found without this patch DRM always reporting error like this:

[...]

> [   89.936514] [drm:drm_helper_disable_unused_functions [drm_kms_helper]] *ERROR* Called for atomic driver, this is not what you want.

"atomic driver" means DC is enabled, in which case
drm_helper_disable_unused_functions shouldn't have been called.

Maybe the issue is that DRIVER_ATOMIC is a driver flag, whereas DC can
be enabled or not per device. See the discussion on
https://patchwork.freedesktop.org/patch/200304/ .

Meanwhile, NAK for this patch.


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RE: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

[Liu, Monk]

The cause is found:
In amdgpu_pci_probe(), we set support_atomic to true no matter sriov or BM, because "adev" is not created yet so cannot judge SRIOV or not that time ...
But in amdgpu_fbdev_init(), we check if need to call that disable_unused_function() by amdgpu_device_has_dc_support() which would return false 
For SRIOV case,

That way we have two result checking DC support in amdgpu_pci_probe() and amdgpu_fbdev_init(), and lead to this error reporting.

-----Original Message-----
From: Michel Dänzer [mailto:michel@daenzer.net] 
Sent: 2018年2月27日 17:38
To: Liu, Monk <Monk.Liu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/6] drm/amdgpu: should call drm_helper with dc support

On 2018-02-27 10:26 AM, Liu, Monk wrote:
> I'm not familiar with DC stuffs, I found without this patch DRM always reporting error like this:

[...]

> [   89.936514] [drm:drm_helper_disable_unused_functions [drm_kms_helper]] *ERROR* Called for atomic driver, this is not what you want.

"atomic driver" means DC is enabled, in which case drm_helper_disable_unused_functions shouldn't have been called.

Maybe the issue is that DRIVER_ATOMIC is a driver flag, whereas DC can be enabled or not per device. See the discussion on https://patchwork.freedesktop.org/patch/200304/ .

Meanwhile, NAK for this patch.


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Re: [PATCH 1/6] drm/amdgpu: don't use MM idle_work for SRIOV(v2)

[Christian König]

Am 27.02.2018 um 09:47 schrieb Monk Liu:
> SRIOV doesn't give VF cg/pg feature so the MM's idle_work
> is skipped for SR-IOV
>
> v2:
> remove superfluous changes
> since idle_work is not scheduled for SR-IOV so the condition
> check for SR-IOV inside idle_work also can be dropped
>
> Change-Id: I6dd7ea48d23b0fee74ecb9e93b53bfe36b0e8164
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 12 ++++++------
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c |  9 ++++-----
>   2 files changed, 10 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> index 9cd5517..85dc7fc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> @@ -297,7 +297,8 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev)
>   	if (adev->uvd.vcpu_bo == NULL)
>   		return 0;
>   
> -	cancel_delayed_work_sync(&adev->uvd.idle_work);
> +	if (!amdgpu_sriov_vf(adev))
> +		cancel_delayed_work_sync(&adev->uvd.idle_work);

Drop that, canceling a work item which was never scheduled is harmless 
and the code isn't performance critical.

>   
>   	for (i = 0; i < adev->uvd.max_handles; ++i)
>   		if (atomic_read(&adev->uvd.handles[i]))
> @@ -1116,9 +1117,6 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
>   		container_of(work, struct amdgpu_device, uvd.idle_work.work);
>   	unsigned fences = amdgpu_fence_count_emitted(&adev->uvd.ring);
>   
> -	if (amdgpu_sriov_vf(adev))
> -		return;
> -
>   	if (fences == 0) {
>   		if (adev->pm.dpm_enabled) {
>   			amdgpu_dpm_enable_uvd(adev, false);
> @@ -1138,11 +1136,12 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
>   void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring)
>   {
>   	struct amdgpu_device *adev = ring->adev;
> -	bool set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work);
> +	bool set_clocks;
>   
>   	if (amdgpu_sriov_vf(adev))
>   		return;
>   
> +	set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work);
>   	if (set_clocks) {
>   		if (adev->pm.dpm_enabled) {
>   			amdgpu_dpm_enable_uvd(adev, true);
> @@ -1158,7 +1157,8 @@ void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring)
>   
>   void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring)
>   {
> -	schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
> +	if (!amdgpu_sriov_vf(ring->adev))
> +		schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
>   }
>   
>   /**
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> index d274ae5..a5239b8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> @@ -241,7 +241,8 @@ int amdgpu_vce_suspend(struct amdgpu_device *adev)
>   	if (i == AMDGPU_MAX_VCE_HANDLES)
>   		return 0;
>   
> -	cancel_delayed_work_sync(&adev->vce.idle_work);
> +	if (!amdgpu_sriov_vf(adev))
> +		cancel_delayed_work_sync(&adev->vce.idle_work);

Dito.

Apart from that the patch looks good to me,
Christian.

>   	/* TODO: suspending running encoding sessions isn't supported */
>   	return -EINVAL;
>   }
> @@ -300,9 +301,6 @@ static void amdgpu_vce_idle_work_handler(struct work_struct *work)
>   		container_of(work, struct amdgpu_device, vce.idle_work.work);
>   	unsigned i, count = 0;
>   
> -	if (amdgpu_sriov_vf(adev))
> -		return;
> -
>   	for (i = 0; i < adev->vce.num_rings; i++)
>   		count += amdgpu_fence_count_emitted(&adev->vce.ring[i]);
>   
> @@ -362,7 +360,8 @@ void amdgpu_vce_ring_begin_use(struct amdgpu_ring *ring)
>    */
>   void amdgpu_vce_ring_end_use(struct amdgpu_ring *ring)
>   {
> -	schedule_delayed_work(&ring->adev->vce.idle_work, VCE_IDLE_TIMEOUT);
> +	if (!amdgpu_sriov_vf(ring->adev))
> +		schedule_delayed_work(&ring->adev->vce.idle_work, VCE_IDLE_TIMEOUT);
>   }
>   
>   /**

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Re: [PATCH 4/6] drm/amdgpu: adjust timeout for ib_ring_tests(v2)

[Christian König]

Am 27.02.2018 um 09:47 schrieb Monk Liu:
> issue:
> sometime GFX/MM ib test hit timeout under SRIOV env, root cause
> is that engine doesn't come back soon enough so the current
> IB test considered as timed out.
>
> fix:
> for SRIOV GFX IB test wait time need to be expanded a lot during
> SRIOV runtimei mode since it couldn't really begin before GFX engine
> come back.
>
> for SRIOV MM IB test it always need more time since MM scheduling
> is not go together with GFX engine, it is controled by h/w MM
> scheduler so no matter runtime or exclusive mode MM IB test
> always need more time.
>
> v2:
> use ring type instead of idx to judge
>
> Change-Id: I0342371bc073656476ad850e1f5d9a021846dc8c
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 32 +++++++++++++++++++++++++++++++-
>   1 file changed, 31 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 7f2c314..d66171f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -322,14 +322,44 @@ int amdgpu_ib_ring_tests(struct amdgpu_device *adev)
>   {
>   	unsigned i;
>   	int r, ret = 0;
> +	long tmo_gfx, tmo_mm;
> +
> +	tmo_mm = tmo_gfx = AMDGPU_IB_TEST_TIMEOUT;
> +	if (amdgpu_sriov_vf(adev)) {
> +		/* for MM engines in hypervisor side they are not scheduled together
> +		 * with CP and SDMA engines, so even in exclusive mode MM engine could
> +		 * still running on other VF thus the IB TEST TIMEOUT for MM engines
> +		 * under SR-IOV should be set to a long time.
> +		 */
> +		tmo_mm = 8 * AMDGPU_IB_TEST_TIMEOUT; /* 8 sec should be enough for the MM comes back to this VF */

Why not adding the "8 sec should be enough for the MM comes back to this 
VF" to the comment above?

Apart from that the patch is Reviewed-by: Christian König 
<christian.koenig@amd.com>

Regards,
Christian.

> +	}
> +
> +	if (amdgpu_sriov_runtime(adev)) {
> +		/* for CP & SDMA engines since they are scheduled together so
> +		 * need to make the timeout width enough to cover the time
> +		 * cost waiting for it coming back under RUNTIME only
> +		*/
> +		tmo_gfx = 8 * AMDGPU_IB_TEST_TIMEOUT;
> +	}
>   
>   	for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
>   		struct amdgpu_ring *ring = adev->rings[i];
> +		long tmo;
>   
>   		if (!ring || !ring->ready)
>   			continue;
>   
> -		r = amdgpu_ring_test_ib(ring, AMDGPU_IB_TEST_TIMEOUT);
> +		/* MM engine need more time */
> +		if (ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
> +			ring->funcs->type == AMDGPU_RING_TYPE_VCE ||
> +			ring->funcs->type == AMDGPU_RING_TYPE_UVD_ENC ||
> +			ring->funcs->type == AMDGPU_RING_TYPE_VCN_DEC ||
> +			ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC)
> +			tmo = tmo_mm;
> +		else
> +			tmo = tmo_gfx;
> +
> +		r = amdgpu_ring_test_ib(ring, tmo);
>   		if (r) {
>   			ring->ready = false;
>   

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Re: [PATCH 5/6] drm/amdgpu: Correct sdma_v4 get_wptr(v2)

[Christian König]

Am 27.02.2018 um 09:47 schrieb Monk Liu:
> From: Emily Deng <Emily.Deng@amd.com>
>
> the original method will change the wptr value in wb.
> v2:
> furthur cleanup
>
> Change-Id: I984fabca35d9dcf1f5fa8ef7779b2afb7f7d7370
> Signed-off-by: Emily Deng <Emily.Deng@amd.com>
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 17 ++++++++---------
>   1 file changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 3d5385d..04e9cb0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -238,15 +238,14 @@ static uint64_t sdma_v4_0_ring_get_rptr(struct amdgpu_ring *ring)
>   static uint64_t sdma_v4_0_ring_get_wptr(struct amdgpu_ring *ring)
>   {
>   	struct amdgpu_device *adev = ring->adev;
> -	u64 *wptr = NULL;
> +	u64 wptr;
>   	uint64_t local_wptr = 0;
> +	u64 tmp = 0;

As far as I can see local_wptr and tmp are now unused and can be dropped 
as well.

With that fixed the patch is Reviewed-by: Christian König 
<christian.koenig@amd.com>

Regards,
Christian.

>   
>   	if (ring->use_doorbell) {
>   		/* XXX check if swapping is necessary on BE */
> -		wptr = ((u64 *)&adev->wb.wb[ring->wptr_offs]);
> -		DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", *wptr);
> -		*wptr = (*wptr) >> 2;
> -		DRM_DEBUG("wptr/doorbell after shift == 0x%016llx\n", *wptr);
> +		wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs]));
> +		DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
>   	} else {
>   		u32 lowbit, highbit;
>   		int me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1;
> @@ -257,12 +256,12 @@ static uint64_t sdma_v4_0_ring_get_wptr(struct amdgpu_ring *ring)
>   
>   		DRM_DEBUG("wptr [%i]high== 0x%08x low==0x%08x\n",
>   				me, highbit, lowbit);
> -		*wptr = highbit;
> -		*wptr = (*wptr) << 32;
> -		*wptr |= lowbit;
> +		wptr = highbit;
> +		wptr = wptr << 32;
> +		wptr |= lowbit;
>   	}
>   
> -	return *wptr;
> +	return wptr >> 2;
>   }
>   
>   /**

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Re: [PATCH 6/6] drm/amdgpu: cleanup SA inti and fini(v2)

[Christian König]

Am 27.02.2018 um 09:47 schrieb Monk Liu:
> should use bo_create_kernel instead of split to two
> function that create and pin the SA bo
>
> issue:
> before this patch, there are DMAR read error in host
> side when running SRIOV test, the DMAR address dropped
> in the range of SA bo.
>
> fix:
> after this cleanups of SA init and fini, above DMAR
> eror gone.
>
> v2:
> keep sa_bo's fini instead of suspend, to keep
> reporting error
>
> Change-Id: I3f299a3342bd7263776bff69e4b31b0d3816749a
> Signed-off-by: Monk Liu <Monk.Liu@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c     |  6 ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.h |  2 -
>   drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c     | 62 ++++++------------------------
>   3 files changed, 11 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index d66171f..5a1c678 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -279,11 +279,6 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev)
>   		return r;
>   	}
>   
> -	r = amdgpu_sa_bo_manager_start(adev, &adev->ring_tmp_bo);
> -	if (r) {
> -		return r;
> -	}
> -
>   	adev->ib_pool_ready = true;
>   	if (amdgpu_debugfs_sa_init(adev)) {
>   		dev_err(adev->dev, "failed to register debugfs file for SA\n");
> @@ -302,7 +297,6 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev)
>   void amdgpu_ib_pool_fini(struct amdgpu_device *adev)
>   {
>   	if (adev->ib_pool_ready) {
> -		amdgpu_sa_bo_manager_suspend(adev, &adev->ring_tmp_bo);
>   		amdgpu_sa_bo_manager_fini(adev, &adev->ring_tmp_bo);
>   		adev->ib_pool_ready = false;
>   	}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index c2b02f5..1cef944 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -281,8 +281,6 @@ void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
>   				      struct amdgpu_sa_manager *sa_manager);
>   int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
>   				      struct amdgpu_sa_manager *sa_manager);
> -int amdgpu_sa_bo_manager_suspend(struct amdgpu_device *adev,
> -					struct amdgpu_sa_manager *sa_manager);
>   int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
>   		     struct amdgpu_sa_bo **sa_bo,
>   		     unsigned size, unsigned align);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
> index 5ca75a4..fb1667b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
> @@ -63,21 +63,27 @@ int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
>   	for (i = 0; i < AMDGPU_SA_NUM_FENCE_LISTS; ++i)
>   		INIT_LIST_HEAD(&sa_manager->flist[i]);
>   
> -	r = amdgpu_bo_create(adev, size, align, true, domain,
> -			     0, NULL, NULL, &sa_manager->bo);
> +	r = amdgpu_bo_create_kernel(adev, size, align, domain, &sa_manager->bo,
> +				&sa_manager->gpu_addr, &sa_manager->cpu_ptr);
>   	if (r) {
>   		dev_err(adev->dev, "(%d) failed to allocate bo for manager\n", r);
>   		return r;
>   	}
>   
> +	memset(sa_manager->cpu_ptr, 0, sa_manager->size);
>   	return r;
>   }
>   
>   void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
> -			       struct amdgpu_sa_manager *sa_manager)
> +                              struct amdgpu_sa_manager *sa_manager)
>   {
>   	struct amdgpu_sa_bo *sa_bo, *tmp;
>   
> +	if (sa_manager->bo == NULL) {
> +		dev_err(adev->dev, "no bo for sa manager\n");
> +		return;
> +	}
> +
>   	if (!list_empty(&sa_manager->olist)) {
>   		sa_manager->hole = &sa_manager->olist,
>   		amdgpu_sa_bo_try_free(sa_manager);
> @@ -88,55 +94,9 @@ void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
>   	list_for_each_entry_safe(sa_bo, tmp, &sa_manager->olist, olist) {
>   		amdgpu_sa_bo_remove_locked(sa_bo);
>   	}
> -	amdgpu_bo_unref(&sa_manager->bo);
> -	sa_manager->size = 0;
> -}
> -
> -int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
> -			       struct amdgpu_sa_manager *sa_manager)
> -{
> -	int r;
> -
> -	if (sa_manager->bo == NULL) {
> -		dev_err(adev->dev, "no bo for sa manager\n");
> -		return -EINVAL;
> -	}
>   
> -	/* map the buffer */
> -	r = amdgpu_bo_reserve(sa_manager->bo, false);
> -	if (r) {
> -		dev_err(adev->dev, "(%d) failed to reserve manager bo\n", r);
> -		return r;
> -	}
> -	r = amdgpu_bo_pin(sa_manager->bo, sa_manager->domain, &sa_manager->gpu_addr);
> -	if (r) {
> -		amdgpu_bo_unreserve(sa_manager->bo);
> -		dev_err(adev->dev, "(%d) failed to pin manager bo\n", r);
> -		return r;
> -	}
> -	r = amdgpu_bo_kmap(sa_manager->bo, &sa_manager->cpu_ptr);
> -	memset(sa_manager->cpu_ptr, 0, sa_manager->size);
> -	amdgpu_bo_unreserve(sa_manager->bo);
> -	return r;
> -}
> -
> -int amdgpu_sa_bo_manager_suspend(struct amdgpu_device *adev,
> -				 struct amdgpu_sa_manager *sa_manager)
> -{
> -	int r;
> -
> -	if (sa_manager->bo == NULL) {
> -		dev_err(adev->dev, "no bo for sa manager\n");
> -		return -EINVAL;
> -	}
> -
> -	r = amdgpu_bo_reserve(sa_manager->bo, true);
> -	if (!r) {
> -		amdgpu_bo_kunmap(sa_manager->bo);
> -		amdgpu_bo_unpin(sa_manager->bo);
> -		amdgpu_bo_unreserve(sa_manager->bo);
> -	}
> -	return r;
> +	amdgpu_bo_free_kernel(&sa_manager->bo, &sa_manager->gpu_addr, &sa_manager->cpu_ptr);
> +	sa_manager->size = 0;
>   }
>   
>   static void amdgpu_sa_bo_remove_locked(struct amdgpu_sa_bo *sa_bo)

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