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From: "Christian König" <deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
To: Alex Deucher
	<alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
Subject: Re: [PATCH 1/2] drm/amdgpu/gfx7: enable cp/rlc ints after we disable clockgating
Date: Tue, 11 Apr 2017 08:44:15 +0200	[thread overview]
Message-ID: <cc2ab63d-41ab-3f24-72b2-f95dec2bd1a2@vodafone.de> (raw)
In-Reply-To: <1491860758-22182-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>

Am 10.04.2017 um 23:45 schrieb Alex Deucher:
> Even if we disable clockgating, we still need to make sure the
> cp/rlc interrupts are enabled for powergating which might still
> be enabled.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Acked-by: Christian König <christian.koenig@amd.com> for both.

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 11 +++++++----
>   1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 8a8bc2f..185cb31 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -3797,6 +3797,9 @@ static void gfx_v7_0_enable_cgcg(struct amdgpu_device *adev, bool enable)
>   		gfx_v7_0_update_rlc(adev, tmp);
>   
>   		data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK;
> +		if (orig != data)
> +			WREG32(mmRLC_CGCG_CGLS_CTRL, data);
> +
>   	} else {
>   		gfx_v7_0_enable_gui_idle_interrupt(adev, false);
>   
> @@ -3806,11 +3809,11 @@ static void gfx_v7_0_enable_cgcg(struct amdgpu_device *adev, bool enable)
>   		RREG32(mmCB_CGTT_SCLK_CTRL);
>   
>   		data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK);
> -	}
> -
> -	if (orig != data)
> -		WREG32(mmRLC_CGCG_CGLS_CTRL, data);
> +		if (orig != data)
> +			WREG32(mmRLC_CGCG_CGLS_CTRL, data);
>   
> +		gfx_v7_0_enable_gui_idle_interrupt(adev, true);
> +	}
>   }
>   
>   static void gfx_v7_0_enable_mgcg(struct amdgpu_device *adev, bool enable)


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      parent reply	other threads:[~2017-04-11  6:44 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-10 21:45 [PATCH 1/2] drm/amdgpu/gfx7: enable cp/rlc ints after we disable clockgating Alex Deucher
     [not found] ` <1491860758-22182-1-git-send-email-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2017-04-10 21:45   ` [PATCH 2/2] drm/amdgpu/gfx8: " Alex Deucher
2017-04-11  6:44   ` Christian König [this message]

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