From: Matthew Auld <matthew.auld@intel.com> To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, intel-gfx@lists.freedesktop.org Cc: "Mateusz Jończyk" <mat.jonczyk@o2.pl>, "Hans de Goede" <hdegoede@redhat.com>, dri-devel@lists.freedesktop.org Subject: Re: [PATCH] drm/i915: Use i915_gem_object_ggtt_pin_ww for reloc_iomap Date: Thu, 12 May 2022 17:14:28 +0100 [thread overview] Message-ID: <cd0010ce-0f90-678c-364e-cf39238a21bd@intel.com> (raw) In-Reply-To: <66e2bfe6-6053-9728-63ee-e4aad5a0f631@linux.intel.com> On 11/05/2022 19:38, Maarten Lankhorst wrote: > Op 11-05-2022 om 20:23 schreef Matthew Auld: >> On 11/05/2022 12:52, Maarten Lankhorst wrote: >>> Instead of its own path, use the common path when it doesn't result >>> in evicting any vma. This fixes the case where we don't wait for >>> binding. >>> >> >> https://gitlab.freedesktop.org/drm/intel/-/issues/5806 >> >> If I'm reading that correctly waiting for the bind doesn't seem to help? > > I suspect the actual pinning there might do some stuff that we are not doing. > > It was working before the change, and manually calling pin caused the failure, so I reverted it back to what was working before. It was specifically the manual pin code that was failing. > > I can change the commit message if it helps. Hmm strange. With the commit message updated, Acked-by: Matthew Auld <matthew.auld@intel.com> > > ~Maarten > >>> Fixes: b5cfe6f7a6e1 ("drm/i915: Remove short-term pins from execbuf, v6.") >>> Cc: Matthew Auld <matthew.auld@intel.com> >>> Reported-by: Mateusz Jończyk <mat.jonczyk@o2.pl> >>> Tested-by: Hans de Goede <hdegoede@redhat.com> >>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> >>> --- >>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 6 ++---- >>> 1 file changed, 2 insertions(+), 4 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >>> index 498b458fd784..919d01082909 100644 >>> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >>> @@ -1262,14 +1262,12 @@ static void *reloc_iomap(struct i915_vma *batch, >>> * Only attempt to pin the batch buffer to ggtt if the current batch >>> * is not inside ggtt, or the batch buffer is not misplaced. >>> */ >>> - if (!i915_is_ggtt(batch->vm)) { >>> + if (!i915_is_ggtt(batch->vm) || >>> + !i915_vma_misplaced(batch, 0, 0, PIN_MAPPABLE)) { >>> vma = i915_gem_object_ggtt_pin_ww(obj, &eb->ww, NULL, 0, 0, >>> PIN_MAPPABLE | >>> PIN_NONBLOCK /* NOWARN */ | >>> PIN_NOEVICT); >>> - } else if (i915_vma_is_map_and_fenceable(batch)) { >>> - __i915_vma_pin(batch); >>> - vma = batch; >>> } >>> if (vma == ERR_PTR(-EDEADLK)) > >
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com> To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, intel-gfx@lists.freedesktop.org Cc: "Mateusz Jończyk" <mat.jonczyk@o2.pl>, dri-devel@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915: Use i915_gem_object_ggtt_pin_ww for reloc_iomap Date: Thu, 12 May 2022 17:14:28 +0100 [thread overview] Message-ID: <cd0010ce-0f90-678c-364e-cf39238a21bd@intel.com> (raw) In-Reply-To: <66e2bfe6-6053-9728-63ee-e4aad5a0f631@linux.intel.com> On 11/05/2022 19:38, Maarten Lankhorst wrote: > Op 11-05-2022 om 20:23 schreef Matthew Auld: >> On 11/05/2022 12:52, Maarten Lankhorst wrote: >>> Instead of its own path, use the common path when it doesn't result >>> in evicting any vma. This fixes the case where we don't wait for >>> binding. >>> >> >> https://gitlab.freedesktop.org/drm/intel/-/issues/5806 >> >> If I'm reading that correctly waiting for the bind doesn't seem to help? > > I suspect the actual pinning there might do some stuff that we are not doing. > > It was working before the change, and manually calling pin caused the failure, so I reverted it back to what was working before. It was specifically the manual pin code that was failing. > > I can change the commit message if it helps. Hmm strange. With the commit message updated, Acked-by: Matthew Auld <matthew.auld@intel.com> > > ~Maarten > >>> Fixes: b5cfe6f7a6e1 ("drm/i915: Remove short-term pins from execbuf, v6.") >>> Cc: Matthew Auld <matthew.auld@intel.com> >>> Reported-by: Mateusz Jończyk <mat.jonczyk@o2.pl> >>> Tested-by: Hans de Goede <hdegoede@redhat.com> >>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> >>> --- >>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 6 ++---- >>> 1 file changed, 2 insertions(+), 4 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >>> index 498b458fd784..919d01082909 100644 >>> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c >>> @@ -1262,14 +1262,12 @@ static void *reloc_iomap(struct i915_vma *batch, >>> * Only attempt to pin the batch buffer to ggtt if the current batch >>> * is not inside ggtt, or the batch buffer is not misplaced. >>> */ >>> - if (!i915_is_ggtt(batch->vm)) { >>> + if (!i915_is_ggtt(batch->vm) || >>> + !i915_vma_misplaced(batch, 0, 0, PIN_MAPPABLE)) { >>> vma = i915_gem_object_ggtt_pin_ww(obj, &eb->ww, NULL, 0, 0, >>> PIN_MAPPABLE | >>> PIN_NONBLOCK /* NOWARN */ | >>> PIN_NOEVICT); >>> - } else if (i915_vma_is_map_and_fenceable(batch)) { >>> - __i915_vma_pin(batch); >>> - vma = batch; >>> } >>> if (vma == ERR_PTR(-EDEADLK)) > >
next prev parent reply other threads:[~2022-05-12 16:42 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-11 11:52 [PATCH] drm/i915: Use i915_gem_object_ggtt_pin_ww for reloc_iomap Maarten Lankhorst 2022-05-11 11:52 ` [Intel-gfx] " Maarten Lankhorst 2022-05-11 14:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork 2022-05-11 18:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2022-05-11 18:23 ` [PATCH] " Matthew Auld 2022-05-11 18:23 ` [Intel-gfx] " Matthew Auld 2022-05-11 18:38 ` Maarten Lankhorst 2022-05-11 18:38 ` [Intel-gfx] " Maarten Lankhorst 2022-05-12 16:14 ` Matthew Auld [this message] 2022-05-12 16:14 ` Matthew Auld
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