* [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit
@ 2021-01-20 3:05 Marek Vasut
2021-01-20 10:14 ` Paul Barker
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Marek Vasut @ 2021-01-20 3:05 UTC (permalink / raw)
To: netdev
Cc: Marek Vasut, Florian Fainelli, Andrew Lunn, Jakub Kicinski,
Michael Grzeschik, Paul Barker
KSZ8794CNX datasheet section 8.0 RESET CIRCUIT describes recommended
circuit for interfacing with CPU/FPGA reset consisting of 10k pullup
resistor and 10uF capacitor to ground. This circuit takes ~100 ms to
rise enough to release the reset.
For maximum supply voltage VDDIO=3.3V VIH=2.0V R=10kR C=10uF that is
VDDIO - VIH
t = R * C * -ln( ------------- ) = 10000*0.00001*-(-0.93)=0.093 s
VDDIO
so we need ~95 ms for the reset to really de-assert, and then the
original 100us for the switch itself to come out of reset. Simply
msleep() for 100 ms which fits the constraint with a bit of extra
space.
Fixes: 5b797980908a ("net: dsa: microchip: Implement recommended reset timing")
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Michael Grzeschik <m.grzeschik@pengutronix.de>
Cc: Paul Barker <pbarker@konsulko.com>
---
V2: Use lowercase 's' for second
---
drivers/net/dsa/microchip/ksz_common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
index 489963664443..389abfd27770 100644
--- a/drivers/net/dsa/microchip/ksz_common.c
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -400,7 +400,7 @@ int ksz_switch_register(struct ksz_device *dev,
gpiod_set_value_cansleep(dev->reset_gpio, 1);
usleep_range(10000, 12000);
gpiod_set_value_cansleep(dev->reset_gpio, 0);
- usleep_range(100, 1000);
+ msleep(100);
}
mutex_init(&dev->dev_mutex);
--
2.29.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit
2021-01-20 3:05 [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit Marek Vasut
@ 2021-01-20 10:14 ` Paul Barker
2021-01-20 19:02 ` Andrew Lunn
2021-01-21 1:31 ` Jakub Kicinski
2 siblings, 0 replies; 7+ messages in thread
From: Paul Barker @ 2021-01-20 10:14 UTC (permalink / raw)
To: Marek Vasut
Cc: Networking, Florian Fainelli, Andrew Lunn, Jakub Kicinski,
Michael Grzeschik
On Wed, 20 Jan 2021 at 03:05, Marek Vasut <marex@denx.de> wrote:
>
> KSZ8794CNX datasheet section 8.0 RESET CIRCUIT describes recommended
> circuit for interfacing with CPU/FPGA reset consisting of 10k pullup
> resistor and 10uF capacitor to ground. This circuit takes ~100 ms to
> rise enough to release the reset.
>
> For maximum supply voltage VDDIO=3.3V VIH=2.0V R=10kR C=10uF that is
> VDDIO - VIH
> t = R * C * -ln( ------------- ) = 10000*0.00001*-(-0.93)=0.093 s
> VDDIO
> so we need ~95 ms for the reset to really de-assert, and then the
> original 100us for the switch itself to come out of reset. Simply
> msleep() for 100 ms which fits the constraint with a bit of extra
> space.
This makes sense if someone is using that device and following the
reference circuit exactly. Working with the ksz9477 I can tell you
that the reference reset circuit in figure 7.2 of the datasheet
doesn't work with a VDDIO of 1.8V. And hardware engineers like to take
some liberties anyway...
But 100ms is reasonable in general. It will allow for the expected
rise time of a wide range of possible reset circuit designs and isn't
so long that it will have a major impact on start-up time.
So it looks good to me.
Reviewed-by: Paul Barker <pbarker@konsulko.com>
--
Paul Barker
Konsulko Group
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit
2021-01-20 3:05 [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit Marek Vasut
2021-01-20 10:14 ` Paul Barker
@ 2021-01-20 19:02 ` Andrew Lunn
2021-01-21 1:31 ` Jakub Kicinski
2 siblings, 0 replies; 7+ messages in thread
From: Andrew Lunn @ 2021-01-20 19:02 UTC (permalink / raw)
To: Marek Vasut
Cc: netdev, Florian Fainelli, Jakub Kicinski, Michael Grzeschik, Paul Barker
On Wed, Jan 20, 2021 at 04:05:02AM +0100, Marek Vasut wrote:
> KSZ8794CNX datasheet section 8.0 RESET CIRCUIT describes recommended
> circuit for interfacing with CPU/FPGA reset consisting of 10k pullup
> resistor and 10uF capacitor to ground. This circuit takes ~100 ms to
> rise enough to release the reset.
>
> For maximum supply voltage VDDIO=3.3V VIH=2.0V R=10kR C=10uF that is
> VDDIO - VIH
> t = R * C * -ln( ------------- ) = 10000*0.00001*-(-0.93)=0.093 s
> VDDIO
> so we need ~95 ms for the reset to really de-assert, and then the
> original 100us for the switch itself to come out of reset. Simply
> msleep() for 100 ms which fits the constraint with a bit of extra
> space.
>
> Fixes: 5b797980908a ("net: dsa: microchip: Implement recommended reset timing")
> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: Jakub Kicinski <kuba@kernel.org>
> Cc: Michael Grzeschik <m.grzeschik@pengutronix.de>
> Cc: Paul Barker <pbarker@konsulko.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit
2021-01-20 3:05 [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit Marek Vasut
2021-01-20 10:14 ` Paul Barker
2021-01-20 19:02 ` Andrew Lunn
@ 2021-01-21 1:31 ` Jakub Kicinski
2021-01-21 1:51 ` Marek Vasut
2 siblings, 1 reply; 7+ messages in thread
From: Jakub Kicinski @ 2021-01-21 1:31 UTC (permalink / raw)
To: Marek Vasut
Cc: netdev, Florian Fainelli, Andrew Lunn, Michael Grzeschik, Paul Barker
On Wed, 20 Jan 2021 04:05:02 +0100 Marek Vasut wrote:
> KSZ8794CNX datasheet section 8.0 RESET CIRCUIT describes recommended
> circuit for interfacing with CPU/FPGA reset consisting of 10k pullup
> resistor and 10uF capacitor to ground. This circuit takes ~100 ms to
> rise enough to release the reset.
>
> For maximum supply voltage VDDIO=3.3V VIH=2.0V R=10kR C=10uF that is
> VDDIO - VIH
> t = R * C * -ln( ------------- ) = 10000*0.00001*-(-0.93)=0.093 s
> VDDIO
> so we need ~95 ms for the reset to really de-assert, and then the
> original 100us for the switch itself to come out of reset. Simply
> msleep() for 100 ms which fits the constraint with a bit of extra
> space.
>
> Fixes: 5b797980908a ("net: dsa: microchip: Implement recommended reset timing")
> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> Signed-off-by: Marek Vasut <marex@denx.de>
I'm slightly confused whether this is just future proofing or you
actually have a board where this matters. The tree is tagged as
net-next but there is a Fixes tag which normally indicates net+stable.
Please advise.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit
2021-01-21 1:31 ` Jakub Kicinski
@ 2021-01-21 1:51 ` Marek Vasut
2021-01-21 2:10 ` Florian Fainelli
0 siblings, 1 reply; 7+ messages in thread
From: Marek Vasut @ 2021-01-21 1:51 UTC (permalink / raw)
To: Jakub Kicinski
Cc: netdev, Florian Fainelli, Andrew Lunn, Michael Grzeschik, Paul Barker
On 1/21/21 2:31 AM, Jakub Kicinski wrote:
> On Wed, 20 Jan 2021 04:05:02 +0100 Marek Vasut wrote:
>> KSZ8794CNX datasheet section 8.0 RESET CIRCUIT describes recommended
>> circuit for interfacing with CPU/FPGA reset consisting of 10k pullup
>> resistor and 10uF capacitor to ground. This circuit takes ~100 ms to
>> rise enough to release the reset.
>>
>> For maximum supply voltage VDDIO=3.3V VIH=2.0V R=10kR C=10uF that is
>> VDDIO - VIH
>> t = R * C * -ln( ------------- ) = 10000*0.00001*-(-0.93)=0.093 s
>> VDDIO
>> so we need ~95 ms for the reset to really de-assert, and then the
>> original 100us for the switch itself to come out of reset. Simply
>> msleep() for 100 ms which fits the constraint with a bit of extra
>> space.
>>
>> Fixes: 5b797980908a ("net: dsa: microchip: Implement recommended reset timing")
>> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>
> I'm slightly confused whether this is just future proofing or you
> actually have a board where this matters. The tree is tagged as
> net-next but there is a Fixes tag which normally indicates net+stable.
I have a board where I trigger this problem, that's how I found it. It
should be passed to stable too. So the correct tree / tag is "net" ?
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit
2021-01-21 1:51 ` Marek Vasut
@ 2021-01-21 2:10 ` Florian Fainelli
2021-01-21 4:55 ` Jakub Kicinski
0 siblings, 1 reply; 7+ messages in thread
From: Florian Fainelli @ 2021-01-21 2:10 UTC (permalink / raw)
To: Marek Vasut, Jakub Kicinski
Cc: netdev, Andrew Lunn, Michael Grzeschik, Paul Barker
On 1/20/2021 5:51 PM, Marek Vasut wrote:
> On 1/21/21 2:31 AM, Jakub Kicinski wrote:
>> On Wed, 20 Jan 2021 04:05:02 +0100 Marek Vasut wrote:
>>> KSZ8794CNX datasheet section 8.0 RESET CIRCUIT describes recommended
>>> circuit for interfacing with CPU/FPGA reset consisting of 10k pullup
>>> resistor and 10uF capacitor to ground. This circuit takes ~100 ms to
>>> rise enough to release the reset.
>>>
>>> For maximum supply voltage VDDIO=3.3V VIH=2.0V R=10kR C=10uF that is
>>> VDDIO - VIH
>>> t = R * C * -ln( ------------- ) = 10000*0.00001*-(-0.93)=0.093 s
>>> VDDIO
>>> so we need ~95 ms for the reset to really de-assert, and then the
>>> original 100us for the switch itself to come out of reset. Simply
>>> msleep() for 100 ms which fits the constraint with a bit of extra
>>> space.
>>>
>>> Fixes: 5b797980908a ("net: dsa: microchip: Implement recommended
>>> reset timing")
>>> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
>>> Signed-off-by: Marek Vasut <marex@denx.de>
>>
>> I'm slightly confused whether this is just future proofing or you
>> actually have a board where this matters. The tree is tagged as
>> net-next but there is a Fixes tag which normally indicates net+stable.
>
> I have a board where I trigger this problem, that's how I found it. It
> should be passed to stable too. So the correct tree / tag is "net" ?
If this is a bug fix for a commit that is not only in 'net-next', then
yes, targeting 'net' is more appropriate:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/networking/netdev-FAQ.rst#n28
--
Florian
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit
2021-01-21 2:10 ` Florian Fainelli
@ 2021-01-21 4:55 ` Jakub Kicinski
0 siblings, 0 replies; 7+ messages in thread
From: Jakub Kicinski @ 2021-01-21 4:55 UTC (permalink / raw)
To: Florian Fainelli, Marek Vasut, Andrew Lunn, Paul Barker
Cc: netdev, Michael Grzeschik
On Wed, 20 Jan 2021 18:10:59 -0800 Florian Fainelli wrote:
> On 1/20/2021 5:51 PM, Marek Vasut wrote:
> > On 1/21/21 2:31 AM, Jakub Kicinski wrote:
> >> On Wed, 20 Jan 2021 04:05:02 +0100 Marek Vasut wrote:
> >>> KSZ8794CNX datasheet section 8.0 RESET CIRCUIT describes recommended
> >>> circuit for interfacing with CPU/FPGA reset consisting of 10k pullup
> >>> resistor and 10uF capacitor to ground. This circuit takes ~100 ms to
> >>> rise enough to release the reset.
> >>>
> >>> For maximum supply voltage VDDIO=3.3V VIH=2.0V R=10kR C=10uF that is
> >>> VDDIO - VIH
> >>> t = R * C * -ln( ------------- ) = 10000*0.00001*-(-0.93)=0.093 s
> >>> VDDIO
> >>> so we need ~95 ms for the reset to really de-assert, and then the
> >>> original 100us for the switch itself to come out of reset. Simply
> >>> msleep() for 100 ms which fits the constraint with a bit of extra
> >>> space.
> >>>
> >>> Fixes: 5b797980908a ("net: dsa: microchip: Implement recommended
> >>> reset timing")
> >>> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> >>> Signed-off-by: Marek Vasut <marex@denx.de>
> >>
> >> I'm slightly confused whether this is just future proofing or you
> >> actually have a board where this matters. The tree is tagged as
> >> net-next but there is a Fixes tag which normally indicates net+stable.
> >
> > I have a board where I trigger this problem, that's how I found it. It
> > should be passed to stable too. So the correct tree / tag is "net" ?
>
> If this is a bug fix for a commit that is not only in 'net-next', then
> yes, targeting 'net' is more appropriate:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/networking/netdev-FAQ.rst#n28
Yup, in that case applied this one and the port map fix to net.
Thanks everyone!
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-01-21 4:57 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-20 3:05 [PATCH net-next V2] net: dsa: microchip: Adjust reset release timing to match reference reset circuit Marek Vasut
2021-01-20 10:14 ` Paul Barker
2021-01-20 19:02 ` Andrew Lunn
2021-01-21 1:31 ` Jakub Kicinski
2021-01-21 1:51 ` Marek Vasut
2021-01-21 2:10 ` Florian Fainelli
2021-01-21 4:55 ` Jakub Kicinski
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