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* [PATCH] drm/i915/guc: Support for extended GuC notification messages
@ 2019-03-21 12:00 Michal Wajdeczko
  2019-03-21 15:09 ` ✗ Fi.CI.BAT: failure for " Patchwork
  2019-03-22 23:29 ` [PATCH] " Daniele Ceraolo Spurio
  0 siblings, 2 replies; 4+ messages in thread
From: Michal Wajdeczko @ 2019-03-21 12:00 UTC (permalink / raw)
  To: intel-gfx

GuC may send notification messages with payload larger than
single u32. Prepare driver to accept longer messages.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
---
 drivers/gpu/drm/i915/intel_guc.c    | 14 +++++++++++---
 drivers/gpu/drm/i915/intel_guc.h    |  3 ++-
 drivers/gpu/drm/i915/intel_guc_ct.c |  5 +++--
 3 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index a59448a56f55..f2b4eaee8d52 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -484,17 +484,25 @@ void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc)
 	spin_unlock(&guc->irq_lock);
 	enable_rpm_wakeref_asserts(dev_priv);
 
-	intel_guc_to_host_process_recv_msg(guc, msg);
+	intel_guc_to_host_process_recv_msg(guc, &msg, 1);
 }
 
-void intel_guc_to_host_process_recv_msg(struct intel_guc *guc, u32 msg)
+int intel_guc_to_host_process_recv_msg(struct intel_guc *guc,
+				       const u32 *payload, u32 len)
 {
+	u32 msg;
+
+	if (unlikely(!len))
+		return -EPROTO;
+
 	/* Make sure to handle only enabled messages */
-	msg &= guc->msg_enabled_mask;
+	msg = payload[0] & guc->msg_enabled_mask;
 
 	if (msg & (INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER |
 		   INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED))
 		intel_guc_log_handle_flush_event(&guc->log);
+
+	return 0;
 }
 
 int intel_guc_sample_forcewake(struct intel_guc *guc)
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 77ec1bd4df5a..2c59ff8d9f39 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -165,7 +165,8 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
 void intel_guc_to_host_event_handler(struct intel_guc *guc);
 void intel_guc_to_host_event_handler_nop(struct intel_guc *guc);
 void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc);
-void intel_guc_to_host_process_recv_msg(struct intel_guc *guc, u32 msg);
+int intel_guc_to_host_process_recv_msg(struct intel_guc *guc,
+				       const u32 *payload, u32 len);
 int intel_guc_sample_forcewake(struct intel_guc *guc);
 int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
 int intel_guc_suspend(struct intel_guc *guc);
diff --git a/drivers/gpu/drm/i915/intel_guc_ct.c b/drivers/gpu/drm/i915/intel_guc_ct.c
index 79ddb8088311..dde1dc0d6e69 100644
--- a/drivers/gpu/drm/i915/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/intel_guc_ct.c
@@ -701,14 +701,15 @@ static void ct_process_request(struct intel_guc_ct *ct,
 			       u32 action, u32 len, const u32 *payload)
 {
 	struct intel_guc *guc = ct_to_guc(ct);
+	int ret;
 
 	CT_DEBUG_DRIVER("CT: request %x %*ph\n", action, 4 * len, payload);
 
 	switch (action) {
 	case INTEL_GUC_ACTION_DEFAULT:
-		if (unlikely(len < 1))
+		ret = intel_guc_to_host_process_recv_msg(guc, payload, len);
+		if (unlikely(ret))
 			goto fail_unexpected;
-		intel_guc_to_host_process_recv_msg(guc, *payload);
 		break;
 
 	default:
-- 
2.19.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* ✗ Fi.CI.BAT: failure for drm/i915/guc: Support for extended GuC notification messages
  2019-03-21 12:00 [PATCH] drm/i915/guc: Support for extended GuC notification messages Michal Wajdeczko
@ 2019-03-21 15:09 ` Patchwork
  2019-03-22 23:29 ` [PATCH] " Daniele Ceraolo Spurio
  1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2019-03-21 15:09 UTC (permalink / raw)
  To: Michal Wajdeczko; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/guc: Support for extended GuC notification messages
URL   : https://patchwork.freedesktop.org/series/58352/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_5788 -> Patchwork_12548
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_12548 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_12548, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/58352/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_12548:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_close_race@basic-process:
    - fi-icl-u3:          PASS -> INCOMPLETE

  
Known issues
------------

  Here are the changes found in Patchwork_12548 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@query-info:
    - fi-bsw-kefka:       NOTRUN -> SKIP [fdo#109271] +55

  * igt@amdgpu/amd_basic@userptr:
    - fi-whl-u:           NOTRUN -> SKIP [fdo#109271] +17

  * igt@gem_exec_basic@gtt-bsd2:
    - fi-byt-clapper:     NOTRUN -> SKIP [fdo#109271] +57

  * igt@gem_exec_basic@readonly-bsd:
    - fi-skl-6770hq:      PASS -> DMESG-WARN [fdo#105541]

  * igt@gem_exec_basic@readonly-bsd1:
    - fi-snb-2520m:       NOTRUN -> SKIP [fdo#109271] +57

  * igt@kms_busy@basic-flip-b:
    - fi-gdg-551:         PASS -> FAIL [fdo#103182]

  * igt@kms_busy@basic-flip-c:
    - fi-byt-clapper:     NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
    - fi-bsw-kefka:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
    - fi-snb-2520m:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
    - fi-byt-clapper:     NOTRUN -> FAIL [fdo#107362]

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
    - fi-byt-clapper:     NOTRUN -> FAIL [fdo#103191] / [fdo#107362] +1

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-whl-u:           DMESG-WARN [fdo#109513] -> PASS
    - fi-skl-6770hq:      FAIL [fdo#108511] -> PASS

  * igt@i915_selftest@live_uncore:
    - fi-skl-gvtdvm:      DMESG-FAIL [fdo#110210] -> PASS

  * igt@kms_busy@basic-flip-a:
    - fi-gdg-551:         FAIL [fdo#103182] -> PASS

  
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109513]: https://bugs.freedesktop.org/show_bug.cgi?id=109513
  [fdo#110210]: https://bugs.freedesktop.org/show_bug.cgi?id=110210


Participating hosts (41 -> 38)
------------------------------

  Additional (3): fi-bsw-kefka fi-byt-clapper fi-snb-2520m 
  Missing    (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-ctg-p8600 fi-bdw-samus 


Build changes
-------------

    * Linux: CI_DRM_5788 -> Patchwork_12548

  CI_DRM_5788: befbe4e0469e0dc93889f470e816eb31498db6ba @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4896: 0f9c061247fb7aba21c9459f19f437927a28f32c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_12548: 3132c61592e96bcf16d90e010a008842a4854280 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

3132c61592e9 drm/i915/guc: Support for extended GuC notification messages

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12548/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] drm/i915/guc: Support for extended GuC notification messages
  2019-03-21 12:00 [PATCH] drm/i915/guc: Support for extended GuC notification messages Michal Wajdeczko
  2019-03-21 15:09 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2019-03-22 23:29 ` Daniele Ceraolo Spurio
  2019-03-24 11:33   ` Chris Wilson
  1 sibling, 1 reply; 4+ messages in thread
From: Daniele Ceraolo Spurio @ 2019-03-22 23:29 UTC (permalink / raw)
  To: Michal Wajdeczko, intel-gfx



On 3/21/19 5:00 AM, Michal Wajdeczko wrote:
> GuC may send notification messages with payload larger than
> single u32. Prepare driver to accept longer messages.
> 

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

To give a bit more context, for example the RESET_COMPLETE G2H will 
provide the engine class in the second dword.

Daniele

> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Cc: Tomasz Lis <tomasz.lis@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_guc.c    | 14 +++++++++++---
>   drivers/gpu/drm/i915/intel_guc.h    |  3 ++-
>   drivers/gpu/drm/i915/intel_guc_ct.c |  5 +++--
>   3 files changed, 16 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index a59448a56f55..f2b4eaee8d52 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -484,17 +484,25 @@ void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc)
>   	spin_unlock(&guc->irq_lock);
>   	enable_rpm_wakeref_asserts(dev_priv);
>   
> -	intel_guc_to_host_process_recv_msg(guc, msg);
> +	intel_guc_to_host_process_recv_msg(guc, &msg, 1);
>   }
>   
> -void intel_guc_to_host_process_recv_msg(struct intel_guc *guc, u32 msg)
> +int intel_guc_to_host_process_recv_msg(struct intel_guc *guc,
> +				       const u32 *payload, u32 len)
>   {
> +	u32 msg;
> +
> +	if (unlikely(!len))
> +		return -EPROTO;
> +
>   	/* Make sure to handle only enabled messages */
> -	msg &= guc->msg_enabled_mask;
> +	msg = payload[0] & guc->msg_enabled_mask;
>   
>   	if (msg & (INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER |
>   		   INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED))
>   		intel_guc_log_handle_flush_event(&guc->log);
> +
> +	return 0;
>   }
>   
>   int intel_guc_sample_forcewake(struct intel_guc *guc)
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index 77ec1bd4df5a..2c59ff8d9f39 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -165,7 +165,8 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
>   void intel_guc_to_host_event_handler(struct intel_guc *guc);
>   void intel_guc_to_host_event_handler_nop(struct intel_guc *guc);
>   void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc);
> -void intel_guc_to_host_process_recv_msg(struct intel_guc *guc, u32 msg);
> +int intel_guc_to_host_process_recv_msg(struct intel_guc *guc,
> +				       const u32 *payload, u32 len);
>   int intel_guc_sample_forcewake(struct intel_guc *guc);
>   int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
>   int intel_guc_suspend(struct intel_guc *guc);
> diff --git a/drivers/gpu/drm/i915/intel_guc_ct.c b/drivers/gpu/drm/i915/intel_guc_ct.c
> index 79ddb8088311..dde1dc0d6e69 100644
> --- a/drivers/gpu/drm/i915/intel_guc_ct.c
> +++ b/drivers/gpu/drm/i915/intel_guc_ct.c
> @@ -701,14 +701,15 @@ static void ct_process_request(struct intel_guc_ct *ct,
>   			       u32 action, u32 len, const u32 *payload)
>   {
>   	struct intel_guc *guc = ct_to_guc(ct);
> +	int ret;
>   
>   	CT_DEBUG_DRIVER("CT: request %x %*ph\n", action, 4 * len, payload);
>   
>   	switch (action) {
>   	case INTEL_GUC_ACTION_DEFAULT:
> -		if (unlikely(len < 1))
> +		ret = intel_guc_to_host_process_recv_msg(guc, payload, len);
> +		if (unlikely(ret))
>   			goto fail_unexpected;
> -		intel_guc_to_host_process_recv_msg(guc, *payload);
>   		break;
>   
>   	default:
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] drm/i915/guc: Support for extended GuC notification messages
  2019-03-22 23:29 ` [PATCH] " Daniele Ceraolo Spurio
@ 2019-03-24 11:33   ` Chris Wilson
  0 siblings, 0 replies; 4+ messages in thread
From: Chris Wilson @ 2019-03-24 11:33 UTC (permalink / raw)
  To: Daniele Ceraolo Spurio, Michal Wajdeczko, intel-gfx

Quoting Daniele Ceraolo Spurio (2019-03-22 23:29:13)
> 
> 
> On 3/21/19 5:00 AM, Michal Wajdeczko wrote:
> > GuC may send notification messages with payload larger than
> > single u32. Prepare driver to accept longer messages.
> > 
> 
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> To give a bit more context, for example the RESET_COMPLETE G2H will 
> provide the engine class in the second dword.

And pushed, thanks for the patch.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2019-03-24 11:33 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-21 12:00 [PATCH] drm/i915/guc: Support for extended GuC notification messages Michal Wajdeczko
2019-03-21 15:09 ` ✗ Fi.CI.BAT: failure for " Patchwork
2019-03-22 23:29 ` [PATCH] " Daniele Ceraolo Spurio
2019-03-24 11:33   ` Chris Wilson

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