All of lore.kernel.org
 help / color / mirror / Atom feed
From: Oscar Mateo <oscar.mateo@intel.com>
To: "Lis, Tomasz" <tomasz.lis@intel.com>,
	Chris Wilson <chris@chris-wilson.co.uk>,
	intel-gfx@lists.freedesktop.org
Cc: bartosz.dunajski@intel.com
Subject: Re: [RFC v1] drm/i915: Add Exec param to control data port coherency.
Date: Tue, 20 Mar 2018 11:43:45 -0700	[thread overview]
Message-ID: <ced25d42-a84e-debb-0cae-5a4b5a2d134a@intel.com> (raw)
In-Reply-To: <31312894-68a0-bb5c-04af-348097bff2a1@intel.com>



On 3/19/2018 7:14 AM, Lis, Tomasz wrote:
>
>
> On 2018-03-19 13:43, Chris Wilson wrote:
>> Quoting Tomasz Lis (2018-03-19 12:37:35)
>>> The patch adds a parameter to control the data port coherency 
>>> functionality
>>> on a per-exec call basis. When data port coherency flag value is 
>>> different
>>> than what it was in previous call for the context, a command to 
>>> switch data
>>> port coherency state is added before the buffer to be executed.
>> So this is part of the context? Why do it at exec level?
>
> It is part of the context, stored within HDC chicken bit register.
> The exec level was requested by the OCL team, due to concerns about 
> performance cost of context setparam calls.
>
>>   If exec level
>> is desired, why not whitelist it?
>> -Chris
>
> If we have no issue in whitelisting the register, I'm sure OCL will 
> agree to that.
> I assumed the whitelisting will be unacceptable because of security 
> concerns with some options.
> The register also changes its position and content between gens, which 
> makes whitelisting hard to manage.
>

I think a security analysis of this register was already done, and the 
result was that it contains some other bits that could be dangerous. In 
CNL those bits were moved out of the way and the HDC_CHICKEN0 register 
can be whitelisted (WaAllowUMDToControlCoherency). In ICL the register 
should already be non-privileged.

> Main purpose of chicken bit registers, in general, is to allow work 
> around for hardware features which could  be buggy or could have 
> unintended influence on the platform.
> The data port coherency functionality landed there for the same 
> reasons; then it twisted itself in a way that we now need user space 
> to switch it.
> Is it really ok to whitelist chicken bit registers?
> -Tomasz
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-03-20 18:43 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-19 12:37 [RFC v1] Data port coherency control for UMDs Tomasz Lis
2018-03-19 12:37 ` [RFC v1] drm/i915: Add Exec param to control data port coherency Tomasz Lis
2018-03-19 12:43   ` Chris Wilson
2018-03-19 14:14     ` Lis, Tomasz
2018-03-19 14:26       ` Chris Wilson
2018-03-20 17:23         ` Lis, Tomasz
2018-05-04  9:24           ` Joonas Lahtinen
2018-03-20 18:43       ` Oscar Mateo [this message]
2018-03-21 10:16         ` Chris Wilson
2018-03-21 19:42           ` Oscar Mateo
2018-03-27 17:41             ` Lis, Tomasz
2018-03-30 17:29   ` [PATCH " Tomasz Lis
2018-03-31 19:07     ` kbuild test robot
2018-04-11 15:46   ` [PATCH v2] " Tomasz Lis
2018-06-20 15:03   ` [PATCH v1] Second implementation of Data Port Coherency Tomasz Lis
2018-06-20 15:03     ` [PATCH v1] drm/i915: Add IOCTL Param to control data port coherency Tomasz Lis
2018-06-21  6:39       ` Joonas Lahtinen
2018-06-21 13:47         ` Lis, Tomasz
2018-07-18 13:03           ` Joonas Lahtinen
2018-06-21  7:05       ` Chris Wilson
2018-06-21 13:47         ` Lis, Tomasz
2018-06-21  7:31       ` Dunajski, Bartosz
2018-06-21  8:48         ` Joonas Lahtinen
2018-06-22 16:40           ` Dunajski, Bartosz
2018-07-18 13:12             ` Joonas Lahtinen
2018-07-18 13:27               ` Dunajski, Bartosz
2018-07-09 13:20   ` [PATCH v4] " Tomasz Lis
2018-07-09 13:48     ` Lionel Landwerlin
2018-07-09 14:03       ` Lis, Tomasz
2018-07-09 14:24         ` Lionel Landwerlin
2018-07-09 15:21           ` Lis, Tomasz
2018-07-09 16:28     ` Tvrtko Ursulin
2018-07-09 16:37       ` Chris Wilson
2018-07-10 17:32         ` Lis, Tomasz
2018-07-11  9:28           ` Tvrtko Ursulin
2018-07-10 18:03       ` Lis, Tomasz
2018-07-11 11:20         ` Lis, Tomasz
2018-07-12 15:10   ` [PATCH v5] " Tomasz Lis
2018-07-13 10:40     ` Tvrtko Ursulin
2018-07-13 17:44       ` Lis, Tomasz
2018-10-09 18:06   ` [PATCH v6] " Tomasz Lis
2018-10-10  7:29     ` Tvrtko Ursulin
2018-10-12 15:02   ` [PATCH v8] " Tomasz Lis
2018-10-15 12:52     ` Tvrtko Ursulin
2018-10-16 13:59     ` Joonas Lahtinen
2018-03-19 13:53 ` [RFC v1] Data port coherency control for UMDs Joonas Lahtinen
2018-03-19 16:09   ` Lis, Tomasz
2018-03-20 15:15   ` Dunajski, Bartosz
2018-03-21 10:02     ` Joonas Lahtinen
2018-03-26  9:46       ` Dunajski, Bartosz
2018-03-29  7:42         ` Joonas Lahtinen
2018-03-30  9:00           ` Dunajski, Bartosz
2018-04-04  9:18             ` Joonas Lahtinen
2018-04-11  9:15               ` Dunajski, Bartosz
2018-03-19 14:18 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency Patchwork
2018-03-19 14:34 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-19 16:48 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-03-30 18:14 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev2) Patchwork
2018-03-30 18:30 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-30 19:59 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-04-11 16:12 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev3) Patchwork
2018-04-11 16:29 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-11 20:02 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-06-20 15:45 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev4) Patchwork
2018-06-20 16:00 ` ✓ Fi.CI.BAT: success " Patchwork
2018-06-20 21:01 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-07-09 13:57 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev5) Patchwork
2018-07-09 13:58 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-07-09 14:14 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-09 20:04 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-07-12 15:18 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev6) Patchwork
2018-07-12 15:19 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-07-12 15:34 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-09 18:27 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev7) Patchwork
2018-10-09 18:28 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-09 18:52 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-09 21:44 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-10-12 15:14 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add Exec param to control data port coherency. (rev8) Patchwork
2018-10-12 15:15 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-12 15:34 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-12 18:27 ` ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ced25d42-a84e-debb-0cae-5a4b5a2d134a@intel.com \
    --to=oscar.mateo@intel.com \
    --cc=bartosz.dunajski@intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=tomasz.lis@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.