From: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> To: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>, Jonathan Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, Prashant Gaikwad <pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, Michael Turquette <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>, Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>, Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Vinod Koul <vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: [PATCH v1 0/5] NVIDIA Tegra AHB DMA controller driver Date: Tue, 26 Sep 2017 02:22:01 +0300 [thread overview] Message-ID: <cover.1506380746.git.digetx@gmail.com> (raw) NVIDIA Tegra20/30 SoC's have AHB DMA controller. It has 4 DMA channels, supports AHB <-> Memory and Memory <-> Memory transfers, slave / master modes. This driver is primarily supposed to be used by gpu/host1x in a master mode, performing 3D HW context stores. Dmitry Osipenko (5): clk: tegra: Add AHB DMA clock entry clk: tegra: Bump SCLK clock rate to 216MHz on Tegra20 dt-bindings: Add DT bindings for NVIDIA Tegra AHB DMA controller dmaengine: Add driver for NVIDIA Tegra AHB DMA controller ARM: dts: tegra: Add AHB DMA controller nodes .../bindings/dma/nvidia,tegra20-ahbdma.txt | 23 + arch/arm/boot/dts/tegra20.dtsi | 9 + arch/arm/boot/dts/tegra30.dtsi | 9 + drivers/clk/tegra/clk-id.h | 1 + drivers/clk/tegra/clk-tegra-periph.c | 1 + drivers/clk/tegra/clk-tegra20.c | 8 +- drivers/clk/tegra/clk-tegra30.c | 2 + drivers/dma/Kconfig | 9 + drivers/dma/Makefile | 1 + drivers/dma/tegra20-ahb-dma.c | 679 +++++++++++++++++++++ 10 files changed, 741 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt create mode 100644 drivers/dma/tegra20-ahb-dma.c -- 2.14.1
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Laxman Dewangan <ldewangan@nvidia.com>, Peter De Schrijver <pdeschrijver@nvidia.com>, Prashant Gaikwad <pgaikwad@nvidia.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@codeaurora.org>, Rob Herring <robh+dt@kernel.org>, Vinod Koul <vinod.koul@intel.com> Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 0/5] NVIDIA Tegra AHB DMA controller driver Date: Tue, 26 Sep 2017 02:22:01 +0300 [thread overview] Message-ID: <cover.1506380746.git.digetx@gmail.com> (raw) NVIDIA Tegra20/30 SoC's have AHB DMA controller. It has 4 DMA channels, supports AHB <-> Memory and Memory <-> Memory transfers, slave / master modes. This driver is primarily supposed to be used by gpu/host1x in a master mode, performing 3D HW context stores. Dmitry Osipenko (5): clk: tegra: Add AHB DMA clock entry clk: tegra: Bump SCLK clock rate to 216MHz on Tegra20 dt-bindings: Add DT bindings for NVIDIA Tegra AHB DMA controller dmaengine: Add driver for NVIDIA Tegra AHB DMA controller ARM: dts: tegra: Add AHB DMA controller nodes .../bindings/dma/nvidia,tegra20-ahbdma.txt | 23 + arch/arm/boot/dts/tegra20.dtsi | 9 + arch/arm/boot/dts/tegra30.dtsi | 9 + drivers/clk/tegra/clk-id.h | 1 + drivers/clk/tegra/clk-tegra-periph.c | 1 + drivers/clk/tegra/clk-tegra20.c | 8 +- drivers/clk/tegra/clk-tegra30.c | 2 + drivers/dma/Kconfig | 9 + drivers/dma/Makefile | 1 + drivers/dma/tegra20-ahb-dma.c | 679 +++++++++++++++++++++ 10 files changed, 741 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt create mode 100644 drivers/dma/tegra20-ahb-dma.c -- 2.14.1
next reply other threads:[~2017-09-25 23:22 UTC|newest] Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-09-25 23:22 Dmitry Osipenko [this message] 2017-09-25 23:22 ` [PATCH v1 0/5] NVIDIA Tegra AHB DMA controller driver Dmitry Osipenko 2017-09-25 23:22 ` [PATCH v1 1/5] clk: tegra: Add AHB DMA clock entry Dmitry Osipenko 2017-09-26 9:56 ` Peter De Schrijver 2017-09-26 9:56 ` Peter De Schrijver 2017-09-26 14:46 ` Dmitry Osipenko 2017-09-27 8:36 ` Peter De Schrijver 2017-09-27 8:36 ` Peter De Schrijver 2017-09-27 9:41 ` Dmitry Osipenko 2017-09-25 23:22 ` [PATCH v1 2/5] clk: tegra: Bump SCLK clock rate to 216MHz on Tegra20 Dmitry Osipenko 2017-09-26 10:01 ` Peter De Schrijver 2017-09-26 10:01 ` Peter De Schrijver 2017-09-25 23:22 ` [PATCH v1 4/5] dmaengine: Add driver for NVIDIA Tegra AHB DMA controller Dmitry Osipenko 2017-09-26 14:45 ` Jon Hunter 2017-09-26 14:45 ` Jon Hunter [not found] ` <481add20-9cea-a91a-e72c-45a824362e64-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-09-26 16:06 ` Dmitry Osipenko 2017-09-26 16:06 ` Dmitry Osipenko 2017-09-26 21:37 ` Jon Hunter 2017-09-26 21:37 ` Jon Hunter [not found] ` <8fa6108d-421d-8054-c05c-9681a0e25518-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-09-26 23:00 ` Dmitry Osipenko 2017-09-26 23:00 ` Dmitry Osipenko 2017-09-28 9:29 ` Vinod Koul 2017-09-28 12:17 ` Dmitry Osipenko 2017-09-28 12:17 ` Dmitry Osipenko 2017-09-28 14:06 ` Dmitry Osipenko 2017-09-28 14:06 ` Dmitry Osipenko 2017-09-28 14:35 ` Dmitry Osipenko [not found] ` <260fa409-0d07-ec9e-9e3b-fb08255026d8-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2017-09-28 16:22 ` Vinod Koul 2017-09-28 16:22 ` Vinod Koul 2017-09-28 16:37 ` Dmitry Osipenko 2017-09-28 16:37 ` Dmitry Osipenko 2017-09-28 16:21 ` Vinod Koul [not found] ` <cover.1506380746.git.digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2017-09-25 23:22 ` [PATCH v1 3/5] dt-bindings: Add DT bindings " Dmitry Osipenko 2017-09-25 23:22 ` Dmitry Osipenko 2017-09-26 14:50 ` Jon Hunter 2017-09-26 14:50 ` Jon Hunter 2017-09-26 15:16 ` Dmitry Osipenko [not found] ` <bee2a524-0891-01e1-4e03-f6cf6a89e6b1-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-09-27 1:57 ` Dmitry Osipenko 2017-09-27 1:57 ` Dmitry Osipenko 2017-09-27 8:34 ` Jon Hunter 2017-09-27 8:34 ` Jon Hunter 2017-09-27 12:12 ` Dmitry Osipenko [not found] ` <69ea8dec-db7a-fcfa-6fa7-ea70de4c9ef4-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2017-09-27 13:44 ` Jon Hunter 2017-09-27 13:44 ` Jon Hunter 2017-09-27 13:46 ` Jon Hunter 2017-09-27 13:46 ` Jon Hunter [not found] ` <432fff47-6750-08c4-a91d-1a5d154245bc-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-09-27 14:29 ` Dmitry Osipenko 2017-09-27 14:29 ` Dmitry Osipenko 2017-09-27 23:32 ` Stephen Boyd 2017-09-28 8:33 ` Jon Hunter 2017-09-28 8:33 ` Jon Hunter [not found] ` <0fd316e9-3584-e9bd-2a8b-e73eaa6a9a48-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-09-29 19:30 ` Stephen Warren 2017-09-29 19:30 ` Stephen Warren 2017-09-30 3:11 ` Dmitry Osipenko 2017-10-02 17:05 ` Stephen Warren 2017-10-02 23:02 ` Dmitry Osipenko 2017-10-03 10:32 ` Jon Hunter 2017-10-03 10:32 ` Jon Hunter 2017-10-03 10:32 ` Jon Hunter [not found] ` <4443a8fb-7a4d-922b-2dd3-53236d39a050-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-10-03 12:07 ` Dmitry Osipenko 2017-10-03 12:07 ` Dmitry Osipenko 2017-10-03 12:19 ` Jon Hunter 2017-10-03 12:19 ` Jon Hunter 2017-10-03 12:19 ` Jon Hunter 2017-10-03 15:38 ` Stephen Warren 2017-10-03 17:04 ` Dmitry Osipenko [not found] ` <604d92036e0936443290e68a2226f935fb348113.1506380746.git.digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2017-10-05 20:33 ` Rob Herring 2017-10-05 20:33 ` Rob Herring 2017-10-05 21:30 ` Dmitry Osipenko 2017-09-25 23:22 ` [PATCH v1 5/5] ARM: dts: tegra: Add AHB DMA controller nodes Dmitry Osipenko 2017-09-25 23:22 ` Dmitry Osipenko 2017-09-28 9:31 ` [PATCH v1 0/5] NVIDIA Tegra AHB DMA controller driver Vinod Koul 2017-09-28 12:24 ` Dmitry Osipenko
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