From: Mauro Carvalho Chehab <mchehab@kernel.org>
To: unlisted-recipients:; (no To-header on input)
Cc: "Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Andi Shyti" <andi.shyti@linux.intel.com>,
"Bruce Chang" <yu.bruce.chang@intel.com>,
"Chris Wilson" <chris.p.wilson@intel.com>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Daniele Ceraolo Spurio" <daniele.ceraolospurio@intel.com>,
"Dave Airlie" <airlied@redhat.com>,
"David Airlie" <airlied@linux.ie>,
"Jani Nikula" <jani.nikula@linux.intel.com>,
"Jason Ekstrand" <jason@jlekstrand.net>,
"John Harrison" <John.C.Harrison@Intel.com>,
"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Matt Roper" <matthew.d.roper@intel.com>,
"Matthew Auld" <matthew.auld@intel.com>,
"Matthew Brost" <matthew.brost@intel.com>,
"Oak Zeng" <oak.zeng@intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Tejas Upadhyay" <tejaskumarx.surendrakumar.upadhyay@intel.com>,
"Tvrtko Ursulin" <tvrtko.ursulin@linux.intel.com>,
"Umesh Nerlige Ramappa" <umesh.nerlige.ramappa@intel.com>,
dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 0/3] Fix TLB invalidate issues with Broadwell
Date: Wed, 29 Jun 2022 16:25:23 +0100 [thread overview]
Message-ID: <cover.1656516220.git.mchehab@kernel.org> (raw)
i915 selftest hangcheck is causing the i915 driver timeouts, as reported
by Intel CI bot:
http://gfx-ci.fi.intel.com/cibuglog-ng/issuefilterassoc/24297?query_key=42a999f48fa6ecce068bc8126c069be7c31153b4
When such test runs, the only output is:
[ 68.811639] i915: Performing live selftests with st_random_seed=0xe138eac7 st_timeout=500
[ 68.811792] i915: Running hangcheck
[ 68.811859] i915: Running intel_hangcheck_live_selftests/igt_hang_sanitycheck
[ 68.816910] i915 0000:00:02.0: [drm] Cannot find any crtc or sizes
[ 68.841597] i915: Running intel_hangcheck_live_selftests/igt_reset_nop
[ 69.346347] igt_reset_nop: 80 resets
[ 69.362695] i915: Running intel_hangcheck_live_selftests/igt_reset_nop_engine
[ 69.863559] igt_reset_nop_engine(rcs0): 709 resets
[ 70.364924] igt_reset_nop_engine(bcs0): 903 resets
[ 70.866005] igt_reset_nop_engine(vcs0): 659 resets
[ 71.367934] igt_reset_nop_engine(vcs1): 549 resets
[ 71.869259] igt_reset_nop_engine(vecs0): 553 resets
[ 71.882592] i915: Running intel_hangcheck_live_selftests/igt_reset_idle_engine
[ 72.383554] rcs0: Completed 16605 idle resets
[ 72.884599] bcs0: Completed 18641 idle resets
[ 73.385592] vcs0: Completed 17517 idle resets
[ 73.886658] vcs1: Completed 15474 idle resets
[ 74.387600] vecs0: Completed 17983 idle resets
[ 74.387667] i915: Running intel_hangcheck_live_selftests/igt_reset_active_engine
[ 74.889017] rcs0: Completed 747 active resets
[ 75.174240] intel_engine_reset(bcs0) failed, err:-110
[ 75.174301] bcs0: Completed 525 active resets
After that, the machine just silently hangs.
Bisecting the issue, the patch that introduced the regression is:
7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
Reverting it fix the issues, but introduce other problems, as TLB
won't be invalidated anymore. So, instead, let's fix the root cause.
It turns that the TLB flush logic ends conflicting with i915 reset,
which is called during selftest hangcheck. So, the TLB cache should
be serialized, but other TLB fix patches are required for this one
to work.
Tested on an Intel NUC5i7RYB with an i7-5557U Broadwell CPU.
v2:
- Reduced to bare minimum fixes, as this shoud be backported deeply
into stable.
Chris Wilson (3):
drm/i915/gt: Ignore TLB invalidations on idle engines
drm/i915/gt: Serialize GRDOM access between multiple engine resets
drm/i915/gt: Serialize TLB invalidates with GT resets
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 10 +++---
drivers/gpu/drm/i915/gt/intel_gt.c | 30 +++++++++++++-----
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 3 ++
drivers/gpu/drm/i915/gt/intel_reset.c | 37 +++++++++++++++++------
4 files changed, 60 insertions(+), 20 deletions(-)
--
2.36.1
WARNING: multiple messages have this Message-ID (diff)
From: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: "David Airlie" <airlied@linux.ie>,
dri-devel@lists.freedesktop.org,
"Daniele Ceraolo Spurio" <daniele.ceraolospurio@intel.com>,
"Jason Ekstrand" <jason@jlekstrand.net>,
"Matthew Brost" <matthew.brost@intel.com>,
"Chris Wilson" <chris.p.wilson@intel.com>,
"Matthew Auld" <matthew.auld@intel.com>,
"Andi Shyti" <andi.shyti@linux.intel.com>,
"Dave Airlie" <airlied@redhat.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
intel-gfx@lists.freedesktop.org, "Oak Zeng" <oak.zeng@intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Tvrtko Ursulin" <tvrtko.ursulin@linux.intel.com>,
linux-kernel@vger.kernel.org,
"Bruce Chang" <yu.bruce.chang@intel.com>,
"Tejas Upadhyay" <tejaskumarx.surendrakumar.upadhyay@intel.com>,
"Umesh Nerlige Ramappa" <umesh.nerlige.ramappa@intel.com>,
"John Harrison" <John.C.Harrison@Intel.com>
Subject: [PATCH v2 0/3] Fix TLB invalidate issues with Broadwell
Date: Wed, 29 Jun 2022 16:25:23 +0100 [thread overview]
Message-ID: <cover.1656516220.git.mchehab@kernel.org> (raw)
i915 selftest hangcheck is causing the i915 driver timeouts, as reported
by Intel CI bot:
http://gfx-ci.fi.intel.com/cibuglog-ng/issuefilterassoc/24297?query_key=42a999f48fa6ecce068bc8126c069be7c31153b4
When such test runs, the only output is:
[ 68.811639] i915: Performing live selftests with st_random_seed=0xe138eac7 st_timeout=500
[ 68.811792] i915: Running hangcheck
[ 68.811859] i915: Running intel_hangcheck_live_selftests/igt_hang_sanitycheck
[ 68.816910] i915 0000:00:02.0: [drm] Cannot find any crtc or sizes
[ 68.841597] i915: Running intel_hangcheck_live_selftests/igt_reset_nop
[ 69.346347] igt_reset_nop: 80 resets
[ 69.362695] i915: Running intel_hangcheck_live_selftests/igt_reset_nop_engine
[ 69.863559] igt_reset_nop_engine(rcs0): 709 resets
[ 70.364924] igt_reset_nop_engine(bcs0): 903 resets
[ 70.866005] igt_reset_nop_engine(vcs0): 659 resets
[ 71.367934] igt_reset_nop_engine(vcs1): 549 resets
[ 71.869259] igt_reset_nop_engine(vecs0): 553 resets
[ 71.882592] i915: Running intel_hangcheck_live_selftests/igt_reset_idle_engine
[ 72.383554] rcs0: Completed 16605 idle resets
[ 72.884599] bcs0: Completed 18641 idle resets
[ 73.385592] vcs0: Completed 17517 idle resets
[ 73.886658] vcs1: Completed 15474 idle resets
[ 74.387600] vecs0: Completed 17983 idle resets
[ 74.387667] i915: Running intel_hangcheck_live_selftests/igt_reset_active_engine
[ 74.889017] rcs0: Completed 747 active resets
[ 75.174240] intel_engine_reset(bcs0) failed, err:-110
[ 75.174301] bcs0: Completed 525 active resets
After that, the machine just silently hangs.
Bisecting the issue, the patch that introduced the regression is:
7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
Reverting it fix the issues, but introduce other problems, as TLB
won't be invalidated anymore. So, instead, let's fix the root cause.
It turns that the TLB flush logic ends conflicting with i915 reset,
which is called during selftest hangcheck. So, the TLB cache should
be serialized, but other TLB fix patches are required for this one
to work.
Tested on an Intel NUC5i7RYB with an i7-5557U Broadwell CPU.
v2:
- Reduced to bare minimum fixes, as this shoud be backported deeply
into stable.
Chris Wilson (3):
drm/i915/gt: Ignore TLB invalidations on idle engines
drm/i915/gt: Serialize GRDOM access between multiple engine resets
drm/i915/gt: Serialize TLB invalidates with GT resets
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 10 +++---
drivers/gpu/drm/i915/gt/intel_gt.c | 30 +++++++++++++-----
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 3 ++
drivers/gpu/drm/i915/gt/intel_reset.c | 37 +++++++++++++++++------
4 files changed, 60 insertions(+), 20 deletions(-)
--
2.36.1
WARNING: multiple messages have this Message-ID (diff)
From: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: "David Airlie" <airlied@linux.ie>,
dri-devel@lists.freedesktop.org,
"Chris Wilson" <chris.p.wilson@intel.com>,
"Matthew Auld" <matthew.auld@intel.com>,
"Dave Airlie" <airlied@redhat.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
intel-gfx@lists.freedesktop.org,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
linux-kernel@vger.kernel.org,
"Tejas Upadhyay" <tejaskumarx.surendrakumar.upadhyay@intel.com>
Subject: [Intel-gfx] [PATCH v2 0/3] Fix TLB invalidate issues with Broadwell
Date: Wed, 29 Jun 2022 16:25:23 +0100 [thread overview]
Message-ID: <cover.1656516220.git.mchehab@kernel.org> (raw)
i915 selftest hangcheck is causing the i915 driver timeouts, as reported
by Intel CI bot:
http://gfx-ci.fi.intel.com/cibuglog-ng/issuefilterassoc/24297?query_key=42a999f48fa6ecce068bc8126c069be7c31153b4
When such test runs, the only output is:
[ 68.811639] i915: Performing live selftests with st_random_seed=0xe138eac7 st_timeout=500
[ 68.811792] i915: Running hangcheck
[ 68.811859] i915: Running intel_hangcheck_live_selftests/igt_hang_sanitycheck
[ 68.816910] i915 0000:00:02.0: [drm] Cannot find any crtc or sizes
[ 68.841597] i915: Running intel_hangcheck_live_selftests/igt_reset_nop
[ 69.346347] igt_reset_nop: 80 resets
[ 69.362695] i915: Running intel_hangcheck_live_selftests/igt_reset_nop_engine
[ 69.863559] igt_reset_nop_engine(rcs0): 709 resets
[ 70.364924] igt_reset_nop_engine(bcs0): 903 resets
[ 70.866005] igt_reset_nop_engine(vcs0): 659 resets
[ 71.367934] igt_reset_nop_engine(vcs1): 549 resets
[ 71.869259] igt_reset_nop_engine(vecs0): 553 resets
[ 71.882592] i915: Running intel_hangcheck_live_selftests/igt_reset_idle_engine
[ 72.383554] rcs0: Completed 16605 idle resets
[ 72.884599] bcs0: Completed 18641 idle resets
[ 73.385592] vcs0: Completed 17517 idle resets
[ 73.886658] vcs1: Completed 15474 idle resets
[ 74.387600] vecs0: Completed 17983 idle resets
[ 74.387667] i915: Running intel_hangcheck_live_selftests/igt_reset_active_engine
[ 74.889017] rcs0: Completed 747 active resets
[ 75.174240] intel_engine_reset(bcs0) failed, err:-110
[ 75.174301] bcs0: Completed 525 active resets
After that, the machine just silently hangs.
Bisecting the issue, the patch that introduced the regression is:
7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
Reverting it fix the issues, but introduce other problems, as TLB
won't be invalidated anymore. So, instead, let's fix the root cause.
It turns that the TLB flush logic ends conflicting with i915 reset,
which is called during selftest hangcheck. So, the TLB cache should
be serialized, but other TLB fix patches are required for this one
to work.
Tested on an Intel NUC5i7RYB with an i7-5557U Broadwell CPU.
v2:
- Reduced to bare minimum fixes, as this shoud be backported deeply
into stable.
Chris Wilson (3):
drm/i915/gt: Ignore TLB invalidations on idle engines
drm/i915/gt: Serialize GRDOM access between multiple engine resets
drm/i915/gt: Serialize TLB invalidates with GT resets
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 10 +++---
drivers/gpu/drm/i915/gt/intel_gt.c | 30 +++++++++++++-----
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 3 ++
drivers/gpu/drm/i915/gt/intel_reset.c | 37 +++++++++++++++++------
4 files changed, 60 insertions(+), 20 deletions(-)
--
2.36.1
next reply other threads:[~2022-06-29 15:25 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-29 15:25 Mauro Carvalho Chehab [this message]
2022-06-29 15:25 ` [Intel-gfx] [PATCH v2 0/3] Fix TLB invalidate issues with Broadwell Mauro Carvalho Chehab
2022-06-29 15:25 ` Mauro Carvalho Chehab
2022-06-29 15:25 ` [PATCH v2 1/3] drm/i915/gt: Ignore TLB invalidations on idle engines Mauro Carvalho Chehab
2022-06-29 15:25 ` [Intel-gfx] " Mauro Carvalho Chehab
2022-06-29 15:25 ` Mauro Carvalho Chehab
2022-06-29 15:25 ` [PATCH v2 2/3] drm/i915/gt: Serialize GRDOM access between multiple engine resets Mauro Carvalho Chehab
2022-06-29 15:25 ` [Intel-gfx] " Mauro Carvalho Chehab
2022-06-29 15:25 ` Mauro Carvalho Chehab
2022-06-29 15:25 ` [PATCH v2 3/3] drm/i915/gt: Serialize TLB invalidates with GT resets Mauro Carvalho Chehab
2022-06-29 15:25 ` [Intel-gfx] " Mauro Carvalho Chehab
2022-06-29 15:25 ` Mauro Carvalho Chehab
2022-06-29 16:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix TLB invalidate issues with Broadwell (rev2) Patchwork
2022-06-29 16:08 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-06-29 16:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-06-30 5:48 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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