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From: Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
To: Martin Blumenstingl
	<martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>,
	jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	knaack.h-Mmb7MZpHnFY@public.gmane.org,
	lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org,
	pmeerw-jW+XmwGofnusTnJN9+BGXg@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
	linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org,
	catalin.marinas-5wv7dgnIgG8@public.gmane.org,
	will.deacon-5wv7dgnIgG8@public.gmane.org,
	mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
	sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v2 0/4] Amlogic Meson SAR ADC support
Date: Mon, 16 Jan 2017 11:18:04 +0100	[thread overview]
Message-ID: <d00b365e-0e12-5679-c295-6c38850cc2b9@baylibre.com> (raw)
In-Reply-To: <20170115224221.15510-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>

On 01/15/2017 11:42 PM, Martin Blumenstingl wrote:
> This series add support for the SAR ADC on Amlogic Meson GXBB, GXL and
> GXM SoCs.
> The hardware on GXBB provides 10-bit ADC results, while GXL and GXM are
> providing 12-bit results. Support for older SoCs (Meson8b and Meson8)
> can be added with little effort, most of which is testing I guess (I
> don't have any pre-GXBB hardware so I can't say).
> 
> A new set of clocks had to be added to the GXBB clock controller (used
> by the GXBB/GXL/GXM SoCs) which are required to get the ADC working.
> 
> The ADC itself can sample multiple channels at the same time and allows
> capturing multiple samples (which can be used for filtering/averaging).
> The ADC results are stored inside a FIFO register. More details on what
> the driver supports (or doesn't) can be found in the description of
> patch #3.
> 
> The code is based on the public S805 (Meson8b) and S905 (GXBB)
> datasheets, as well as by reading (various versions of) the vendor
> driver and by inspecting the registers on the vendor kernels of my
> testing-hardware.
> 
> Typical use-cases for the ADC on the Meson GX SoCs are:
> - adc-keys ("ADC attached resistor ladder buttons")
> - SoC temperature measurement (not supported by this driver yet as
>   the system firmware does this already and provides the values via the
>   SCPI protocol)
> - "version-strapping" (different resistor values are used to indicate
>   the board-revision)
> - and of course typical ADC measurements
> 
> Thanks to Heiner Kallweit, Jonathan Cameron and Lars-Peter Clausen for
> reviewing this series and providing valuable input!
> 
> Changes since v1 (all changes are for patch #3, except where noted):
> - fix IRQ number in meson-gx.dtsi (thanks to Heiner Kallweit for
>   providing the correct value), affects patch #4
> - move the most used members of meson_saradc_priv to the beginning
> - remove unused struct member "completion" from meson_saradc_priv
> - use devm_kasprintf() instead of snprintf() + devm_kstrdup()
> - initialize indio_dev->dev.parent earlier in meson_saradc_probe()
> - moved meson_saradc_clear_fifo() logic to a separate function
> - add comment why a do ... while loop is required in
>   meson_saradc_wait_busy_clear()
> - remove SAR_ADC_NUM_CHANNELS and SAR_ADC_VALUE_MASK macros (each of them
>   was only used once and it's an unneeded level of abstraction)
> - fixed multiline comment syntax violations
> - dropped unneeded log messages during initialization
> - set iio_dev name to "meson-gxbb-saradc" or "meson-gxl-saradc"
> - use "indio_dev->dev.parent" in all kernel log calls (dev_warn/err/etc)
>   to make it show the OF node name (instead of the iio device name)
> - introduce struct meson_saradc_data to hold platform-specific
>   information (such as resolution in bits and the iio_dev name)
> 
> 
> Martin Blumenstingl (4):
>   Documentation: dt-bindings: add the Amlogic Meson SAR ADC
>     documentation
>   clk: gxbb: add the SAR ADC clocks and expose them
>   iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs
>   ARM64: dts: meson: meson-gx: add the SAR ADC
> 
>  .../bindings/iio/adc/amlogic,meson-saradc.txt      |  31 +
>  arch/arm64/boot/dts/amlogic/meson-gx.dtsi          |   8 +
>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        |  10 +
>  arch/arm64/boot/dts/amlogic/meson-gxl.dtsi         |  10 +
>  drivers/clk/meson/gxbb.c                           |  48 ++
>  drivers/clk/meson/gxbb.h                           |   9 +-
>  drivers/iio/adc/Kconfig                            |  12 +
>  drivers/iio/adc/Makefile                           |   1 +
>  drivers/iio/adc/meson_saradc.c                     | 893 +++++++++++++++++++++
>  include/dt-bindings/clock/gxbb-clkc.h              |   4 +
>  10 files changed, 1023 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
>  create mode 100644 drivers/iio/adc/meson_saradc.c
> 

Good work martin !

Tested on the P200 board with the resistor ladderred key matrix, patch will be posted shortly.

For all the serie :
Tested-by: Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
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WARNING: multiple messages have this Message-ID (diff)
From: Neil Armstrong <narmstrong@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de,
	pmeerw@pmeerw.net, robh+dt@kernel.org, mark.rutland@arm.com,
	khilman@baylibre.com, linux-iio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-clk@vger.kernel.org
Cc: carlo@caione.org, catalin.marinas@arm.com, will.deacon@arm.com,
	mturquette@baylibre.com, sboyd@codeaurora.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/4] Amlogic Meson SAR ADC support
Date: Mon, 16 Jan 2017 11:18:04 +0100	[thread overview]
Message-ID: <d00b365e-0e12-5679-c295-6c38850cc2b9@baylibre.com> (raw)
In-Reply-To: <20170115224221.15510-1-martin.blumenstingl@googlemail.com>

On 01/15/2017 11:42 PM, Martin Blumenstingl wrote:
> This series add support for the SAR ADC on Amlogic Meson GXBB, GXL and
> GXM SoCs.
> The hardware on GXBB provides 10-bit ADC results, while GXL and GXM are
> providing 12-bit results. Support for older SoCs (Meson8b and Meson8)
> can be added with little effort, most of which is testing I guess (I
> don't have any pre-GXBB hardware so I can't say).
> 
> A new set of clocks had to be added to the GXBB clock controller (used
> by the GXBB/GXL/GXM SoCs) which are required to get the ADC working.
> 
> The ADC itself can sample multiple channels at the same time and allows
> capturing multiple samples (which can be used for filtering/averaging).
> The ADC results are stored inside a FIFO register. More details on what
> the driver supports (or doesn't) can be found in the description of
> patch #3.
> 
> The code is based on the public S805 (Meson8b) and S905 (GXBB)
> datasheets, as well as by reading (various versions of) the vendor
> driver and by inspecting the registers on the vendor kernels of my
> testing-hardware.
> 
> Typical use-cases for the ADC on the Meson GX SoCs are:
> - adc-keys ("ADC attached resistor ladder buttons")
> - SoC temperature measurement (not supported by this driver yet as
>   the system firmware does this already and provides the values via the
>   SCPI protocol)
> - "version-strapping" (different resistor values are used to indicate
>   the board-revision)
> - and of course typical ADC measurements
> 
> Thanks to Heiner Kallweit, Jonathan Cameron and Lars-Peter Clausen for
> reviewing this series and providing valuable input!
> 
> Changes since v1 (all changes are for patch #3, except where noted):
> - fix IRQ number in meson-gx.dtsi (thanks to Heiner Kallweit for
>   providing the correct value), affects patch #4
> - move the most used members of meson_saradc_priv to the beginning
> - remove unused struct member "completion" from meson_saradc_priv
> - use devm_kasprintf() instead of snprintf() + devm_kstrdup()
> - initialize indio_dev->dev.parent earlier in meson_saradc_probe()
> - moved meson_saradc_clear_fifo() logic to a separate function
> - add comment why a do ... while loop is required in
>   meson_saradc_wait_busy_clear()
> - remove SAR_ADC_NUM_CHANNELS and SAR_ADC_VALUE_MASK macros (each of them
>   was only used once and it's an unneeded level of abstraction)
> - fixed multiline comment syntax violations
> - dropped unneeded log messages during initialization
> - set iio_dev name to "meson-gxbb-saradc" or "meson-gxl-saradc"
> - use "indio_dev->dev.parent" in all kernel log calls (dev_warn/err/etc)
>   to make it show the OF node name (instead of the iio device name)
> - introduce struct meson_saradc_data to hold platform-specific
>   information (such as resolution in bits and the iio_dev name)
> 
> 
> Martin Blumenstingl (4):
>   Documentation: dt-bindings: add the Amlogic Meson SAR ADC
>     documentation
>   clk: gxbb: add the SAR ADC clocks and expose them
>   iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs
>   ARM64: dts: meson: meson-gx: add the SAR ADC
> 
>  .../bindings/iio/adc/amlogic,meson-saradc.txt      |  31 +
>  arch/arm64/boot/dts/amlogic/meson-gx.dtsi          |   8 +
>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        |  10 +
>  arch/arm64/boot/dts/amlogic/meson-gxl.dtsi         |  10 +
>  drivers/clk/meson/gxbb.c                           |  48 ++
>  drivers/clk/meson/gxbb.h                           |   9 +-
>  drivers/iio/adc/Kconfig                            |  12 +
>  drivers/iio/adc/Makefile                           |   1 +
>  drivers/iio/adc/meson_saradc.c                     | 893 +++++++++++++++++++++
>  include/dt-bindings/clock/gxbb-clkc.h              |   4 +
>  10 files changed, 1023 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
>  create mode 100644 drivers/iio/adc/meson_saradc.c
> 

Good work martin !

Tested on the P200 board with the resistor ladderred key matrix, patch will be posted shortly.

For all the serie :
Tested-by: Neil Armstrong <narmstrong@baylibre.com>

WARNING: multiple messages have this Message-ID (diff)
From: narmstrong@baylibre.com (Neil Armstrong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/4] Amlogic Meson SAR ADC support
Date: Mon, 16 Jan 2017 11:18:04 +0100	[thread overview]
Message-ID: <d00b365e-0e12-5679-c295-6c38850cc2b9@baylibre.com> (raw)
In-Reply-To: <20170115224221.15510-1-martin.blumenstingl@googlemail.com>

On 01/15/2017 11:42 PM, Martin Blumenstingl wrote:
> This series add support for the SAR ADC on Amlogic Meson GXBB, GXL and
> GXM SoCs.
> The hardware on GXBB provides 10-bit ADC results, while GXL and GXM are
> providing 12-bit results. Support for older SoCs (Meson8b and Meson8)
> can be added with little effort, most of which is testing I guess (I
> don't have any pre-GXBB hardware so I can't say).
> 
> A new set of clocks had to be added to the GXBB clock controller (used
> by the GXBB/GXL/GXM SoCs) which are required to get the ADC working.
> 
> The ADC itself can sample multiple channels at the same time and allows
> capturing multiple samples (which can be used for filtering/averaging).
> The ADC results are stored inside a FIFO register. More details on what
> the driver supports (or doesn't) can be found in the description of
> patch #3.
> 
> The code is based on the public S805 (Meson8b) and S905 (GXBB)
> datasheets, as well as by reading (various versions of) the vendor
> driver and by inspecting the registers on the vendor kernels of my
> testing-hardware.
> 
> Typical use-cases for the ADC on the Meson GX SoCs are:
> - adc-keys ("ADC attached resistor ladder buttons")
> - SoC temperature measurement (not supported by this driver yet as
>   the system firmware does this already and provides the values via the
>   SCPI protocol)
> - "version-strapping" (different resistor values are used to indicate
>   the board-revision)
> - and of course typical ADC measurements
> 
> Thanks to Heiner Kallweit, Jonathan Cameron and Lars-Peter Clausen for
> reviewing this series and providing valuable input!
> 
> Changes since v1 (all changes are for patch #3, except where noted):
> - fix IRQ number in meson-gx.dtsi (thanks to Heiner Kallweit for
>   providing the correct value), affects patch #4
> - move the most used members of meson_saradc_priv to the beginning
> - remove unused struct member "completion" from meson_saradc_priv
> - use devm_kasprintf() instead of snprintf() + devm_kstrdup()
> - initialize indio_dev->dev.parent earlier in meson_saradc_probe()
> - moved meson_saradc_clear_fifo() logic to a separate function
> - add comment why a do ... while loop is required in
>   meson_saradc_wait_busy_clear()
> - remove SAR_ADC_NUM_CHANNELS and SAR_ADC_VALUE_MASK macros (each of them
>   was only used once and it's an unneeded level of abstraction)
> - fixed multiline comment syntax violations
> - dropped unneeded log messages during initialization
> - set iio_dev name to "meson-gxbb-saradc" or "meson-gxl-saradc"
> - use "indio_dev->dev.parent" in all kernel log calls (dev_warn/err/etc)
>   to make it show the OF node name (instead of the iio device name)
> - introduce struct meson_saradc_data to hold platform-specific
>   information (such as resolution in bits and the iio_dev name)
> 
> 
> Martin Blumenstingl (4):
>   Documentation: dt-bindings: add the Amlogic Meson SAR ADC
>     documentation
>   clk: gxbb: add the SAR ADC clocks and expose them
>   iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs
>   ARM64: dts: meson: meson-gx: add the SAR ADC
> 
>  .../bindings/iio/adc/amlogic,meson-saradc.txt      |  31 +
>  arch/arm64/boot/dts/amlogic/meson-gx.dtsi          |   8 +
>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        |  10 +
>  arch/arm64/boot/dts/amlogic/meson-gxl.dtsi         |  10 +
>  drivers/clk/meson/gxbb.c                           |  48 ++
>  drivers/clk/meson/gxbb.h                           |   9 +-
>  drivers/iio/adc/Kconfig                            |  12 +
>  drivers/iio/adc/Makefile                           |   1 +
>  drivers/iio/adc/meson_saradc.c                     | 893 +++++++++++++++++++++
>  include/dt-bindings/clock/gxbb-clkc.h              |   4 +
>  10 files changed, 1023 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
>  create mode 100644 drivers/iio/adc/meson_saradc.c
> 

Good work martin !

Tested on the P200 board with the resistor ladderred key matrix, patch will be posted shortly.

For all the serie :
Tested-by: Neil Armstrong <narmstrong@baylibre.com>

WARNING: multiple messages have this Message-ID (diff)
From: narmstrong@baylibre.com (Neil Armstrong)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v2 0/4] Amlogic Meson SAR ADC support
Date: Mon, 16 Jan 2017 11:18:04 +0100	[thread overview]
Message-ID: <d00b365e-0e12-5679-c295-6c38850cc2b9@baylibre.com> (raw)
In-Reply-To: <20170115224221.15510-1-martin.blumenstingl@googlemail.com>

On 01/15/2017 11:42 PM, Martin Blumenstingl wrote:
> This series add support for the SAR ADC on Amlogic Meson GXBB, GXL and
> GXM SoCs.
> The hardware on GXBB provides 10-bit ADC results, while GXL and GXM are
> providing 12-bit results. Support for older SoCs (Meson8b and Meson8)
> can be added with little effort, most of which is testing I guess (I
> don't have any pre-GXBB hardware so I can't say).
> 
> A new set of clocks had to be added to the GXBB clock controller (used
> by the GXBB/GXL/GXM SoCs) which are required to get the ADC working.
> 
> The ADC itself can sample multiple channels at the same time and allows
> capturing multiple samples (which can be used for filtering/averaging).
> The ADC results are stored inside a FIFO register. More details on what
> the driver supports (or doesn't) can be found in the description of
> patch #3.
> 
> The code is based on the public S805 (Meson8b) and S905 (GXBB)
> datasheets, as well as by reading (various versions of) the vendor
> driver and by inspecting the registers on the vendor kernels of my
> testing-hardware.
> 
> Typical use-cases for the ADC on the Meson GX SoCs are:
> - adc-keys ("ADC attached resistor ladder buttons")
> - SoC temperature measurement (not supported by this driver yet as
>   the system firmware does this already and provides the values via the
>   SCPI protocol)
> - "version-strapping" (different resistor values are used to indicate
>   the board-revision)
> - and of course typical ADC measurements
> 
> Thanks to Heiner Kallweit, Jonathan Cameron and Lars-Peter Clausen for
> reviewing this series and providing valuable input!
> 
> Changes since v1 (all changes are for patch #3, except where noted):
> - fix IRQ number in meson-gx.dtsi (thanks to Heiner Kallweit for
>   providing the correct value), affects patch #4
> - move the most used members of meson_saradc_priv to the beginning
> - remove unused struct member "completion" from meson_saradc_priv
> - use devm_kasprintf() instead of snprintf() + devm_kstrdup()
> - initialize indio_dev->dev.parent earlier in meson_saradc_probe()
> - moved meson_saradc_clear_fifo() logic to a separate function
> - add comment why a do ... while loop is required in
>   meson_saradc_wait_busy_clear()
> - remove SAR_ADC_NUM_CHANNELS and SAR_ADC_VALUE_MASK macros (each of them
>   was only used once and it's an unneeded level of abstraction)
> - fixed multiline comment syntax violations
> - dropped unneeded log messages during initialization
> - set iio_dev name to "meson-gxbb-saradc" or "meson-gxl-saradc"
> - use "indio_dev->dev.parent" in all kernel log calls (dev_warn/err/etc)
>   to make it show the OF node name (instead of the iio device name)
> - introduce struct meson_saradc_data to hold platform-specific
>   information (such as resolution in bits and the iio_dev name)
> 
> 
> Martin Blumenstingl (4):
>   Documentation: dt-bindings: add the Amlogic Meson SAR ADC
>     documentation
>   clk: gxbb: add the SAR ADC clocks and expose them
>   iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs
>   ARM64: dts: meson: meson-gx: add the SAR ADC
> 
>  .../bindings/iio/adc/amlogic,meson-saradc.txt      |  31 +
>  arch/arm64/boot/dts/amlogic/meson-gx.dtsi          |   8 +
>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        |  10 +
>  arch/arm64/boot/dts/amlogic/meson-gxl.dtsi         |  10 +
>  drivers/clk/meson/gxbb.c                           |  48 ++
>  drivers/clk/meson/gxbb.h                           |   9 +-
>  drivers/iio/adc/Kconfig                            |  12 +
>  drivers/iio/adc/Makefile                           |   1 +
>  drivers/iio/adc/meson_saradc.c                     | 893 +++++++++++++++++++++
>  include/dt-bindings/clock/gxbb-clkc.h              |   4 +
>  10 files changed, 1023 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
>  create mode 100644 drivers/iio/adc/meson_saradc.c
> 

Good work martin !

Tested on the P200 board with the resistor ladderred key matrix, patch will be posted shortly.

For all the serie :
Tested-by: Neil Armstrong <narmstrong@baylibre.com>

  parent reply	other threads:[~2017-01-16 10:18 UTC|newest]

Thread overview: 110+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-11 17:43 [PATCH 0/4] Amlogic Meson SAR ADC support Martin Blumenstingl
2017-01-11 17:43 ` Martin Blumenstingl
2017-01-11 17:43 ` Martin Blumenstingl
2017-01-11 17:43 ` Martin Blumenstingl
2017-01-11 17:43 ` [PATCH 3/4] iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs Martin Blumenstingl
2017-01-11 17:43   ` Martin Blumenstingl
2017-01-11 17:43   ` Martin Blumenstingl
2017-01-14 14:46   ` Jonathan Cameron
2017-01-14 14:46     ` Jonathan Cameron
2017-01-14 14:46     ` Jonathan Cameron
     [not found]     ` <870f8899-b3a1-153a-5953-88ac23ff6942-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2017-01-14 17:44       ` Martin Blumenstingl
2017-01-14 17:44         ` Martin Blumenstingl
2017-01-14 17:44         ` Martin Blumenstingl
2017-01-14 17:44         ` Martin Blumenstingl
2017-01-15 13:08         ` Jonathan Cameron
2017-01-15 13:08           ` Jonathan Cameron
2017-01-15 13:08           ` Jonathan Cameron
     [not found]   ` <20170111174334.24343-4-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-01-15 12:26     ` Lars-Peter Clausen
2017-01-15 12:26       ` Lars-Peter Clausen
2017-01-15 12:26       ` Lars-Peter Clausen
2017-01-15 12:26       ` Lars-Peter Clausen
2017-01-15 13:09       ` Jonathan Cameron
2017-01-15 13:09         ` Jonathan Cameron
2017-01-15 13:09         ` Jonathan Cameron
2017-01-11 17:43 ` [PATCH 4/4] ARM64: dts: meson: meson-gx: add the SAR ADC Martin Blumenstingl
2017-01-11 17:43   ` Martin Blumenstingl
2017-01-11 17:43   ` Martin Blumenstingl
     [not found] ` <20170111174334.24343-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-01-11 17:43   ` [PATCH 1/4] Documentation: dt-bindings: add the Amlogic Meson SAR ADC documentation Martin Blumenstingl
2017-01-11 17:43     ` Martin Blumenstingl
2017-01-11 17:43     ` Martin Blumenstingl
2017-01-11 17:43     ` Martin Blumenstingl
2017-01-11 17:43   ` [PATCH 2/4] clk: gxbb: add the SAR ADC clocks and expose them Martin Blumenstingl
2017-01-11 17:43     ` Martin Blumenstingl
2017-01-11 17:43     ` Martin Blumenstingl
2017-01-11 17:43     ` Martin Blumenstingl
2017-01-15 22:42   ` [PATCH v2 0/4] Amlogic Meson SAR ADC support Martin Blumenstingl
2017-01-15 22:42     ` Martin Blumenstingl
2017-01-15 22:42     ` Martin Blumenstingl
2017-01-15 22:42     ` Martin Blumenstingl
     [not found]     ` <20170115224221.15510-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-01-15 22:42       ` [PATCH v2 1/4] Documentation: dt-bindings: add the Amlogic Meson SAR ADC documentation Martin Blumenstingl
2017-01-15 22:42         ` Martin Blumenstingl
2017-01-15 22:42         ` Martin Blumenstingl
2017-01-15 22:42         ` Martin Blumenstingl
2017-01-15 22:42       ` [PATCH v2 3/4] iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs Martin Blumenstingl
2017-01-15 22:42         ` Martin Blumenstingl
2017-01-15 22:42         ` Martin Blumenstingl
2017-01-15 22:42         ` Martin Blumenstingl
2017-01-16 17:41         ` Peter Meerwald-Stadler
2017-01-16 17:41           ` Peter Meerwald-Stadler
2017-01-16 10:18       ` Neil Armstrong [this message]
2017-01-16 10:18         ` [PATCH v2 0/4] Amlogic Meson SAR ADC support Neil Armstrong
2017-01-16 10:18         ` Neil Armstrong
2017-01-16 10:18         ` Neil Armstrong
2017-01-15 22:42     ` [PATCH v2 2/4] clk: gxbb: add the SAR ADC clocks and expose them Martin Blumenstingl
2017-01-15 22:42       ` Martin Blumenstingl
2017-01-15 22:42       ` Martin Blumenstingl
2017-01-15 22:42     ` [PATCH v2 4/4] ARM64: dts: meson: meson-gx: add the SAR ADC Martin Blumenstingl
2017-01-15 22:42       ` Martin Blumenstingl
2017-01-15 22:42       ` Martin Blumenstingl
2017-01-19 14:58     ` [PATCH v3 0/4] Amlogic Meson SAR ADC support Martin Blumenstingl
2017-01-19 14:58       ` Martin Blumenstingl
2017-01-19 14:58       ` Martin Blumenstingl
2017-01-19 14:58       ` [PATCH v3 1/4] Documentation: dt-bindings: add the Amlogic Meson SAR ADC documentation Martin Blumenstingl
2017-01-19 14:58         ` Martin Blumenstingl
2017-01-19 14:58         ` Martin Blumenstingl
     [not found]         ` <20170119145822.26239-2-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-01-21 12:39           ` Jonathan Cameron
2017-01-21 12:39             ` Jonathan Cameron
2017-01-21 12:39             ` Jonathan Cameron
2017-01-21 12:39             ` Jonathan Cameron
2017-01-21 13:21         ` Andreas Färber
2017-01-21 13:21           ` Andreas Färber
2017-01-21 13:21           ` Andreas Färber
2017-01-21 20:56         ` Rob Herring
2017-01-21 20:56           ` Rob Herring
2017-01-21 20:56           ` Rob Herring
2017-01-21 20:56           ` Rob Herring
2017-01-21 23:10           ` Martin Blumenstingl
2017-01-21 23:10             ` Martin Blumenstingl
2017-01-21 23:10             ` Martin Blumenstingl
2017-01-22 12:30             ` Jonathan Cameron
2017-01-22 12:30               ` Jonathan Cameron
2017-01-22 12:30               ` Jonathan Cameron
2017-01-19 14:58       ` [PATCH v3 2/4] clk: gxbb: add the SAR ADC clocks and expose them Martin Blumenstingl
2017-01-19 14:58         ` Martin Blumenstingl
2017-01-19 14:58         ` Martin Blumenstingl
     [not found]         ` <20170119145822.26239-3-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-01-19 19:13           ` Stephen Boyd
2017-01-19 19:13             ` Stephen Boyd
2017-01-19 19:13             ` Stephen Boyd
2017-01-19 19:13             ` Stephen Boyd
2017-01-20 15:46             ` Kevin Hilman
2017-01-20 15:46               ` Kevin Hilman
2017-01-20 15:46               ` Kevin Hilman
2017-01-20 15:46               ` Kevin Hilman
2017-01-19 14:58       ` [PATCH v3 3/4] iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs Martin Blumenstingl
2017-01-19 14:58         ` Martin Blumenstingl
2017-01-19 14:58         ` Martin Blumenstingl
2017-01-21 12:52         ` Jonathan Cameron
2017-01-21 12:52           ` Jonathan Cameron
2017-01-21 12:52           ` Jonathan Cameron
2017-01-21 12:52           ` Jonathan Cameron
2017-01-19 14:58       ` [PATCH v3 4/4] ARM64: dts: meson: meson-gx: add the SAR ADC Martin Blumenstingl
2017-01-19 14:58         ` Martin Blumenstingl
2017-01-19 14:58         ` Martin Blumenstingl
2017-01-21 13:28         ` Andreas Färber
2017-01-21 13:28           ` Andreas Färber
2017-01-21 13:28           ` Andreas Färber
     [not found]       ` <20170119145822.26239-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-01-21 12:37         ` [PATCH v3 0/4] Amlogic Meson SAR ADC support Jonathan Cameron
2017-01-21 12:37           ` Jonathan Cameron
2017-01-21 12:37           ` Jonathan Cameron
2017-01-21 12:37           ` Jonathan Cameron

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