All of lore.kernel.org
 help / color / mirror / Atom feed
From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: Ikjoon Jang <ikjn@chromium.org>, linux-mediatek@lists.infradead.org
Cc: Chun-Jie Chen <chun-jie.chen@mediatek.com>,
	Weiyi Lu <weiyi.lu@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: mt8183: Add power-domains properity to mfgcfg
Date: Fri, 14 May 2021 11:14:14 +0200	[thread overview]
Message-ID: <d10d1edc-f79e-7fa4-93ca-e896d3ea6cba@collabora.com> (raw)
In-Reply-To: <20210414073108.3899082-1-ikjn@chromium.org>

Hi Ikjoon,

Thank you for your patch.

On 14/4/21 9:31, Ikjoon Jang wrote:
> mfgcfg clock is under MFG_ASYNC power domain
> 
> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> Signed-off-by: Ikjoon Jang <ikjn@chromium.org>

Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

> ---
> 
> Changes in v2:
> Fix a wrong power domain reference (scpsys to spm).
> 
> Link(v1): https://patchwork.kernel.org/project/linux-mediatek/patch/20210224091742.1060508-1-ikjn@chromium.org/#23997681
> 
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 0ff7b67a6806..64813634c3df 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -1116,6 +1116,7 @@ mfgcfg: syscon@13000000 {
>  			compatible = "mediatek,mt8183-mfgcfg", "syscon";
>  			reg = <0 0x13000000 0 0x1000>;
>  			#clock-cells = <1>;
> +			power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
>  		};
>  
>  		mmsys: syscon@14000000 {
> 

WARNING: multiple messages have this Message-ID (diff)
From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: Ikjoon Jang <ikjn@chromium.org>, linux-mediatek@lists.infradead.org
Cc: Chun-Jie Chen <chun-jie.chen@mediatek.com>,
	Weiyi Lu <weiyi.lu@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: mt8183: Add power-domains properity to mfgcfg
Date: Fri, 14 May 2021 11:14:14 +0200	[thread overview]
Message-ID: <d10d1edc-f79e-7fa4-93ca-e896d3ea6cba@collabora.com> (raw)
In-Reply-To: <20210414073108.3899082-1-ikjn@chromium.org>

Hi Ikjoon,

Thank you for your patch.

On 14/4/21 9:31, Ikjoon Jang wrote:
> mfgcfg clock is under MFG_ASYNC power domain
> 
> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> Signed-off-by: Ikjoon Jang <ikjn@chromium.org>

Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

> ---
> 
> Changes in v2:
> Fix a wrong power domain reference (scpsys to spm).
> 
> Link(v1): https://patchwork.kernel.org/project/linux-mediatek/patch/20210224091742.1060508-1-ikjn@chromium.org/#23997681
> 
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 0ff7b67a6806..64813634c3df 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -1116,6 +1116,7 @@ mfgcfg: syscon@13000000 {
>  			compatible = "mediatek,mt8183-mfgcfg", "syscon";
>  			reg = <0 0x13000000 0 0x1000>;
>  			#clock-cells = <1>;
> +			power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
>  		};
>  
>  		mmsys: syscon@14000000 {
> 

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: Ikjoon Jang <ikjn@chromium.org>, linux-mediatek@lists.infradead.org
Cc: Chun-Jie Chen <chun-jie.chen@mediatek.com>,
	Weiyi Lu <weiyi.lu@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: mt8183: Add power-domains properity to mfgcfg
Date: Fri, 14 May 2021 11:14:14 +0200	[thread overview]
Message-ID: <d10d1edc-f79e-7fa4-93ca-e896d3ea6cba@collabora.com> (raw)
In-Reply-To: <20210414073108.3899082-1-ikjn@chromium.org>

Hi Ikjoon,

Thank you for your patch.

On 14/4/21 9:31, Ikjoon Jang wrote:
> mfgcfg clock is under MFG_ASYNC power domain
> 
> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> Signed-off-by: Ikjoon Jang <ikjn@chromium.org>

Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

> ---
> 
> Changes in v2:
> Fix a wrong power domain reference (scpsys to spm).
> 
> Link(v1): https://patchwork.kernel.org/project/linux-mediatek/patch/20210224091742.1060508-1-ikjn@chromium.org/#23997681
> 
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 0ff7b67a6806..64813634c3df 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -1116,6 +1116,7 @@ mfgcfg: syscon@13000000 {
>  			compatible = "mediatek,mt8183-mfgcfg", "syscon";
>  			reg = <0 0x13000000 0 0x1000>;
>  			#clock-cells = <1>;
> +			power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
>  		};
>  
>  		mmsys: syscon@14000000 {
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-05-14  9:14 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-14  7:31 [PATCH v2] arm64: dts: mt8183: Add power-domains properity to mfgcfg Ikjoon Jang
2021-04-14  7:31 ` Ikjoon Jang
2021-04-14  7:31 ` Ikjoon Jang
2021-05-14  9:14 ` Enric Balletbo i Serra [this message]
2021-05-14  9:14   ` Enric Balletbo i Serra
2021-05-14  9:14   ` Enric Balletbo i Serra

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=d10d1edc-f79e-7fa4-93ca-e896d3ea6cba@collabora.com \
    --to=enric.balletbo@collabora.com \
    --cc=chun-jie.chen@mediatek.com \
    --cc=devicetree@vger.kernel.org \
    --cc=ikjn@chromium.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=weiyi.lu@mediatek.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.