From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD sequences
Date: Tue, 24 Mar 2020 20:43:39 +0000 [thread overview]
Message-ID: <d1ff85345266b7f11b42f391afeec19a2696d2f0.camel@intel.com> (raw)
In-Reply-To: <158508170019.5747.473819998805242461@emeril.freedesktop.org>
On Tue, 2020-03-24 at 20:28 +0000, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement
> TCCOLD sequences
> URL : https://patchwork.freedesktop.org/series/75034/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> 125d3dc52b2a drm/i915/tc/tgl: Implement TCCOLD sequences
> ca5b103fb97c drm/i915/display: Add
> intel_display_power_get_without_ack()
> bb6945d8d8cf drm/i915/display: Implement
> intel_display_power_wait_enable_ack()
> 4b5d60dcb2a5 drm/i915/display: Add intel_aux_ch_to_power_domain()
> 3b031f0ded4f drm/i915/tc/icl: Implement the TC cold exit sequence
> -:161: WARNING:MSLEEP: msleep < 20ms can sleep for up to 20ms; see
> Documentation/timers/timers-howto.rst
> #161: FILE: drivers/gpu/drm/i915/display/intel_tc.c:549:
> + msleep(1);
Left as is on purpose a x86 is usually configured as tickless and even
when not it supports HZ=1000 that matches 1ms.
>
> total: 0 errors, 1 warnings, 0 checks, 166 lines checked
> ae9ffbf9a4cc drm/i915/dp: Get TC link reference during DP detection
>
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next prev parent reply other threads:[~2020-03-24 20:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-24 20:14 [Intel-gfx] [PATCH v3 1/6] drm/i915/tc/tgl: Implement TCCOLD sequences José Roberto de Souza
2020-03-24 20:14 ` [Intel-gfx] [PATCH v3 2/6] drm/i915/display: Add intel_display_power_get_without_ack() José Roberto de Souza
2020-03-28 10:01 ` Imre Deak
2020-03-24 20:14 ` [Intel-gfx] [PATCH v3 3/6] drm/i915/display: Implement intel_display_power_wait_enable_ack() José Roberto de Souza
2020-03-24 20:14 ` [Intel-gfx] [PATCH v3 4/6] drm/i915/display: Add intel_aux_ch_to_power_domain() José Roberto de Souza
2020-03-24 20:14 ` [Intel-gfx] [PATCH v3 5/6] drm/i915/tc/icl: Implement the TC cold exit sequence José Roberto de Souza
2020-03-28 10:20 ` Imre Deak
2020-03-24 20:14 ` [Intel-gfx] [PATCH v3 6/6] drm/i915/dp: Get TC link reference during DP detection José Roberto de Souza
2020-03-28 10:26 ` Imre Deak
2020-03-30 20:27 ` Souza, Jose
2020-03-31 16:01 ` Imre Deak
2020-03-24 20:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD sequences Patchwork
2020-03-24 20:43 ` Souza, Jose [this message]
2020-03-24 20:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-24 22:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-25 5:59 ` [Intel-gfx] [PATCH v3 1/6] " You-Sheng Yang
2020-03-28 9:57 ` Imre Deak
2020-03-30 20:23 ` Souza, Jose
2020-03-31 15:47 ` Imre Deak
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