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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Stefan Hajnoczi <stefanha@redhat.com>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	jim@groklearning.com, mail@steffen-goertz.de,
	Su Hang <suhang16@mails.ucas.ac.cn>,
	ilg@livius.net, Alistair Francis <alistair@alistair23.me>,
	Subbaraya Sundeep <sundeep.lkml@gmail.com>,
	Steffen Gortz <qemu.ml@steffen-goertz.de>,
	qemu-arm@nongnu.org, Joel Stanley <joel@jms.id.au>,
	Julia Suvorova <jusual@mail.ru>
Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH v3 3/7] hw/arm: make bitbanded IO optional on ARM M Profile
Date: Fri, 27 Jul 2018 01:53:32 -0300	[thread overview]
Message-ID: <d3b4e258-369e-c769-55c1-3b62be174979@amsat.org> (raw)
In-Reply-To: <20180725085944.11856-4-stefanha@redhat.com>

On 07/25/2018 05:59 AM, Stefan Hajnoczi wrote:
> Some ARM CPUs have bitbanded IO, a memory region that allows convenient
> bit access via 32-bit memory loads/stores.  This eliminates the need for
> read-modify-update instruction sequences.
> 
> This patch makes this optional feature a ARMMProfile qdev property,
> allowing boards to choose whether they want bitbanding or not.
> 
> Status of boards:
>  * iotkit (Cortex M33), no bitband
>  * mps2 (Cortex M3), bitband
>  * msf2 (Cortex M3), bitband
>  * stellaris (Cortex M3), bitband
>  * stm32f205 (Cortex M3), bitband
> 
> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  include/hw/arm/arm-m-profile.h |  2 ++
>  hw/arm/arm-m-profile.c         | 38 +++++++++++++++++++---------------
>  hw/arm/mps2.c                  |  1 +
>  hw/arm/msf2-soc.c              |  1 +
>  hw/arm/stellaris.c             |  1 +
>  hw/arm/stm32f205_soc.c         |  1 +
>  6 files changed, 27 insertions(+), 17 deletions(-)
> 
> diff --git a/include/hw/arm/arm-m-profile.h b/include/hw/arm/arm-m-profile.h
> index ea496d9b88..1eb7a5c328 100644
> --- a/include/hw/arm/arm-m-profile.h
> +++ b/include/hw/arm/arm-m-profile.h
> @@ -50,6 +50,7 @@ typedef struct {
>   *   devices will be automatically layered on top of this view.)
>   * + Property "idau": IDAU interface (forwarded to CPU object)
>   * + Property "init-svtor": secure VTOR reset value (forwarded to CPU object)
> + * + Property "enable-bitband": expose bitbanded IO
>   */
>  typedef struct {
>      /*< private >*/
> @@ -70,6 +71,7 @@ typedef struct {
>      MemoryRegion *board_memory;
>      Object *idau;
>      uint32_t init_svtor;
> +    bool enable_bitband;
>  } ARMMProfileState;
>  
>  typedef struct {
> diff --git a/hw/arm/arm-m-profile.c b/hw/arm/arm-m-profile.c
> index b7dd2370d4..8bafd6602d 100644
> --- a/hw/arm/arm-m-profile.c
> +++ b/hw/arm/arm-m-profile.c
> @@ -212,25 +212,27 @@ static void arm_m_profile_realize(DeviceState *dev, Error **errp)
>      memory_region_add_subregion(&s->container, 0xe000e000,
>                                  sysbus_mmio_get_region(sbd, 0));
>  
> -    for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
> -        Object *obj = OBJECT(&s->bitband[i]);
> -        SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
> +    if (s->enable_bitband) {
> +        for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
> +            Object *obj = OBJECT(&s->bitband[i]);
> +            SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
>  
> -        object_property_set_int(obj, bitband_input_addr[i], "base", &err);
> -        if (err != NULL) {
> -            error_propagate(errp, err);
> -            return;
> -        }
> -        object_property_set_link(obj, OBJECT(s->board_memory),
> -                                 "source-memory", &error_abort);
> -        object_property_set_bool(obj, true, "realized", &err);
> -        if (err != NULL) {
> -            error_propagate(errp, err);
> -            return;
> -        }
> +            object_property_set_int(obj, bitband_input_addr[i], "base", &err);
> +            if (err != NULL) {
> +                error_propagate(errp, err);
> +                return;
> +            }
> +            object_property_set_link(obj, OBJECT(s->board_memory),
> +                                     "source-memory", &error_abort);
> +            object_property_set_bool(obj, true, "realized", &err);
> +            if (err != NULL) {
> +                error_propagate(errp, err);
> +                return;
> +            }
>  
> -        memory_region_add_subregion(&s->container, bitband_output_addr[i],
> -                                    sysbus_mmio_get_region(sbd, 0));
> +            memory_region_add_subregion(&s->container, bitband_output_addr[i],
> +                                        sysbus_mmio_get_region(sbd, 0));
> +        }
>      }
>  }
>  
> @@ -241,6 +243,8 @@ static Property arm_m_profile_properties[] = {
>      DEFINE_PROP_LINK("idau", ARMMProfileState, idau,
>                       TYPE_IDAU_INTERFACE, Object *),
>      DEFINE_PROP_UINT32("init-svtor", ARMMProfileState, init_svtor, 0),
> +    DEFINE_PROP_BOOL("enable-bitband", ARMMProfileState,
> +                     enable_bitband, false),
>      DEFINE_PROP_END_OF_LIST(),
>  };
>  
> diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
> index 912e1297d5..b232162dbd 100644
> --- a/hw/arm/mps2.c
> +++ b/hw/arm/mps2.c
> @@ -186,6 +186,7 @@ static void mps2_common_init(MachineState *machine)
>          g_assert_not_reached();
>      }
>      qdev_prop_set_string(armv7m, "cpu-type", machine->cpu_type);
> +    qdev_prop_set_bit(armv7m, "enable-bitband", true);
>      object_property_set_link(OBJECT(&mms->armv7m), OBJECT(system_memory),
>                               "memory", &error_abort);
>      object_property_set_bool(OBJECT(&mms->armv7m), true, "realized",
> diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
> index 09cdc61f44..fb5d16338f 100644
> --- a/hw/arm/msf2-soc.c
> +++ b/hw/arm/msf2-soc.c
> @@ -117,6 +117,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
>      armv7m = DEVICE(&s->armv7m);
>      qdev_prop_set_uint32(armv7m, "num-irq", 81);
>      qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
> +    qdev_prop_set_bit(armv7m, "enable-bitband", true);
>      object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()),
>                                       "memory", &error_abort);
>      object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err);
> diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
> index 42785f5bd1..cb22684ffe 100644
> --- a/hw/arm/stellaris.c
> +++ b/hw/arm/stellaris.c
> @@ -1304,6 +1304,7 @@ static void stellaris_init(MachineState *ms, stellaris_board_info *board)
>      nvic = qdev_create(NULL, TYPE_ARM_M_PROFILE);
>      qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES);
>      qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type);
> +    qdev_prop_set_bit(nvic, "enable-bitband", true);
>      object_property_set_link(OBJECT(nvic), OBJECT(get_system_memory()),
>                                       "memory", &error_abort);
>      /* This will exit with an error if the user passed us a bad cpu_type */
> diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c
> index 7de1474ade..f78b89d205 100644
> --- a/hw/arm/stm32f205_soc.c
> +++ b/hw/arm/stm32f205_soc.c
> @@ -109,6 +109,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
>      armv7m = DEVICE(&s->armv7m);
>      qdev_prop_set_uint32(armv7m, "num-irq", 96);
>      qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
> +    qdev_prop_set_bit(armv7m, "enable-bitband", true);
>      object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()),
>                                       "memory", &error_abort);
>      object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err);
> 

  reply	other threads:[~2018-07-27  4:53 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-25  8:59 [Qemu-devel] [PATCH v3 0/7] arm: add Cortex M0 CPU model and hex file loader Stefan Hajnoczi
2018-07-25  8:59 ` [Qemu-devel] [PATCH v3 1/7] hw/arm: rename armv7m_load_kernel() Stefan Hajnoczi
2018-07-27  4:52   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-07-30 17:30   ` [Qemu-devel] " Peter Maydell
2018-07-25  8:59 ` [Qemu-devel] [PATCH v3 2/7] hw/arm: rename TYPE_ARMV7M to TYPE_ARM_M_PROFILE Stefan Hajnoczi
2018-07-27  4:53   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-07-30 17:29   ` [Qemu-devel] " Peter Maydell
2018-07-25  8:59 ` [Qemu-devel] [PATCH v3 3/7] hw/arm: make bitbanded IO optional on ARM M Profile Stefan Hajnoczi
2018-07-27  4:53   ` Philippe Mathieu-Daudé [this message]
2018-07-30 17:33   ` Peter Maydell
2018-07-31 17:18   ` Peter Maydell
2018-07-25  8:59 ` [Qemu-devel] [PATCH v3 4/7] target/arm: add "cortex-m0" CPU model Stefan Hajnoczi
2018-07-27  5:26   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-07-30 17:51     ` Peter Maydell
2018-08-10  3:37       ` Philippe Mathieu-Daudé
2018-07-30 17:52   ` [Qemu-devel] " Peter Maydell
2018-08-02  6:47     ` Stefan Hajnoczi
2018-07-25  8:59 ` [Qemu-devel] [PATCH v3 5/7] loader: add rom transaction API Stefan Hajnoczi
2018-07-30 17:57   ` Peter Maydell
2018-07-25  8:59 ` [Qemu-devel] [PATCH v3 6/7] loader: Implement .hex file loader Stefan Hajnoczi
2018-07-30 18:01   ` Peter Maydell
2018-08-02  6:51     ` Stefan Hajnoczi
2018-08-02 12:43     ` Stefan Hajnoczi
2018-08-02 22:04       ` Peter Maydell
2018-08-03 10:32         ` Stefan Hajnoczi
2018-07-25  8:59 ` [Qemu-devel] [PATCH v3 7/7] Add QTest testcase for the Intel Hexadecimal Stefan Hajnoczi
2018-07-27  4:52   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-07-27 23:58     ` Su Hang
2018-08-02  6:53       ` Stefan Hajnoczi
2018-07-25  9:04 ` [Qemu-devel] [PATCH v3 0/7] arm: add Cortex M0 CPU model and hex file loader Stefan Hajnoczi

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