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* [U-Boot] [PATCH] warp: Fix RAM size runtime detection
@ 2016-08-15 13:07 Fabio Estevam
  2016-08-26 12:46 ` Fabio Estevam
  0 siblings, 1 reply; 3+ messages in thread
From: Fabio Estevam @ 2016-08-15 13:07 UTC (permalink / raw)
  To: u-boot

From: Fabio Estevam <fabio.estevam@nxp.com>

Since commit a13d3757f7df ("warp: Use imx_ddr_size() for calculating the
DDR size") warp board no longer boots.

The reason for the breakage is that the warp board is using the DDR
configuration from mx6slevk. A fundamental difference between warp and
mx6slevk is that warp only uses one DDR chip select while mx6slevk uses two.

The imx_ddr() function calculates the RAM size in runtime by reading the
values of registers MDCTL and MDMISC. 

So in order to fix this warp boot issue, create a imximage DDR file specific
to warp, where the MDCTL register is configured to only activates a single
chip select.

Reported-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
---
 board/warp/imximage.cfg | 115 ++++++++++++++++++++++++++++++++++++++++++++++++
 configs/warp_defconfig  |   2 +-
 2 files changed, 116 insertions(+), 1 deletion(-)
 create mode 100644 board/warp/imximage.cfg

diff --git a/board/warp/imximage.cfg b/board/warp/imximage.cfg
new file mode 100644
index 0000000..7b1d6b7
--- /dev/null
+++ b/board/warp/imximage.cfg
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+
+BOOT_FROM	sd
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type           Address        Value
+ *
+ * where:
+ *	Addr-type register length (1,2 or 4 bytes)
+ *	Address	  absolute address of the register
+ *	value	  value to be stored in the register
+ */
+DATA 4 0x020c4018 0x00260324
+
+DATA 4 0x020c4068 0xffffffff
+DATA 4 0x020c406c 0xffffffff
+DATA 4 0x020c4070 0xffffffff
+DATA 4 0x020c4074 0xffffffff
+DATA 4 0x020c4078 0xffffffff
+DATA 4 0x020c407c 0xffffffff
+DATA 4 0x020c4080 0xffffffff
+
+DATA 4 0x020e0344 0x00003030
+DATA 4 0x020e0348 0x00003030
+DATA 4 0x020e034c 0x00003030
+DATA 4 0x020e0350 0x00003030
+DATA 4 0x020e030c 0x00000030
+DATA 4 0x020e0310 0x00000030
+DATA 4 0x020e0314 0x00000030
+DATA 4 0x020e0318 0x00000030
+DATA 4 0x020e0300 0x00000030
+DATA 4 0x020e031c 0x00000030
+DATA 4 0x020e0338 0x00000028
+DATA 4 0x020e0320 0x00000030
+DATA 4 0x020e032c 0x00000000
+DATA 4 0x020e033c 0x00000008
+DATA 4 0x020e0340 0x00000008
+DATA 4 0x020e05c4 0x00000030
+DATA 4 0x020e05cc 0x00000030
+DATA 4 0x020e05d4 0x00000030
+DATA 4 0x020e05d8 0x00000030
+DATA 4 0x020e05ac 0x00000030
+DATA 4 0x020e05c8 0x00000030
+DATA 4 0x020e05b0 0x00020000
+DATA 4 0x020e05b4 0x00000000
+DATA 4 0x020e05c0 0x00020000
+DATA 4 0x020e05d0 0x00080000
+
+DATA 4 0x021b001c 0x00008000
+DATA 4 0x021b085c 0x1b4700c7
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b0890 0x00400000
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b081c 0x33333333
+DATA 4 0x021b0820 0x33333333
+DATA 4 0x021b0824 0x33333333
+DATA 4 0x021b0828 0x33333333
+DATA 4 0x021b082c 0xf3333333
+DATA 4 0x021b0830 0xf3333333
+DATA 4 0x021b0834 0xf3333333
+DATA 4 0x021b0838 0xf3333333
+DATA 4 0x021b0848 0x4241444a
+DATA 4 0x021b0850 0x3030312b
+DATA 4 0x021b083c 0x20000000
+DATA 4 0x021b0840 0x00000000
+DATA 4 0x021b08c0 0x24911492
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b000c 0x33374133
+DATA 4 0x021b0004 0x00020024
+DATA 4 0x021b0010 0x00100A82
+DATA 4 0x021b0014 0x00000093
+DATA 4 0x021b0018 0x00001688
+DATA 4 0x021b002c 0x0f9f26d2
+DATA 4 0x021b0030 0x009f0e10
+DATA 4 0x021b0038 0x00190778
+DATA 4 0x021b0008 0x00000000
+DATA 4 0x021b0040 0x0000004f
+DATA 4 0x021b0000 0x83110000
+DATA 4 0x021b001c 0x003f8030
+DATA 4 0x021b001c 0xff0a8030
+DATA 4 0x021b001c 0x82018030
+DATA 4 0x021b001c 0x04028030
+DATA 4 0x021b001c 0x02038030
+DATA 4 0x021b001c 0xff0a8038
+DATA 4 0x021b001c 0x82018038
+DATA 4 0x021b001c 0x04028038
+DATA 4 0x021b001c 0x02038038
+DATA 4 0x021b0800 0xa1310003
+DATA 4 0x021b0020 0x00001800
+DATA 4 0x021b0818 0x00000000
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b0004 0x00025564
+DATA 4 0x021b0404 0x00011006
+DATA 4 0x021b001c 0x00000000
diff --git a/configs/warp_defconfig b/configs/warp_defconfig
index 389bb7f..786d7e8 100644
--- a/configs/warp_defconfig
+++ b/configs/warp_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_WARP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg,MX6SL"
 CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH] warp: Fix RAM size runtime detection
  2016-08-15 13:07 [U-Boot] [PATCH] warp: Fix RAM size runtime detection Fabio Estevam
@ 2016-08-26 12:46 ` Fabio Estevam
  2016-08-26 13:16   ` Stefano Babic
  0 siblings, 1 reply; 3+ messages in thread
From: Fabio Estevam @ 2016-08-26 12:46 UTC (permalink / raw)
  To: u-boot

Hi Stefano,

On Mon, Aug 15, 2016 at 10:07 AM, Fabio Estevam <festevam@gmail.com> wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
>
> Since commit a13d3757f7df ("warp: Use imx_ddr_size() for calculating the
> DDR size") warp board no longer boots.
>
> The reason for the breakage is that the warp board is using the DDR
> configuration from mx6slevk. A fundamental difference between warp and
> mx6slevk is that warp only uses one DDR chip select while mx6slevk uses two.
>
> The imx_ddr() function calculates the RAM size in runtime by reading the
> values of registers MDCTL and MDMISC.
>
> So in order to fix this warp boot issue, create a imximage DDR file specific
> to warp, where the MDCTL register is configured to only activates a single
> chip select.
>
> Reported-by: Breno Lima <breno.lima@nxp.com>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> Tested-by: Breno Lima <breno.lima@nxp.com>

Could this one go to 2016.09 if you are happy with it?

Thanks

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH] warp: Fix RAM size runtime detection
  2016-08-26 12:46 ` Fabio Estevam
@ 2016-08-26 13:16   ` Stefano Babic
  0 siblings, 0 replies; 3+ messages in thread
From: Stefano Babic @ 2016-08-26 13:16 UTC (permalink / raw)
  To: u-boot

On 26/08/2016 14:46, Fabio Estevam wrote:
> Hi Stefano,
> 
> On Mon, Aug 15, 2016 at 10:07 AM, Fabio Estevam <festevam@gmail.com> wrote:
>> From: Fabio Estevam <fabio.estevam@nxp.com>
>>
>> Since commit a13d3757f7df ("warp: Use imx_ddr_size() for calculating the
>> DDR size") warp board no longer boots.
>>
>> The reason for the breakage is that the warp board is using the DDR
>> configuration from mx6slevk. A fundamental difference between warp and
>> mx6slevk is that warp only uses one DDR chip select while mx6slevk uses two.
>>
>> The imx_ddr() function calculates the RAM size in runtime by reading the
>> values of registers MDCTL and MDMISC.
>>
>> So in order to fix this warp boot issue, create a imximage DDR file specific
>> to warp, where the MDCTL register is configured to only activates a single
>> chip select.
>>
>> Reported-by: Breno Lima <breno.lima@nxp.com>
>> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
>> Tested-by: Breno Lima <breno.lima@nxp.com>
> 
> Could this one go to 2016.09 if you are happy with it?
> 

Yes, of course. I am starting to check all pending patches and apply them.

Regards,
Stefano

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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2016-08-26 13:16 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2016-08-15 13:07 [U-Boot] [PATCH] warp: Fix RAM size runtime detection Fabio Estevam
2016-08-26 12:46 ` Fabio Estevam
2016-08-26 13:16   ` Stefano Babic

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