* [PATCH v9 0/2] PCI: Microchip: Add host driver for Microchip PCIe controller
@ 2020-05-20 11:43 Daire.McNamara
2020-05-20 16:31 ` Bjorn Helgaas
0 siblings, 1 reply; 2+ messages in thread
From: Daire.McNamara @ 2020-05-20 11:43 UTC (permalink / raw)
To: amurray, lorenzo.pieralisi, linux-pci, bhelgaas, robh-dt, devicetree
This v9 patch adds support for the Microchip PCIe PolarFire PCIe
controller when configured in host (Root Complex) mode.
Updates since v8:
* Refactored as per Rob Herring's comments:
- bindings in schema format
- Adjusted licence to GPLv2.0
- Refactored access to config space between driver and common eCAM code
- Adopted pci_host_probe()
- Miscellanous other improvements
Updates since v7:
* Build for 64bit RISCV architecture only
Updates since v6:
* Refactored to use common eCAM driver
* Updated to CONFIG_PCIE_MICROCHIP_HOST etc
* Formatting improvements
* Removed code for selection between bridge 0 and 1
Updates since v5:
* Fixed Kconfig typo noted by Randy Dunlap
* Updated with comments from Bjorn Helgaas
Updates since v4:
* Fix compile issues.
Updates since v3:
* Update all references to Microsemi to Microchip
* Separate MSI functionality from legacy PCIe interrupt handling functionality
Updates since v2:
* Split out DT bindings and Vendor ID updates into their own patch
from PCIe driver.
* Updated Change Log
Updates since v1:
* Incorporate feedback from Bjorn Helgaas
Daire McNamara (2):
PCI: Microchip: Add host driver for Microchip PCIe controller
PCI: Microchip: Add host driver for Microchip PCIe controller
.../bindings/pci/microchip,pcie-host.yaml | 94 +++
drivers/pci/controller/Kconfig | 9 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pcie-microchip-host.c | 664 ++++++++++++++++++
4 files changed, 768 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
create mode 100644 drivers/pci/controller/pcie-microchip-host.c
base-commit: c0cc271173b2e1c2d8d0ceaef14e4dfa79eefc0d
--
2.17.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH v9 0/2] PCI: Microchip: Add host driver for Microchip PCIe controller
2020-05-20 11:43 [PATCH v9 0/2] PCI: Microchip: Add host driver for Microchip PCIe controller Daire.McNamara
@ 2020-05-20 16:31 ` Bjorn Helgaas
0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Helgaas @ 2020-05-20 16:31 UTC (permalink / raw)
To: Daire.McNamara
Cc: amurray, lorenzo.pieralisi, linux-pci, bhelgaas, Rob Herring, devicetree
[fixed Rob's email address ("robh+dt", not "robh-dt"]
On Wed, May 20, 2020 at 11:43:43AM +0000, Daire.McNamara@microchip.com wrote:
>
> This v9 patch adds support for the Microchip PCIe PolarFire PCIe
> controller when configured in host (Root Complex) mode.
Nit: v7 and v8 used "PCI: microchip:" subject prefixes, which matches
the convention for driver names in drivers/pci/controllers. This v9
uses "Microchip" again, which doesn't.
Patch 2/2 has extraneous "Subject:" in the subject line. Again, just
a nit, but it makes a little extra work for somebody to remove that
when applying.
It's also more convenient if 1/2 and 2/2 are sent as replies to the
0/2 cover letter, as you did for v3.
s/This patch// in commit logs (use imperative mood instead).
Rewrap commit logs to fill 75 columns (leaving room for the 4 spaces
added by git log).
No need to repost for these unless you make other fixes, but things
you can consider for the future.
> Updates since v8:
> * Refactored as per Rob Herring's comments:
> - bindings in schema format
> - Adjusted licence to GPLv2.0
> - Refactored access to config space between driver and common eCAM code
> - Adopted pci_host_probe()
> - Miscellanous other improvements
>
> Updates since v7:
> * Build for 64bit RISCV architecture only
>
> Updates since v6:
> * Refactored to use common eCAM driver
> * Updated to CONFIG_PCIE_MICROCHIP_HOST etc
> * Formatting improvements
> * Removed code for selection between bridge 0 and 1
>
> Updates since v5:
> * Fixed Kconfig typo noted by Randy Dunlap
> * Updated with comments from Bjorn Helgaas
>
> Updates since v4:
> * Fix compile issues.
>
> Updates since v3:
> * Update all references to Microsemi to Microchip
> * Separate MSI functionality from legacy PCIe interrupt handling functionality
>
> Updates since v2:
> * Split out DT bindings and Vendor ID updates into their own patch
> from PCIe driver.
> * Updated Change Log
>
> Updates since v1:
> * Incorporate feedback from Bjorn Helgaas
>
> Daire McNamara (2):
> PCI: Microchip: Add host driver for Microchip PCIe controller
> PCI: Microchip: Add host driver for Microchip PCIe controller
>
> .../bindings/pci/microchip,pcie-host.yaml | 94 +++
> drivers/pci/controller/Kconfig | 9 +
> drivers/pci/controller/Makefile | 1 +
> drivers/pci/controller/pcie-microchip-host.c | 664 ++++++++++++++++++
> 4 files changed, 768 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
> create mode 100644 drivers/pci/controller/pcie-microchip-host.c
>
>
> base-commit: c0cc271173b2e1c2d8d0ceaef14e4dfa79eefc0d
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2020-05-20 16:31 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-20 11:43 [PATCH v9 0/2] PCI: Microchip: Add host driver for Microchip PCIe controller Daire.McNamara
2020-05-20 16:31 ` Bjorn Helgaas
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.