From: Julien Massot <julien.massot@iot.bzh>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: Parent clock for MFIS module
Date: Thu, 10 Dec 2020 15:19:57 +0100 [thread overview]
Message-ID: <d8ad91a8-f8f9-4d3e-bbdd-9dddb41d40db@iot.bzh> (raw)
In-Reply-To: <CAMuHMdWQomuhL71F9c9n1M=rUaAAnV9oPvN_mRQBK8vrLG8-Hw@mail.gmail.com>
Hi Geert,
> Unfortunately this information isn't always properly documented in the
> Hardware User's Manual. Based on the MFIS Block Diagram, I would
> say it must be one of the APB bus clocks.
>
> The BSP uses R8A77970_CLK_S2D2 for R-Car V3M, which sounds
> reasonable. Reading the PCIe chapter, it could also be S3D1 or S3D3.
> However, in this case, the driver wouldn't care about the clock rate,
> so the actual parent clock used doesn't matter much.
> Hence S2D2 sounds acceptable to me.
Many thanks, let's put S2D2 then, patches are in flight !
Regards,
--
Julien Massot [IoT.bzh]
prev parent reply other threads:[~2020-12-10 14:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 13:07 Parent clock for MFIS module Julien Massot
2020-12-10 13:51 ` Geert Uytterhoeven
2020-12-10 14:19 ` Julien Massot [this message]
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