[PATCH] thermal: exynos: fix masking value for artpec7 temp_error

[PATCH] thermal: exynos: fix masking value for artpec7 temp_error

[Sang Min Kim]

This patch is a modification related to masking of the temp_error value
in the sanitize_temp_error() function.
 
For SOC_ARCH_EXYNOS7, the temp_error1, 2 value should be masked as
EXYNOS7_TMU_TEMP_MASK(0x1ff).
The current code masks temp_error2 with EXYNOS_TMU_TEMP_MASK(0xff)
value even in the case of EXYNOS7.
In addition, when entering the if statement, both temp_error1 and 2
are masked with EXYNOS_TMU_TEMP_MASK(0xff).
 
By modifying to use the previously declared local variable tmu_temp_mask,
the mask value suitable for the SOC can be applied.
 
Signed-off-by: sangmin kim <hypmean.kim@samsung.com>
---
 drivers/thermal/samsung/exynos_tmu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
 
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index f4ab4c5..08c63fe 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -243,17 +243,17 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info)
 
         data->temp_error1 = trim_info & tmu_temp_mask;
         data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) &
-                                EXYNOS_TMU_TEMP_MASK);
+                                tmu_temp_mask);
 
         if (!data->temp_error1 ||
             (data->min_efuse_value > data->temp_error1) ||
             (data->temp_error1 > data->max_efuse_value))
-                data->temp_error1 = data->efuse_value & EXYNOS_TMU_TEMP_MASK;
+                data->temp_error1 = data->efuse_value & tmu_temp_mask;
 
         if (!data->temp_error2)
                 data->temp_error2 =
                         (data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) &
-                        EXYNOS_TMU_TEMP_MASK;
+                        tmu_temp_mask;
 }
 
 static int exynos_tmu_initialize(struct platform_device *pdev)
-- 
2.9.5
 
 

[PATCH] thermal: exynos: fix masking value for artpec7 temp_error

[Sang Min Kim]

This patch is a modification related to masking of the temp_error value
in the sanitize_temp_error() function.
 
For SOC_ARCH_EXYNOS7, the temp_error1, 2 value should be masked as
EXYNOS7_TMU_TEMP_MASK(0x1ff).
The current code masks temp_error2 with EXYNOS_TMU_TEMP_MASK(0xff)
value even in the case of EXYNOS7.
In addition, when entering the if statement, both temp_error1 and 2
are masked with EXYNOS_TMU_TEMP_MASK(0xff).
 
By modifying to use the previously declared local variable tmu_temp_mask,
the mask value suitable for the SOC can be applied.
 
Signed-off-by: sangmin kim <hypmean.kim@samsung.com>
---
 drivers/thermal/samsung/exynos_tmu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
 
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index f4ab4c5..08c63fe 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -243,17 +243,17 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info)
 
         data->temp_error1 = trim_info & tmu_temp_mask;
         data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) &
-                                EXYNOS_TMU_TEMP_MASK);
+                                tmu_temp_mask);
 
         if (!data->temp_error1 ||
             (data->min_efuse_value > data->temp_error1) ||
             (data->temp_error1 > data->max_efuse_value))
-                data->temp_error1 = data->efuse_value & EXYNOS_TMU_TEMP_MASK;
+                data->temp_error1 = data->efuse_value & tmu_temp_mask;
 
         if (!data->temp_error2)
                 data->temp_error2 =
                         (data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) &
-                        EXYNOS_TMU_TEMP_MASK;
+                        tmu_temp_mask;
 }
 
 static int exynos_tmu_initialize(struct platform_device *pdev)
-- 
2.9.5
 
 

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Re: [PATCH] thermal: exynos: fix masking value for artpec7 temp_error

[Krzysztof Kozlowski]

On 30/03/2022 11:43, Sang Min Kim wrote:
> This patch is a modification related to masking of the temp_error value
> in the sanitize_temp_error() function.

Don't use "This patch" please.
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95

>  
> For SOC_ARCH_EXYNOS7, the temp_error1, 2 value should be masked as
> EXYNOS7_TMU_TEMP_MASK(0x1ff).
> The current code masks temp_error2 with EXYNOS_TMU_TEMP_MASK(0xff)
> value even in the case of EXYNOS7.
> In addition, when entering the if statement, both temp_error1 and 2
> are masked with EXYNOS_TMU_TEMP_MASK(0xff).
>  
> By modifying to use the previously declared local variable tmu_temp_mask,
> the mask value suitable for the SOC can be applied.
>  
> Signed-off-by: sangmin kim <hypmean.kim@samsung.com>

Fixes tag?

Code looks itself good, so with changes above:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH] thermal: exynos: fix masking value for artpec7 temp_error

[Krzysztof Kozlowski]

On 30/03/2022 11:43, Sang Min Kim wrote:
> This patch is a modification related to masking of the temp_error value
> in the sanitize_temp_error() function.

Don't use "This patch" please.
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95

>  
> For SOC_ARCH_EXYNOS7, the temp_error1, 2 value should be masked as
> EXYNOS7_TMU_TEMP_MASK(0x1ff).
> The current code masks temp_error2 with EXYNOS_TMU_TEMP_MASK(0xff)
> value even in the case of EXYNOS7.
> In addition, when entering the if statement, both temp_error1 and 2
> are masked with EXYNOS_TMU_TEMP_MASK(0xff).
>  
> By modifying to use the previously declared local variable tmu_temp_mask,
> the mask value suitable for the SOC can be applied.
>  
> Signed-off-by: sangmin kim <hypmean.kim@samsung.com>

Fixes tag?

Code looks itself good, so with changes above:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

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