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From: Madhav Chauhan <madhav.chauhan@intel.com>
To: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, rodrigo.vivi@intel.com
Subject: Re: [PATCH v5 00/13] ICELAKE DSI DRIVER
Date: Wed, 12 Sep 2018 11:46:39 +0530	[thread overview]
Message-ID: <db15e597-69ae-074e-e8d6-093d3937f3c2@intel.com> (raw)
In-Reply-To: <87o9d3ddzq.fsf@intel.com>

On 9/12/2018 1:05 AM, Jani Nikula wrote:
> On Tue, 10 Jul 2018, Madhav Chauhan <madhav.chauhan@intel.com> wrote:
>>  From ICELAKE platform onwards, new MIPI DSI IP controller is integrated to
>> GPU/Display Engine and same could be extended for future Intel platforms as well.
>> DSI IP controller supports MIPI DSI 1.3 and DPHY 1.2 specification.
>>
>> So, a new DSI driver has been added inside I915.
>>
>> Given below patches are the part of new DSI driver which implements BSPEC
>> sequence till transcoder configuration. Rest of the patches published to GITHUB
>> and latest snapshot can be downloaded using:
>> #git clone https://github.com/madhavchauhan/Intel-DSI-Driver.git
>>
>> v2: Addressed review comments from Jani N for Patches 1-6 and rebase for some
>> other few patches.
>> v3: Renamed intel_dsi_new.c to gen11_dsi.c as per discussion with Jani, Daniel,
>>      Ville. Also addressed review comments for couple of patches.
>> v4: Rename gen11_dsi.c to icl_dsi.c (Ville). No functional changes.
>> v5: Rebase on drm-tip after initial 7 patches got merged.
> Hi Madhav, I think there's enough review here to warrant a revised
> set. I regret I haven't been able to review this earlier, and I'm now
> throwing the ball back in your court... with the added pressure that I'd
> really like to get this merged for v4.20. Which means the deadline for
> merging is about 1½ weeks away. Is there any chance?

Agree, i will publish next series soon.
Do you mean to merge these 13 patches to 4.20 or the complete 
implementation of 65 patches??

Regards,
Madhav
>
> BR,
> Jani.
>

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  reply	other threads:[~2018-09-12  6:16 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-10  9:40 [PATCH v5 00/13] ICELAKE DSI DRIVER Madhav Chauhan
2018-07-10  9:40 ` [PATCH v5 01/13] drm/i915/icl: Configure lane sequencing of combo phy transmitter Madhav Chauhan
2018-07-19 16:11   ` Ville Syrjälä
2018-07-19 18:35     ` Chauhan, Madhav
2018-07-27 11:57       ` Chauhan, Madhav
2018-09-11 17:46         ` Jani Nikula
2018-09-12  6:32           ` Madhav Chauhan
2018-09-10 12:20   ` Lisovskiy, Stanislav
2018-09-10 15:27     ` Madhav Chauhan
2018-09-11  8:08       ` Lisovskiy, Stanislav
2018-07-10  9:40 ` [PATCH v5 02/13] drm/i915/icl: DSI vswing programming sequence Madhav Chauhan
2018-09-06 14:01   ` [v5, " Kulkarni, Vandita
2018-09-10  7:43     ` Madhav Chauhan
2018-09-11 18:16       ` Jani Nikula
2018-09-12  6:34         ` Madhav Chauhan
2018-09-11 18:50   ` [PATCH v5 " Jani Nikula
2018-09-12  9:03     ` Madhav Chauhan
2018-09-12  9:10       ` Jani Nikula
2018-07-10  9:40 ` [PATCH v5 03/13] drm/i915/icl: Enable DDI Buffer Madhav Chauhan
2018-09-11 18:54   ` Jani Nikula
2018-09-12  9:06     ` Madhav Chauhan
2018-09-12  9:10       ` Jani Nikula
2018-07-10  9:40 ` [PATCH v5 04/13] drm/i915/icl: Define T_INIT_MASTER registers Madhav Chauhan
2018-09-11 19:18   ` Jani Nikula
2018-07-10  9:40 ` [PATCH v5 05/13] drm/i915/icl: Program " Madhav Chauhan
2018-09-11 19:17   ` Jani Nikula
2018-07-10  9:40 ` [PATCH v5 06/13] drm/i915/icl: Define data/clock lanes dphy timing registers Madhav Chauhan
2018-09-11 19:14   ` Jani Nikula
2018-09-12  9:11     ` Madhav Chauhan
2018-07-10  9:40 ` [PATCH v5 07/13] drm/i915/icl: Program DSI clock and data lane timing params Madhav Chauhan
2018-07-19 16:17   ` Ville Syrjälä
2018-07-10  9:40 ` [PATCH v5 08/13] drm/i915/icl: Define TA_TIMING_PARAM registers Madhav Chauhan
2018-09-11 19:23   ` Jani Nikula
2018-09-12  9:13     ` Madhav Chauhan
2018-07-10  9:40 ` [PATCH v5 09/13] drm/i915/icl: Program " Madhav Chauhan
2018-07-19 16:21   ` Ville Syrjälä
2018-07-20  8:08     ` Chauhan, Madhav
2018-09-11 19:26       ` Jani Nikula
2018-09-12  9:25         ` Madhav Chauhan
2018-09-12  9:39           ` Jani Nikula
2018-07-10  9:40 ` [PATCH v5 10/13] drm/i915/icl: Get DSI transcoder for a given port Madhav Chauhan
2018-07-10  9:40 ` [PATCH v5 11/13] drm/i915/icl: Add macros for MMIO of DSI transcoder registers Madhav Chauhan
2018-07-19 16:22   ` Ville Syrjälä
2018-07-20  8:55     ` Chauhan, Madhav
2018-09-12  9:36     ` Madhav Chauhan
2018-09-12 18:00       ` Ville Syrjälä
2018-09-14  6:12         ` Madhav Chauhan
2018-09-14 12:25           ` Ville Syrjälä
2018-09-14 13:06             ` Madhav Chauhan
2018-09-14 13:27               ` Madhav Chauhan
2018-09-14 13:41                 ` Ville Syrjälä
2018-07-10  9:40 ` [PATCH v5 12/13] drm/i915/icl: Define TRANS_DSI_FUNC_CONF register Madhav Chauhan
2018-09-11 19:30   ` Jani Nikula
2018-09-12  9:35     ` Madhav Chauhan
2018-09-12  9:47       ` Jani Nikula
2018-07-10  9:40 ` [PATCH v5 13/13] drm/i915/icl: Configure DSI transcoders Madhav Chauhan
2018-07-10 10:46 ` ✗ Fi.CI.CHECKPATCH: warning for ICELAKE DSI DRIVER (rev5) Patchwork
2018-07-10 10:51 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-07-10 11:04 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-10 16:28 ` ✓ Fi.CI.IGT: " Patchwork
2018-09-11 19:35 ` [PATCH v5 00/13] ICELAKE DSI DRIVER Jani Nikula
2018-09-12  6:16   ` Madhav Chauhan [this message]
2018-09-12  7:31     ` Jani Nikula

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