[PATCH v4 0/8] add support MDP3 on MT8195 platform

[PATCH v4 0/8] add support MDP3 on MT8195 platform

[Moudy Ho]

From: mtk18742 <moudy.ho@mediatek.com>

Changes since v3:
- Rebase on linux-next

Changes since v2:
- Depend on :
  [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
- Split dts settings into two patches based on belonging to MMSYS or MUTEX.

Changes since v1:
- Depend on :
  [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
- Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding file.
- Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
- Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config() to
  mtk_mmsys_vpp_rsz_merge_config() and mtk_mmsys_vpp_rsz_dcm_config().
- Clean up mtk_mmsys_vpp_rsz_dcm_config().
- Add a comment to mtk_mutex_write_mod() and clean it up for use in more
  than 32 mods.

Hi,

This series add support for MT8195's two VPPSYS(Video Processor Pipe Subsystem),
under which there will be corresponding MMSYS and MUTEX settings that
need to be configured.

Moudy Ho (2):
  dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
  arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS

Roy-CW.Yeh (6):
  dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
  arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS
  soc: mediatek: mmsys: add support for MT8195 VPPSYS
  soc: mediatek: mmsys: add config api for RSZ switching and DCM
  soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1
  soc: mediatek: mutex: support MT8195 VPPSYS

 .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
 .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
 arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
 drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
 drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
 drivers/soc/mediatek/mtk-mmsys.h              |   1 +
 drivers/soc/mediatek/mtk-mutex.c              | 135 +++++++++++++++++-
 include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
 include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
 9 files changed, 274 insertions(+), 12 deletions(-)

-- 
2.18.0

[PATCH v4 0/8] add support MDP3 on MT8195 platform

[Moudy Ho]

From: mtk18742 <moudy.ho@mediatek.com>

Changes since v3:
- Rebase on linux-next

Changes since v2:
- Depend on :
  [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
- Split dts settings into two patches based on belonging to MMSYS or MUTEX.

Changes since v1:
- Depend on :
  [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
- Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding file.
- Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
- Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config() to
  mtk_mmsys_vpp_rsz_merge_config() and mtk_mmsys_vpp_rsz_dcm_config().
- Clean up mtk_mmsys_vpp_rsz_dcm_config().
- Add a comment to mtk_mutex_write_mod() and clean it up for use in more
  than 32 mods.

Hi,

This series add support for MT8195's two VPPSYS(Video Processor Pipe Subsystem),
under which there will be corresponding MMSYS and MUTEX settings that
need to be configured.

Moudy Ho (2):
  dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
  arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS

Roy-CW.Yeh (6):
  dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
  arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS
  soc: mediatek: mmsys: add support for MT8195 VPPSYS
  soc: mediatek: mmsys: add config api for RSZ switching and DCM
  soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1
  soc: mediatek: mutex: support MT8195 VPPSYS

 .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
 .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
 arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
 drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
 drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
 drivers/soc/mediatek/mtk-mmsys.h              |   1 +
 drivers/soc/mediatek/mtk-mutex.c              | 135 +++++++++++++++++-
 include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
 include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
 9 files changed, 274 insertions(+), 12 deletions(-)

-- 
2.18.0


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[PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[Moudy Ho]

For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
hardware differences in power domains, clocks and subsystem counts,
which should be determined by compatible names.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 0711f1834fbd..493aa9e8d484 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -48,7 +48,10 @@ properties:
           - const: syscon
 
       - items:
-          - const: mediatek,mt8195-vdosys0
+          - enum:
+              - mediatek,mt8195-vdosys0
+              - mediatek,mt8195-vppsys0
+              - mediatek,mt8195-vppsys1
           - const: mediatek,mt8195-mmsys
           - const: syscon
 
-- 
2.18.0

[PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[Moudy Ho]

For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
hardware differences in power domains, clocks and subsystem counts,
which should be determined by compatible names.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 0711f1834fbd..493aa9e8d484 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -48,7 +48,10 @@ properties:
           - const: syscon
 
       - items:
-          - const: mediatek,mt8195-vdosys0
+          - enum:
+              - mediatek,mt8195-vdosys0
+              - mediatek,mt8195-vppsys0
+              - mediatek,mt8195-vppsys1
           - const: mediatek,mt8195-mmsys
           - const: syscon
 
-- 
2.18.0


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[PATCH v4 2/8] dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Add compatible for MT8195 VPPSYS on MUTEX.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml         | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
index 9241e5fc7cff..5f044ba183fd 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
@@ -34,6 +34,7 @@ properties:
       - mediatek,mt8186-mdp3-mutex
       - mediatek,mt8192-disp-mutex
       - mediatek,mt8195-disp-mutex
+      - mediatek,mt8195-vpp-mutex
 
   reg:
     maxItems: 1
-- 
2.18.0

[PATCH v4 2/8] dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Add compatible for MT8195 VPPSYS on MUTEX.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml         | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
index 9241e5fc7cff..5f044ba183fd 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
@@ -34,6 +34,7 @@ properties:
       - mediatek,mt8186-mdp3-mutex
       - mediatek,mt8192-disp-mutex
       - mediatek,mt8195-disp-mutex
+      - mediatek,mt8195-vpp-mutex
 
   reg:
     maxItems: 1
-- 
2.18.0


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[PATCH v4 3/8] arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

With the change of the MMSYS binding file for MT8195, the compatible
name of VPPSYS in dts need to be fixed to match the definition.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 5d31536f4c48..bd33b414c484 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1632,8 +1632,9 @@
 			#clock-cells = <1>;
 		};
 
-		vppsys0: clock-controller@14000000 {
-			compatible = "mediatek,mt8195-vppsys0";
+		vppsys0: syscon@14000000 {
+			compatible = "mediatek,mt8195-vppsys0",
+				     "mediatek,mt8195-mmsys", "syscon";
 			reg = <0 0x14000000 0 0x1000>;
 			#clock-cells = <1>;
 		};
@@ -1737,8 +1738,9 @@
 			power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>;
 		};
 
-		vppsys1: clock-controller@14f00000 {
-			compatible = "mediatek,mt8195-vppsys1";
+		vppsys1: syscon@14f00000 {
+			compatible = "mediatek,mt8195-vppsys1",
+				     "mediatek,mt8195-mmsys", "syscon";
 			reg = <0 0x14f00000 0 0x1000>;
 			#clock-cells = <1>;
 		};
-- 
2.18.0

[PATCH v4 3/8] arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

With the change of the MMSYS binding file for MT8195, the compatible
name of VPPSYS in dts need to be fixed to match the definition.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 5d31536f4c48..bd33b414c484 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1632,8 +1632,9 @@
 			#clock-cells = <1>;
 		};
 
-		vppsys0: clock-controller@14000000 {
-			compatible = "mediatek,mt8195-vppsys0";
+		vppsys0: syscon@14000000 {
+			compatible = "mediatek,mt8195-vppsys0",
+				     "mediatek,mt8195-mmsys", "syscon";
 			reg = <0 0x14000000 0 0x1000>;
 			#clock-cells = <1>;
 		};
@@ -1737,8 +1738,9 @@
 			power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>;
 		};
 
-		vppsys1: clock-controller@14f00000 {
-			compatible = "mediatek,mt8195-vppsys1";
+		vppsys1: syscon@14f00000 {
+			compatible = "mediatek,mt8195-vppsys1",
+				     "mediatek,mt8195-mmsys", "syscon";
 			reg = <0 0x14f00000 0 0x1000>;
 			#clock-cells = <1>;
 		};
-- 
2.18.0


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[PATCH v4 4/8] arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS

[Moudy Ho]

In MT8195, the MMSYS has two Video Processor Pipepline Subsystems
named VPPSYS0 and VPPSYS1, each with specific MUTEX to control
Start of Frame(SOF) and End of Frame (EOF) signals.
Before working with them, the addresses, interrupts, clocks and power
domains need to be set up in dts.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index bd33b414c484..0ece3b46b66a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1639,6 +1639,15 @@
 			#clock-cells = <1>;
 		};
 
+		mutex@1400f000 {
+			compatible = "mediatek,mt8195-vpp-mutex";
+			reg = <0 0x1400f000 0 0x1000>;
+			interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
+			mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
+			clocks = <&vppsys0 CLK_VPP0_MUTEX>;
+			power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS0>;
+		};
+
 		smi_sub_common_vpp0_vpp1_2x1: smi@14010000 {
 			compatible = "mediatek,mt8195-smi-sub-common";
 			reg = <0 0x14010000 0 0x1000>;
@@ -1745,6 +1754,15 @@
 			#clock-cells = <1>;
 		};
 
+		mutex@14f01000 {
+			compatible = "mediatek,mt8195-vpp-mutex";
+			reg = <0 0x14f01000 0 0x1000>;
+			interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+			mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
+			clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>;
+			power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS1>;
+		};
+
 		larb5: larb@14f02000 {
 			compatible = "mediatek,mt8195-smi-larb";
 			reg = <0 0x14f02000 0 0x1000>;
-- 
2.18.0

[PATCH v4 4/8] arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS

[Moudy Ho]

In MT8195, the MMSYS has two Video Processor Pipepline Subsystems
named VPPSYS0 and VPPSYS1, each with specific MUTEX to control
Start of Frame(SOF) and End of Frame (EOF) signals.
Before working with them, the addresses, interrupts, clocks and power
domains need to be set up in dts.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index bd33b414c484..0ece3b46b66a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1639,6 +1639,15 @@
 			#clock-cells = <1>;
 		};
 
+		mutex@1400f000 {
+			compatible = "mediatek,mt8195-vpp-mutex";
+			reg = <0 0x1400f000 0 0x1000>;
+			interrupts = <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH 0>;
+			mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>;
+			clocks = <&vppsys0 CLK_VPP0_MUTEX>;
+			power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS0>;
+		};
+
 		smi_sub_common_vpp0_vpp1_2x1: smi@14010000 {
 			compatible = "mediatek,mt8195-smi-sub-common";
 			reg = <0 0x14010000 0 0x1000>;
@@ -1745,6 +1754,15 @@
 			#clock-cells = <1>;
 		};
 
+		mutex@14f01000 {
+			compatible = "mediatek,mt8195-vpp-mutex";
+			reg = <0 0x14f01000 0 0x1000>;
+			interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>;
+			mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>;
+			clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>;
+			power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS1>;
+		};
+
 		larb5: larb@14f02000 {
 			compatible = "mediatek,mt8195-smi-larb";
 			reg = <0 0x14f02000 0 0x1000>;
-- 
2.18.0


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[PATCH v4 5/8] soc: mediatek: mmsys: add support for MT8195 VPPSYS

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Add MT8195 VPPSYS0 and VPPSYS1 driver data.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mmsys.c | 22 ++++++++++++++++++++++
 drivers/soc/mediatek/mtk-mmsys.h |  1 +
 2 files changed, 23 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index f3431448e843..5a3189544c5a 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -80,6 +80,16 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
 	.num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table),
 };
 
+static const struct mtk_mmsys_driver_data mt8195_vppsys0_driver_data = {
+	.clk_driver = "clk-mt8195-vpp0",
+	.is_vppsys = true,
+};
+
+static const struct mtk_mmsys_driver_data mt8195_vppsys1_driver_data = {
+	.clk_driver = "clk-mt8195-vpp1",
+	.is_vppsys = true,
+};
+
 static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
 	.clk_driver = "clk-mt8365-mm",
 	.routes = mt8365_mmsys_routing_table,
@@ -256,6 +266,9 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
 	if (IS_ERR(clks))
 		return PTR_ERR(clks);
 
+	if (mmsys->data->is_vppsys)
+		goto out_probe_done;
+
 	drm = platform_device_register_data(&pdev->dev, "mediatek-drm",
 					    PLATFORM_DEVID_AUTO, NULL, 0);
 	if (IS_ERR(drm)) {
@@ -263,6 +276,7 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
 		return PTR_ERR(drm);
 	}
 
+out_probe_done:
 	return 0;
 }
 
@@ -311,6 +325,14 @@ static const struct of_device_id of_match_mtk_mmsys[] = {
 		.compatible = "mediatek,mt8195-vdosys0",
 		.data = &mt8195_vdosys0_driver_data,
 	},
+	{
+		.compatible = "mediatek,mt8195-vppsys0",
+		.data = &mt8195_vppsys0_driver_data,
+	},
+	{
+		.compatible = "mediatek,mt8195-vppsys1",
+		.data = &mt8195_vppsys1_driver_data,
+	},
 	{
 		.compatible = "mediatek,mt8365-mmsys",
 		.data = &mt8365_mmsys_driver_data,
diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h
index 77f37f8c715b..54a96b83afb4 100644
--- a/drivers/soc/mediatek/mtk-mmsys.h
+++ b/drivers/soc/mediatek/mtk-mmsys.h
@@ -91,6 +91,7 @@ struct mtk_mmsys_driver_data {
 	const struct mtk_mmsys_routes *routes;
 	const unsigned int num_routes;
 	const u16 sw0_rst_offset;
+	const bool is_vppsys;
 };
 
 /*
-- 
2.18.0

[PATCH v4 5/8] soc: mediatek: mmsys: add support for MT8195 VPPSYS

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Add MT8195 VPPSYS0 and VPPSYS1 driver data.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mmsys.c | 22 ++++++++++++++++++++++
 drivers/soc/mediatek/mtk-mmsys.h |  1 +
 2 files changed, 23 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index f3431448e843..5a3189544c5a 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -80,6 +80,16 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
 	.num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table),
 };
 
+static const struct mtk_mmsys_driver_data mt8195_vppsys0_driver_data = {
+	.clk_driver = "clk-mt8195-vpp0",
+	.is_vppsys = true,
+};
+
+static const struct mtk_mmsys_driver_data mt8195_vppsys1_driver_data = {
+	.clk_driver = "clk-mt8195-vpp1",
+	.is_vppsys = true,
+};
+
 static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
 	.clk_driver = "clk-mt8365-mm",
 	.routes = mt8365_mmsys_routing_table,
@@ -256,6 +266,9 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
 	if (IS_ERR(clks))
 		return PTR_ERR(clks);
 
+	if (mmsys->data->is_vppsys)
+		goto out_probe_done;
+
 	drm = platform_device_register_data(&pdev->dev, "mediatek-drm",
 					    PLATFORM_DEVID_AUTO, NULL, 0);
 	if (IS_ERR(drm)) {
@@ -263,6 +276,7 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
 		return PTR_ERR(drm);
 	}
 
+out_probe_done:
 	return 0;
 }
 
@@ -311,6 +325,14 @@ static const struct of_device_id of_match_mtk_mmsys[] = {
 		.compatible = "mediatek,mt8195-vdosys0",
 		.data = &mt8195_vdosys0_driver_data,
 	},
+	{
+		.compatible = "mediatek,mt8195-vppsys0",
+		.data = &mt8195_vppsys0_driver_data,
+	},
+	{
+		.compatible = "mediatek,mt8195-vppsys1",
+		.data = &mt8195_vppsys1_driver_data,
+	},
 	{
 		.compatible = "mediatek,mt8365-mmsys",
 		.data = &mt8365_mmsys_driver_data,
diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h
index 77f37f8c715b..54a96b83afb4 100644
--- a/drivers/soc/mediatek/mtk-mmsys.h
+++ b/drivers/soc/mediatek/mtk-mmsys.h
@@ -91,6 +91,7 @@ struct mtk_mmsys_driver_data {
 	const struct mtk_mmsys_routes *routes;
 	const unsigned int num_routes;
 	const u16 sw0_rst_offset;
+	const bool is_vppsys;
 };
 
 /*
-- 
2.18.0


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[PATCH v4 6/8] soc: mediatek: mmsys: add config api for RSZ switching and DCM

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Due to MT8195 HW design, some RSZs have additional settings that
need to be configured in MMSYS.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mt8195-mmsys.h    | 13 ++++++++
 drivers/soc/mediatek/mtk-mmsys.c       | 42 ++++++++++++++++++++++++++
 include/linux/soc/mediatek/mtk-mmsys.h |  4 +++
 3 files changed, 59 insertions(+)

diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h
index abfe94a30248..a1b8e3fd037e 100644
--- a/drivers/soc/mediatek/mt8195-mmsys.h
+++ b/drivers/soc/mediatek/mt8195-mmsys.h
@@ -75,6 +75,19 @@
 #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0		(2 << 16)
 #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE			(3 << 16)
 
+/* VPPSYS1 */
+#define MT8195_VPP1_HW_DCM_1ST_DIS0				0x150
+#define MT8195_VPP1_HW_DCM_1ST_DIS1				0x160
+#define MT8195_VPP1_HW_DCM_2ND_DIS0				0x1a0
+#define MT8195_VPP1_HW_DCM_2ND_DIS1				0x1b0
+#define MT8195_SVPP2_BUF_BF_RSZ_SWITCH				0xf48
+#define MT8195_SVPP3_BUF_BF_RSZ_SWITCH				0xf74
+
+/* VPPSYS1 HW DCM client*/
+#define MT8195_SVPP1_MDP_RSZ					BIT(25)
+#define MT8195_SVPP2_MDP_RSZ					BIT(4)
+#define MT8195_SVPP3_MDP_RSZ					BIT(5)
+
 static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
 	{
 		DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index 5a3189544c5a..d98e16408680 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -175,6 +175,48 @@ void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val)
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config);
 
+void mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable)
+{
+	u32 reg;
+
+	switch (id) {
+	case 2:
+		reg = MT8195_SVPP2_BUF_BF_RSZ_SWITCH;
+		break;
+	case 3:
+		reg = MT8195_SVPP3_BUF_BF_RSZ_SWITCH;
+		break;
+	default:
+		dev_err(dev, "Invalid id %d\n", id);
+		return;
+	}
+
+	mtk_mmsys_update_bits(dev_get_drvdata(dev), reg, ~0, enable);
+}
+EXPORT_SYMBOL_GPL(mtk_mmsys_vpp_rsz_merge_config);
+
+void mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable)
+{
+	u32 client;
+
+	client = MT8195_SVPP1_MDP_RSZ;
+	mtk_mmsys_update_bits(dev_get_drvdata(dev),
+			      MT8195_VPP1_HW_DCM_1ST_DIS0, client,
+			      ((enable) ? client : 0));
+	mtk_mmsys_update_bits(dev_get_drvdata(dev),
+			      MT8195_VPP1_HW_DCM_2ND_DIS0, client,
+			      ((enable) ? client : 0));
+
+	client = MT8195_SVPP2_MDP_RSZ | MT8195_SVPP3_MDP_RSZ;
+	mtk_mmsys_update_bits(dev_get_drvdata(dev),
+			      MT8195_VPP1_HW_DCM_1ST_DIS1, client,
+			      ((enable) ? client : 0));
+	mtk_mmsys_update_bits(dev_get_drvdata(dev),
+			      MT8195_VPP1_HW_DCM_2ND_DIS1, client,
+			      ((enable) ? client : 0));
+}
+EXPORT_SYMBOL_GPL(mtk_mmsys_vpp_rsz_dcm_config);
+
 static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id,
 				  bool assert)
 {
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
index b85f66db33e1..5ed593cccfe6 100644
--- a/include/linux/soc/mediatek/mtk-mmsys.h
+++ b/include/linux/soc/mediatek/mtk-mmsys.h
@@ -74,4 +74,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev,
 
 void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val);
 
+void mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable);
+
+void mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable);
+
 #endif /* __MTK_MMSYS_H */
-- 
2.18.0

[PATCH v4 6/8] soc: mediatek: mmsys: add config api for RSZ switching and DCM

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Due to MT8195 HW design, some RSZs have additional settings that
need to be configured in MMSYS.

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mt8195-mmsys.h    | 13 ++++++++
 drivers/soc/mediatek/mtk-mmsys.c       | 42 ++++++++++++++++++++++++++
 include/linux/soc/mediatek/mtk-mmsys.h |  4 +++
 3 files changed, 59 insertions(+)

diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h
index abfe94a30248..a1b8e3fd037e 100644
--- a/drivers/soc/mediatek/mt8195-mmsys.h
+++ b/drivers/soc/mediatek/mt8195-mmsys.h
@@ -75,6 +75,19 @@
 #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0		(2 << 16)
 #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE			(3 << 16)
 
+/* VPPSYS1 */
+#define MT8195_VPP1_HW_DCM_1ST_DIS0				0x150
+#define MT8195_VPP1_HW_DCM_1ST_DIS1				0x160
+#define MT8195_VPP1_HW_DCM_2ND_DIS0				0x1a0
+#define MT8195_VPP1_HW_DCM_2ND_DIS1				0x1b0
+#define MT8195_SVPP2_BUF_BF_RSZ_SWITCH				0xf48
+#define MT8195_SVPP3_BUF_BF_RSZ_SWITCH				0xf74
+
+/* VPPSYS1 HW DCM client*/
+#define MT8195_SVPP1_MDP_RSZ					BIT(25)
+#define MT8195_SVPP2_MDP_RSZ					BIT(4)
+#define MT8195_SVPP3_MDP_RSZ					BIT(5)
+
 static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
 	{
 		DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index 5a3189544c5a..d98e16408680 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -175,6 +175,48 @@ void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val)
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config);
 
+void mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable)
+{
+	u32 reg;
+
+	switch (id) {
+	case 2:
+		reg = MT8195_SVPP2_BUF_BF_RSZ_SWITCH;
+		break;
+	case 3:
+		reg = MT8195_SVPP3_BUF_BF_RSZ_SWITCH;
+		break;
+	default:
+		dev_err(dev, "Invalid id %d\n", id);
+		return;
+	}
+
+	mtk_mmsys_update_bits(dev_get_drvdata(dev), reg, ~0, enable);
+}
+EXPORT_SYMBOL_GPL(mtk_mmsys_vpp_rsz_merge_config);
+
+void mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable)
+{
+	u32 client;
+
+	client = MT8195_SVPP1_MDP_RSZ;
+	mtk_mmsys_update_bits(dev_get_drvdata(dev),
+			      MT8195_VPP1_HW_DCM_1ST_DIS0, client,
+			      ((enable) ? client : 0));
+	mtk_mmsys_update_bits(dev_get_drvdata(dev),
+			      MT8195_VPP1_HW_DCM_2ND_DIS0, client,
+			      ((enable) ? client : 0));
+
+	client = MT8195_SVPP2_MDP_RSZ | MT8195_SVPP3_MDP_RSZ;
+	mtk_mmsys_update_bits(dev_get_drvdata(dev),
+			      MT8195_VPP1_HW_DCM_1ST_DIS1, client,
+			      ((enable) ? client : 0));
+	mtk_mmsys_update_bits(dev_get_drvdata(dev),
+			      MT8195_VPP1_HW_DCM_2ND_DIS1, client,
+			      ((enable) ? client : 0));
+}
+EXPORT_SYMBOL_GPL(mtk_mmsys_vpp_rsz_dcm_config);
+
 static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id,
 				  bool assert)
 {
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
index b85f66db33e1..5ed593cccfe6 100644
--- a/include/linux/soc/mediatek/mtk-mmsys.h
+++ b/include/linux/soc/mediatek/mtk-mmsys.h
@@ -74,4 +74,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev,
 
 void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val);
 
+void mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable);
+
+void mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable);
+
 #endif /* __MTK_MMSYS_H */
-- 
2.18.0


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[PATCH v4 7/8] soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Add mtk_mutex_set_mod support to set MOD1

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mutex.c | 33 +++++++++++++++++++++++++-------
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index c1a33d52038e..a2be15a5c93a 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -23,6 +23,7 @@
 #define DISP_REG_MUTEX(n)			(0x24 + 0x20 * (n))
 #define DISP_REG_MUTEX_RST(n)			(0x28 + 0x20 * (n))
 #define DISP_REG_MUTEX_MOD(mutex_mod_reg, n)	(mutex_mod_reg + 0x20 * (n))
+#define DISP_REG_MUTEX_MOD1(mutex_mod_reg, n)	((mutex_mod_reg) + 0x20 * (n) + 0x4)
 #define DISP_REG_MUTEX_SOF(mutex_sof_reg, n)	(mutex_sof_reg + 0x20 * (n))
 #define DISP_REG_MUTEX_MOD2(n)			(0x34 + 0x20 * (n))
 
@@ -740,7 +741,7 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex,
 	struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx,
 						 mutex[mutex->id]);
 	unsigned int reg;
-	unsigned int offset;
+	u32 reg_offset, id_offset = 0;
 
 	WARN_ON(&mtx->mutex[mutex->id] != mutex);
 
@@ -750,16 +751,34 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex,
 		return -EINVAL;
 	}
 
-	offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,
-				    mutex->id);
-	reg = readl_relaxed(mtx->regs + offset);
+	/*
+	 * Some SoCs may have multiple MUTEX_MOD registers as more than 32 mods
+	 * are present, hence requiring multiple 32-bits registers.
+	 *
+	 * The mutex_table_mod fully represents that by defining the number of
+	 * the mod sequentially, later used as a bit number, which can be more
+	 * than 0..31.
+	 *
+	 * In order to retain compatibility with older SoCs, we perform R/W on
+	 * the single 32 bits registers, but this requires us to translate the
+	 * mutex ID bit accordingly.
+	 */
+	if (mtx->data->mutex_table_mod[idx] < 32) {
+		reg_offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,
+						mutex->id);
+	} else {
+		reg_offset = DISP_REG_MUTEX_MOD1(mtx->data->mutex_mod_reg,
+						 mutex->id);
+		id_offset = 32;
+	}
 
+	reg = readl_relaxed(mtx->regs + reg_offset);
 	if (clear)
-		reg &= ~BIT(mtx->data->mutex_table_mod[idx]);
+		reg &= ~BIT(mtx->data->mutex_table_mod[idx] - id_offset);
 	else
-		reg |= BIT(mtx->data->mutex_table_mod[idx]);
+		reg |= BIT(mtx->data->mutex_table_mod[idx] - id_offset);
 
-	writel_relaxed(reg, mtx->regs + offset);
+	writel_relaxed(reg, mtx->regs + reg_offset);
 
 	return 0;
 }
-- 
2.18.0

[PATCH v4 7/8] soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Add mtk_mutex_set_mod support to set MOD1

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mutex.c | 33 +++++++++++++++++++++++++-------
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index c1a33d52038e..a2be15a5c93a 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -23,6 +23,7 @@
 #define DISP_REG_MUTEX(n)			(0x24 + 0x20 * (n))
 #define DISP_REG_MUTEX_RST(n)			(0x28 + 0x20 * (n))
 #define DISP_REG_MUTEX_MOD(mutex_mod_reg, n)	(mutex_mod_reg + 0x20 * (n))
+#define DISP_REG_MUTEX_MOD1(mutex_mod_reg, n)	((mutex_mod_reg) + 0x20 * (n) + 0x4)
 #define DISP_REG_MUTEX_SOF(mutex_sof_reg, n)	(mutex_sof_reg + 0x20 * (n))
 #define DISP_REG_MUTEX_MOD2(n)			(0x34 + 0x20 * (n))
 
@@ -740,7 +741,7 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex,
 	struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx,
 						 mutex[mutex->id]);
 	unsigned int reg;
-	unsigned int offset;
+	u32 reg_offset, id_offset = 0;
 
 	WARN_ON(&mtx->mutex[mutex->id] != mutex);
 
@@ -750,16 +751,34 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex,
 		return -EINVAL;
 	}
 
-	offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,
-				    mutex->id);
-	reg = readl_relaxed(mtx->regs + offset);
+	/*
+	 * Some SoCs may have multiple MUTEX_MOD registers as more than 32 mods
+	 * are present, hence requiring multiple 32-bits registers.
+	 *
+	 * The mutex_table_mod fully represents that by defining the number of
+	 * the mod sequentially, later used as a bit number, which can be more
+	 * than 0..31.
+	 *
+	 * In order to retain compatibility with older SoCs, we perform R/W on
+	 * the single 32 bits registers, but this requires us to translate the
+	 * mutex ID bit accordingly.
+	 */
+	if (mtx->data->mutex_table_mod[idx] < 32) {
+		reg_offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,
+						mutex->id);
+	} else {
+		reg_offset = DISP_REG_MUTEX_MOD1(mtx->data->mutex_mod_reg,
+						 mutex->id);
+		id_offset = 32;
+	}
 
+	reg = readl_relaxed(mtx->regs + reg_offset);
 	if (clear)
-		reg &= ~BIT(mtx->data->mutex_table_mod[idx]);
+		reg &= ~BIT(mtx->data->mutex_table_mod[idx] - id_offset);
 	else
-		reg |= BIT(mtx->data->mutex_table_mod[idx]);
+		reg |= BIT(mtx->data->mutex_table_mod[idx] - id_offset);
 
-	writel_relaxed(reg, mtx->regs + offset);
+	writel_relaxed(reg, mtx->regs + reg_offset);
 
 	return 0;
 }
-- 
2.18.0


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[PATCH v4 8/8] soc: mediatek: mutex: support MT8195 VPPSYS

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Add MT8195 VPPSYS0 and VPPSYS1 mutex info to driver data

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mutex.c       | 102 +++++++++++++++++++++++++
 include/linux/soc/mediatek/mtk-mutex.h |  35 +++++++++
 2 files changed, 137 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index a2be15a5c93a..86b9372080c4 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -131,6 +131,53 @@
 #define MT8195_MUTEX_MOD_DISP_DP_INTF0		21
 #define MT8195_MUTEX_MOD_DISP_PWM0		27
 
+/* VPPSYS0 */
+#define MT8195_MUTEX_MOD_MDP_RDMA0             0
+#define MT8195_MUTEX_MOD_MDP_FG0               1
+#define MT8195_MUTEX_MOD_MDP_STITCH0           2
+#define MT8195_MUTEX_MOD_MDP_HDR0              3
+#define MT8195_MUTEX_MOD_MDP_AAL0              4
+#define MT8195_MUTEX_MOD_MDP_RSZ0              5
+#define MT8195_MUTEX_MOD_MDP_TDSHP0            6
+#define MT8195_MUTEX_MOD_MDP_COLOR0            7
+#define MT8195_MUTEX_MOD_MDP_OVL0              8
+#define MT8195_MUTEX_MOD_MDP_PAD0              9
+#define MT8195_MUTEX_MOD_MDP_TCC0              10
+#define MT8195_MUTEX_MOD_MDP_WROT0             11
+
+/* VPPSYS1 */
+#define MT8195_MUTEX_MOD_MDP_TCC1              3
+#define MT8195_MUTEX_MOD_MDP_RDMA1             4
+#define MT8195_MUTEX_MOD_MDP_RDMA2             5
+#define MT8195_MUTEX_MOD_MDP_RDMA3             6
+#define MT8195_MUTEX_MOD_MDP_FG1               7
+#define MT8195_MUTEX_MOD_MDP_FG2               8
+#define MT8195_MUTEX_MOD_MDP_FG3               9
+#define MT8195_MUTEX_MOD_MDP_HDR1              10
+#define MT8195_MUTEX_MOD_MDP_HDR2              11
+#define MT8195_MUTEX_MOD_MDP_HDR3              12
+#define MT8195_MUTEX_MOD_MDP_AAL1              13
+#define MT8195_MUTEX_MOD_MDP_AAL2              14
+#define MT8195_MUTEX_MOD_MDP_AAL3              15
+#define MT8195_MUTEX_MOD_MDP_RSZ1              16
+#define MT8195_MUTEX_MOD_MDP_RSZ2              17
+#define MT8195_MUTEX_MOD_MDP_RSZ3              18
+#define MT8195_MUTEX_MOD_MDP_TDSHP1            19
+#define MT8195_MUTEX_MOD_MDP_TDSHP2            20
+#define MT8195_MUTEX_MOD_MDP_TDSHP3            21
+#define MT8195_MUTEX_MOD_MDP_MERGE2            22
+#define MT8195_MUTEX_MOD_MDP_MERGE3            23
+#define MT8195_MUTEX_MOD_MDP_COLOR1            24
+#define MT8195_MUTEX_MOD_MDP_COLOR2            25
+#define MT8195_MUTEX_MOD_MDP_COLOR3            26
+#define MT8195_MUTEX_MOD_MDP_OVL1              27
+#define MT8195_MUTEX_MOD_MDP_PAD1              28
+#define MT8195_MUTEX_MOD_MDP_PAD2              29
+#define MT8195_MUTEX_MOD_MDP_PAD3              30
+#define MT8195_MUTEX_MOD_MDP_WROT1             31
+#define MT8195_MUTEX_MOD_MDP_WROT2             32
+#define MT8195_MUTEX_MOD_MDP_WROT3             33
+
 #define MT8365_MUTEX_MOD_DISP_OVL0		7
 #define MT8365_MUTEX_MOD_DISP_OVL0_2L		8
 #define MT8365_MUTEX_MOD_DISP_RDMA0		9
@@ -375,6 +422,52 @@ static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = {
 	[DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0,
 };
 
+static const unsigned int mt8195_mutex_table_mod[MUTEX_MOD_IDX_MAX] = {
+	[MUTEX_MOD_IDX_MDP_RDMA0] = MT8195_MUTEX_MOD_MDP_RDMA0,
+	[MUTEX_MOD_IDX_MDP_RDMA1] = MT8195_MUTEX_MOD_MDP_RDMA1,
+	[MUTEX_MOD_IDX_MDP_RDMA2] = MT8195_MUTEX_MOD_MDP_RDMA2,
+	[MUTEX_MOD_IDX_MDP_RDMA3] = MT8195_MUTEX_MOD_MDP_RDMA3,
+	[MUTEX_MOD_IDX_MDP_STITCH0] = MT8195_MUTEX_MOD_MDP_STITCH0,
+	[MUTEX_MOD_IDX_MDP_FG0] = MT8195_MUTEX_MOD_MDP_FG0,
+	[MUTEX_MOD_IDX_MDP_FG1] = MT8195_MUTEX_MOD_MDP_FG1,
+	[MUTEX_MOD_IDX_MDP_FG2] = MT8195_MUTEX_MOD_MDP_FG2,
+	[MUTEX_MOD_IDX_MDP_FG3] = MT8195_MUTEX_MOD_MDP_FG3,
+	[MUTEX_MOD_IDX_MDP_HDR0] = MT8195_MUTEX_MOD_MDP_HDR0,
+	[MUTEX_MOD_IDX_MDP_HDR1] = MT8195_MUTEX_MOD_MDP_HDR1,
+	[MUTEX_MOD_IDX_MDP_HDR2] = MT8195_MUTEX_MOD_MDP_HDR2,
+	[MUTEX_MOD_IDX_MDP_HDR3] = MT8195_MUTEX_MOD_MDP_HDR3,
+	[MUTEX_MOD_IDX_MDP_AAL0] = MT8195_MUTEX_MOD_MDP_AAL0,
+	[MUTEX_MOD_IDX_MDP_AAL1] = MT8195_MUTEX_MOD_MDP_AAL1,
+	[MUTEX_MOD_IDX_MDP_AAL2] = MT8195_MUTEX_MOD_MDP_AAL2,
+	[MUTEX_MOD_IDX_MDP_AAL3] = MT8195_MUTEX_MOD_MDP_AAL3,
+	[MUTEX_MOD_IDX_MDP_RSZ0] = MT8195_MUTEX_MOD_MDP_RSZ0,
+	[MUTEX_MOD_IDX_MDP_RSZ1] = MT8195_MUTEX_MOD_MDP_RSZ1,
+	[MUTEX_MOD_IDX_MDP_RSZ2] = MT8195_MUTEX_MOD_MDP_RSZ2,
+	[MUTEX_MOD_IDX_MDP_RSZ3] = MT8195_MUTEX_MOD_MDP_RSZ3,
+	[MUTEX_MOD_IDX_MDP_MERGE2] = MT8195_MUTEX_MOD_MDP_MERGE2,
+	[MUTEX_MOD_IDX_MDP_MERGE3] = MT8195_MUTEX_MOD_MDP_MERGE3,
+	[MUTEX_MOD_IDX_MDP_TDSHP0] = MT8195_MUTEX_MOD_MDP_TDSHP0,
+	[MUTEX_MOD_IDX_MDP_TDSHP1] = MT8195_MUTEX_MOD_MDP_TDSHP1,
+	[MUTEX_MOD_IDX_MDP_TDSHP2] = MT8195_MUTEX_MOD_MDP_TDSHP2,
+	[MUTEX_MOD_IDX_MDP_TDSHP3] = MT8195_MUTEX_MOD_MDP_TDSHP3,
+	[MUTEX_MOD_IDX_MDP_COLOR0] = MT8195_MUTEX_MOD_MDP_COLOR0,
+	[MUTEX_MOD_IDX_MDP_COLOR1] = MT8195_MUTEX_MOD_MDP_COLOR1,
+	[MUTEX_MOD_IDX_MDP_COLOR2] = MT8195_MUTEX_MOD_MDP_COLOR2,
+	[MUTEX_MOD_IDX_MDP_COLOR3] = MT8195_MUTEX_MOD_MDP_COLOR3,
+	[MUTEX_MOD_IDX_MDP_OVL0] = MT8195_MUTEX_MOD_MDP_OVL0,
+	[MUTEX_MOD_IDX_MDP_OVL1] = MT8195_MUTEX_MOD_MDP_OVL1,
+	[MUTEX_MOD_IDX_MDP_PAD0] = MT8195_MUTEX_MOD_MDP_PAD0,
+	[MUTEX_MOD_IDX_MDP_PAD1] = MT8195_MUTEX_MOD_MDP_PAD1,
+	[MUTEX_MOD_IDX_MDP_PAD2] = MT8195_MUTEX_MOD_MDP_PAD2,
+	[MUTEX_MOD_IDX_MDP_PAD3] = MT8195_MUTEX_MOD_MDP_PAD3,
+	[MUTEX_MOD_IDX_MDP_TCC0] = MT8195_MUTEX_MOD_MDP_TCC0,
+	[MUTEX_MOD_IDX_MDP_TCC1] = MT8195_MUTEX_MOD_MDP_TCC1,
+	[MUTEX_MOD_IDX_MDP_WROT0] = MT8195_MUTEX_MOD_MDP_WROT0,
+	[MUTEX_MOD_IDX_MDP_WROT1] = MT8195_MUTEX_MOD_MDP_WROT1,
+	[MUTEX_MOD_IDX_MDP_WROT2] = MT8195_MUTEX_MOD_MDP_WROT2,
+	[MUTEX_MOD_IDX_MDP_WROT3] = MT8195_MUTEX_MOD_MDP_WROT3,
+};
+
 static const unsigned int mt8365_mutex_mod[DDP_COMPONENT_ID_MAX] = {
 	[DDP_COMPONENT_AAL0] = MT8365_MUTEX_MOD_DISP_AAL,
 	[DDP_COMPONENT_CCORR] = MT8365_MUTEX_MOD_DISP_CCORR,
@@ -520,6 +613,13 @@ static const struct mtk_mutex_data mt8195_mutex_driver_data = {
 	.mutex_sof_reg = MT8183_MUTEX0_SOF0,
 };
 
+static const struct mtk_mutex_data mt8195_vpp_mutex_driver_data = {
+	.mutex_sof = mt8195_mutex_sof,
+	.mutex_mod_reg = MT8183_MUTEX0_MOD0,
+	.mutex_sof_reg = MT8183_MUTEX0_SOF0,
+	.mutex_table_mod = mt8195_mutex_table_mod,
+};
+
 static const struct mtk_mutex_data mt8365_mutex_driver_data = {
 	.mutex_mod = mt8365_mutex_mod,
 	.mutex_sof = mt8183_mutex_sof,
@@ -877,6 +977,8 @@ static const struct of_device_id mutex_driver_dt_match[] = {
 	  .data = &mt8192_mutex_driver_data},
 	{ .compatible = "mediatek,mt8195-disp-mutex",
 	  .data = &mt8195_mutex_driver_data},
+	{ .compatible = "mediatek,mt8195-vpp-mutex",
+	  .data = &mt8195_vpp_mutex_driver_data},
 	{ .compatible = "mediatek,mt8365-disp-mutex",
 	  .data = &mt8365_mutex_driver_data},
 	{},
diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/mediatek/mtk-mutex.h
index b335c2837cd8..635218e3ac68 100644
--- a/include/linux/soc/mediatek/mtk-mutex.h
+++ b/include/linux/soc/mediatek/mtk-mutex.h
@@ -22,6 +22,41 @@ enum mtk_mutex_mod_index {
 	MUTEX_MOD_IDX_MDP_CCORR0,
 	MUTEX_MOD_IDX_MDP_HDR0,
 	MUTEX_MOD_IDX_MDP_COLOR0,
+	MUTEX_MOD_IDX_MDP_RDMA1,
+	MUTEX_MOD_IDX_MDP_RDMA2,
+	MUTEX_MOD_IDX_MDP_RDMA3,
+	MUTEX_MOD_IDX_MDP_STITCH0,
+	MUTEX_MOD_IDX_MDP_FG0,
+	MUTEX_MOD_IDX_MDP_FG1,
+	MUTEX_MOD_IDX_MDP_FG2,
+	MUTEX_MOD_IDX_MDP_FG3,
+	MUTEX_MOD_IDX_MDP_HDR1,
+	MUTEX_MOD_IDX_MDP_HDR2,
+	MUTEX_MOD_IDX_MDP_HDR3,
+	MUTEX_MOD_IDX_MDP_AAL1,
+	MUTEX_MOD_IDX_MDP_AAL2,
+	MUTEX_MOD_IDX_MDP_AAL3,
+	MUTEX_MOD_IDX_MDP_RSZ2,
+	MUTEX_MOD_IDX_MDP_RSZ3,
+	MUTEX_MOD_IDX_MDP_MERGE2,
+	MUTEX_MOD_IDX_MDP_MERGE3,
+	MUTEX_MOD_IDX_MDP_TDSHP1,
+	MUTEX_MOD_IDX_MDP_TDSHP2,
+	MUTEX_MOD_IDX_MDP_TDSHP3,
+	MUTEX_MOD_IDX_MDP_COLOR1,
+	MUTEX_MOD_IDX_MDP_COLOR2,
+	MUTEX_MOD_IDX_MDP_COLOR3,
+	MUTEX_MOD_IDX_MDP_OVL0,
+	MUTEX_MOD_IDX_MDP_OVL1,
+	MUTEX_MOD_IDX_MDP_PAD0,
+	MUTEX_MOD_IDX_MDP_PAD1,
+	MUTEX_MOD_IDX_MDP_PAD2,
+	MUTEX_MOD_IDX_MDP_PAD3,
+	MUTEX_MOD_IDX_MDP_TCC0,
+	MUTEX_MOD_IDX_MDP_TCC1,
+	MUTEX_MOD_IDX_MDP_WROT1,
+	MUTEX_MOD_IDX_MDP_WROT2,
+	MUTEX_MOD_IDX_MDP_WROT3,
 
 	MUTEX_MOD_IDX_MAX		/* ALWAYS keep at the end */
 };
-- 
2.18.0

[PATCH v4 8/8] soc: mediatek: mutex: support MT8195 VPPSYS

[Moudy Ho]

From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>

Add MT8195 VPPSYS0 and VPPSYS1 mutex info to driver data

Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mutex.c       | 102 +++++++++++++++++++++++++
 include/linux/soc/mediatek/mtk-mutex.h |  35 +++++++++
 2 files changed, 137 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index a2be15a5c93a..86b9372080c4 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -131,6 +131,53 @@
 #define MT8195_MUTEX_MOD_DISP_DP_INTF0		21
 #define MT8195_MUTEX_MOD_DISP_PWM0		27
 
+/* VPPSYS0 */
+#define MT8195_MUTEX_MOD_MDP_RDMA0             0
+#define MT8195_MUTEX_MOD_MDP_FG0               1
+#define MT8195_MUTEX_MOD_MDP_STITCH0           2
+#define MT8195_MUTEX_MOD_MDP_HDR0              3
+#define MT8195_MUTEX_MOD_MDP_AAL0              4
+#define MT8195_MUTEX_MOD_MDP_RSZ0              5
+#define MT8195_MUTEX_MOD_MDP_TDSHP0            6
+#define MT8195_MUTEX_MOD_MDP_COLOR0            7
+#define MT8195_MUTEX_MOD_MDP_OVL0              8
+#define MT8195_MUTEX_MOD_MDP_PAD0              9
+#define MT8195_MUTEX_MOD_MDP_TCC0              10
+#define MT8195_MUTEX_MOD_MDP_WROT0             11
+
+/* VPPSYS1 */
+#define MT8195_MUTEX_MOD_MDP_TCC1              3
+#define MT8195_MUTEX_MOD_MDP_RDMA1             4
+#define MT8195_MUTEX_MOD_MDP_RDMA2             5
+#define MT8195_MUTEX_MOD_MDP_RDMA3             6
+#define MT8195_MUTEX_MOD_MDP_FG1               7
+#define MT8195_MUTEX_MOD_MDP_FG2               8
+#define MT8195_MUTEX_MOD_MDP_FG3               9
+#define MT8195_MUTEX_MOD_MDP_HDR1              10
+#define MT8195_MUTEX_MOD_MDP_HDR2              11
+#define MT8195_MUTEX_MOD_MDP_HDR3              12
+#define MT8195_MUTEX_MOD_MDP_AAL1              13
+#define MT8195_MUTEX_MOD_MDP_AAL2              14
+#define MT8195_MUTEX_MOD_MDP_AAL3              15
+#define MT8195_MUTEX_MOD_MDP_RSZ1              16
+#define MT8195_MUTEX_MOD_MDP_RSZ2              17
+#define MT8195_MUTEX_MOD_MDP_RSZ3              18
+#define MT8195_MUTEX_MOD_MDP_TDSHP1            19
+#define MT8195_MUTEX_MOD_MDP_TDSHP2            20
+#define MT8195_MUTEX_MOD_MDP_TDSHP3            21
+#define MT8195_MUTEX_MOD_MDP_MERGE2            22
+#define MT8195_MUTEX_MOD_MDP_MERGE3            23
+#define MT8195_MUTEX_MOD_MDP_COLOR1            24
+#define MT8195_MUTEX_MOD_MDP_COLOR2            25
+#define MT8195_MUTEX_MOD_MDP_COLOR3            26
+#define MT8195_MUTEX_MOD_MDP_OVL1              27
+#define MT8195_MUTEX_MOD_MDP_PAD1              28
+#define MT8195_MUTEX_MOD_MDP_PAD2              29
+#define MT8195_MUTEX_MOD_MDP_PAD3              30
+#define MT8195_MUTEX_MOD_MDP_WROT1             31
+#define MT8195_MUTEX_MOD_MDP_WROT2             32
+#define MT8195_MUTEX_MOD_MDP_WROT3             33
+
 #define MT8365_MUTEX_MOD_DISP_OVL0		7
 #define MT8365_MUTEX_MOD_DISP_OVL0_2L		8
 #define MT8365_MUTEX_MOD_DISP_RDMA0		9
@@ -375,6 +422,52 @@ static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = {
 	[DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0,
 };
 
+static const unsigned int mt8195_mutex_table_mod[MUTEX_MOD_IDX_MAX] = {
+	[MUTEX_MOD_IDX_MDP_RDMA0] = MT8195_MUTEX_MOD_MDP_RDMA0,
+	[MUTEX_MOD_IDX_MDP_RDMA1] = MT8195_MUTEX_MOD_MDP_RDMA1,
+	[MUTEX_MOD_IDX_MDP_RDMA2] = MT8195_MUTEX_MOD_MDP_RDMA2,
+	[MUTEX_MOD_IDX_MDP_RDMA3] = MT8195_MUTEX_MOD_MDP_RDMA3,
+	[MUTEX_MOD_IDX_MDP_STITCH0] = MT8195_MUTEX_MOD_MDP_STITCH0,
+	[MUTEX_MOD_IDX_MDP_FG0] = MT8195_MUTEX_MOD_MDP_FG0,
+	[MUTEX_MOD_IDX_MDP_FG1] = MT8195_MUTEX_MOD_MDP_FG1,
+	[MUTEX_MOD_IDX_MDP_FG2] = MT8195_MUTEX_MOD_MDP_FG2,
+	[MUTEX_MOD_IDX_MDP_FG3] = MT8195_MUTEX_MOD_MDP_FG3,
+	[MUTEX_MOD_IDX_MDP_HDR0] = MT8195_MUTEX_MOD_MDP_HDR0,
+	[MUTEX_MOD_IDX_MDP_HDR1] = MT8195_MUTEX_MOD_MDP_HDR1,
+	[MUTEX_MOD_IDX_MDP_HDR2] = MT8195_MUTEX_MOD_MDP_HDR2,
+	[MUTEX_MOD_IDX_MDP_HDR3] = MT8195_MUTEX_MOD_MDP_HDR3,
+	[MUTEX_MOD_IDX_MDP_AAL0] = MT8195_MUTEX_MOD_MDP_AAL0,
+	[MUTEX_MOD_IDX_MDP_AAL1] = MT8195_MUTEX_MOD_MDP_AAL1,
+	[MUTEX_MOD_IDX_MDP_AAL2] = MT8195_MUTEX_MOD_MDP_AAL2,
+	[MUTEX_MOD_IDX_MDP_AAL3] = MT8195_MUTEX_MOD_MDP_AAL3,
+	[MUTEX_MOD_IDX_MDP_RSZ0] = MT8195_MUTEX_MOD_MDP_RSZ0,
+	[MUTEX_MOD_IDX_MDP_RSZ1] = MT8195_MUTEX_MOD_MDP_RSZ1,
+	[MUTEX_MOD_IDX_MDP_RSZ2] = MT8195_MUTEX_MOD_MDP_RSZ2,
+	[MUTEX_MOD_IDX_MDP_RSZ3] = MT8195_MUTEX_MOD_MDP_RSZ3,
+	[MUTEX_MOD_IDX_MDP_MERGE2] = MT8195_MUTEX_MOD_MDP_MERGE2,
+	[MUTEX_MOD_IDX_MDP_MERGE3] = MT8195_MUTEX_MOD_MDP_MERGE3,
+	[MUTEX_MOD_IDX_MDP_TDSHP0] = MT8195_MUTEX_MOD_MDP_TDSHP0,
+	[MUTEX_MOD_IDX_MDP_TDSHP1] = MT8195_MUTEX_MOD_MDP_TDSHP1,
+	[MUTEX_MOD_IDX_MDP_TDSHP2] = MT8195_MUTEX_MOD_MDP_TDSHP2,
+	[MUTEX_MOD_IDX_MDP_TDSHP3] = MT8195_MUTEX_MOD_MDP_TDSHP3,
+	[MUTEX_MOD_IDX_MDP_COLOR0] = MT8195_MUTEX_MOD_MDP_COLOR0,
+	[MUTEX_MOD_IDX_MDP_COLOR1] = MT8195_MUTEX_MOD_MDP_COLOR1,
+	[MUTEX_MOD_IDX_MDP_COLOR2] = MT8195_MUTEX_MOD_MDP_COLOR2,
+	[MUTEX_MOD_IDX_MDP_COLOR3] = MT8195_MUTEX_MOD_MDP_COLOR3,
+	[MUTEX_MOD_IDX_MDP_OVL0] = MT8195_MUTEX_MOD_MDP_OVL0,
+	[MUTEX_MOD_IDX_MDP_OVL1] = MT8195_MUTEX_MOD_MDP_OVL1,
+	[MUTEX_MOD_IDX_MDP_PAD0] = MT8195_MUTEX_MOD_MDP_PAD0,
+	[MUTEX_MOD_IDX_MDP_PAD1] = MT8195_MUTEX_MOD_MDP_PAD1,
+	[MUTEX_MOD_IDX_MDP_PAD2] = MT8195_MUTEX_MOD_MDP_PAD2,
+	[MUTEX_MOD_IDX_MDP_PAD3] = MT8195_MUTEX_MOD_MDP_PAD3,
+	[MUTEX_MOD_IDX_MDP_TCC0] = MT8195_MUTEX_MOD_MDP_TCC0,
+	[MUTEX_MOD_IDX_MDP_TCC1] = MT8195_MUTEX_MOD_MDP_TCC1,
+	[MUTEX_MOD_IDX_MDP_WROT0] = MT8195_MUTEX_MOD_MDP_WROT0,
+	[MUTEX_MOD_IDX_MDP_WROT1] = MT8195_MUTEX_MOD_MDP_WROT1,
+	[MUTEX_MOD_IDX_MDP_WROT2] = MT8195_MUTEX_MOD_MDP_WROT2,
+	[MUTEX_MOD_IDX_MDP_WROT3] = MT8195_MUTEX_MOD_MDP_WROT3,
+};
+
 static const unsigned int mt8365_mutex_mod[DDP_COMPONENT_ID_MAX] = {
 	[DDP_COMPONENT_AAL0] = MT8365_MUTEX_MOD_DISP_AAL,
 	[DDP_COMPONENT_CCORR] = MT8365_MUTEX_MOD_DISP_CCORR,
@@ -520,6 +613,13 @@ static const struct mtk_mutex_data mt8195_mutex_driver_data = {
 	.mutex_sof_reg = MT8183_MUTEX0_SOF0,
 };
 
+static const struct mtk_mutex_data mt8195_vpp_mutex_driver_data = {
+	.mutex_sof = mt8195_mutex_sof,
+	.mutex_mod_reg = MT8183_MUTEX0_MOD0,
+	.mutex_sof_reg = MT8183_MUTEX0_SOF0,
+	.mutex_table_mod = mt8195_mutex_table_mod,
+};
+
 static const struct mtk_mutex_data mt8365_mutex_driver_data = {
 	.mutex_mod = mt8365_mutex_mod,
 	.mutex_sof = mt8183_mutex_sof,
@@ -877,6 +977,8 @@ static const struct of_device_id mutex_driver_dt_match[] = {
 	  .data = &mt8192_mutex_driver_data},
 	{ .compatible = "mediatek,mt8195-disp-mutex",
 	  .data = &mt8195_mutex_driver_data},
+	{ .compatible = "mediatek,mt8195-vpp-mutex",
+	  .data = &mt8195_vpp_mutex_driver_data},
 	{ .compatible = "mediatek,mt8365-disp-mutex",
 	  .data = &mt8365_mutex_driver_data},
 	{},
diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/mediatek/mtk-mutex.h
index b335c2837cd8..635218e3ac68 100644
--- a/include/linux/soc/mediatek/mtk-mutex.h
+++ b/include/linux/soc/mediatek/mtk-mutex.h
@@ -22,6 +22,41 @@ enum mtk_mutex_mod_index {
 	MUTEX_MOD_IDX_MDP_CCORR0,
 	MUTEX_MOD_IDX_MDP_HDR0,
 	MUTEX_MOD_IDX_MDP_COLOR0,
+	MUTEX_MOD_IDX_MDP_RDMA1,
+	MUTEX_MOD_IDX_MDP_RDMA2,
+	MUTEX_MOD_IDX_MDP_RDMA3,
+	MUTEX_MOD_IDX_MDP_STITCH0,
+	MUTEX_MOD_IDX_MDP_FG0,
+	MUTEX_MOD_IDX_MDP_FG1,
+	MUTEX_MOD_IDX_MDP_FG2,
+	MUTEX_MOD_IDX_MDP_FG3,
+	MUTEX_MOD_IDX_MDP_HDR1,
+	MUTEX_MOD_IDX_MDP_HDR2,
+	MUTEX_MOD_IDX_MDP_HDR3,
+	MUTEX_MOD_IDX_MDP_AAL1,
+	MUTEX_MOD_IDX_MDP_AAL2,
+	MUTEX_MOD_IDX_MDP_AAL3,
+	MUTEX_MOD_IDX_MDP_RSZ2,
+	MUTEX_MOD_IDX_MDP_RSZ3,
+	MUTEX_MOD_IDX_MDP_MERGE2,
+	MUTEX_MOD_IDX_MDP_MERGE3,
+	MUTEX_MOD_IDX_MDP_TDSHP1,
+	MUTEX_MOD_IDX_MDP_TDSHP2,
+	MUTEX_MOD_IDX_MDP_TDSHP3,
+	MUTEX_MOD_IDX_MDP_COLOR1,
+	MUTEX_MOD_IDX_MDP_COLOR2,
+	MUTEX_MOD_IDX_MDP_COLOR3,
+	MUTEX_MOD_IDX_MDP_OVL0,
+	MUTEX_MOD_IDX_MDP_OVL1,
+	MUTEX_MOD_IDX_MDP_PAD0,
+	MUTEX_MOD_IDX_MDP_PAD1,
+	MUTEX_MOD_IDX_MDP_PAD2,
+	MUTEX_MOD_IDX_MDP_PAD3,
+	MUTEX_MOD_IDX_MDP_TCC0,
+	MUTEX_MOD_IDX_MDP_TCC1,
+	MUTEX_MOD_IDX_MDP_WROT1,
+	MUTEX_MOD_IDX_MDP_WROT2,
+	MUTEX_MOD_IDX_MDP_WROT3,
 
 	MUTEX_MOD_IDX_MAX		/* ALWAYS keep at the end */
 };
-- 
2.18.0


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Re: [PATCH v4 3/8] arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS

[AngeloGioacchino Del Regno]

Il 07/12/22 10:49, Moudy Ho ha scritto:
> From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>
> 
> With the change of the MMSYS binding file for MT8195, the compatible
> name of VPPSYS in dts need to be fixed to match the definition.
> 
> Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Re: [PATCH v4 3/8] arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS

[AngeloGioacchino Del Regno]

Il 07/12/22 10:49, Moudy Ho ha scritto:
> From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>
> 
> With the change of the MMSYS binding file for MT8195, the compatible
> name of VPPSYS in dts need to be fixed to match the definition.
> 
> Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>



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Re: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[AngeloGioacchino Del Regno]

Il 07/12/22 10:49, Moudy Ho ha scritto:
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Re: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[AngeloGioacchino Del Regno]

Il 07/12/22 10:49, Moudy Ho ha scritto:
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>



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Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Matthias Brugger]

Whole series applied, thanks!

On 07/12/2022 10:49, Moudy Ho wrote:
> From: mtk18742 <moudy.ho@mediatek.com>
> 
> Changes since v3:
> - Rebase on linux-next
> 
> Changes since v2:
> - Depend on :
>    [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
> - Split dts settings into two patches based on belonging to MMSYS or MUTEX.
> 
> Changes since v1:
> - Depend on :
>    [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
> - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding file.
> - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
> - Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config() to
>    mtk_mmsys_vpp_rsz_merge_config() and mtk_mmsys_vpp_rsz_dcm_config().
> - Clean up mtk_mmsys_vpp_rsz_dcm_config().
> - Add a comment to mtk_mutex_write_mod() and clean it up for use in more
>    than 32 mods.
> 
> Hi,
> 
> This series add support for MT8195's two VPPSYS(Video Processor Pipe Subsystem),
> under which there will be corresponding MMSYS and MUTEX settings that
> need to be configured.
> 
> Moudy Ho (2):
>    dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
>    arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS
> 
> Roy-CW.Yeh (6):
>    dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
>    arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS
>    soc: mediatek: mmsys: add support for MT8195 VPPSYS
>    soc: mediatek: mmsys: add config api for RSZ switching and DCM
>    soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1
>    soc: mediatek: mutex: support MT8195 VPPSYS
> 
>   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
>   .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
>   arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
>   drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
>   drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
>   drivers/soc/mediatek/mtk-mmsys.h              |   1 +
>   drivers/soc/mediatek/mtk-mutex.c              | 135 +++++++++++++++++-
>   include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
>   include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
>   9 files changed, 274 insertions(+), 12 deletions(-)
> 

Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Matthias Brugger]

Whole series applied, thanks!

On 07/12/2022 10:49, Moudy Ho wrote:
> From: mtk18742 <moudy.ho@mediatek.com>
> 
> Changes since v3:
> - Rebase on linux-next
> 
> Changes since v2:
> - Depend on :
>    [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
> - Split dts settings into two patches based on belonging to MMSYS or MUTEX.
> 
> Changes since v1:
> - Depend on :
>    [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
> - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding file.
> - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
> - Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config() to
>    mtk_mmsys_vpp_rsz_merge_config() and mtk_mmsys_vpp_rsz_dcm_config().
> - Clean up mtk_mmsys_vpp_rsz_dcm_config().
> - Add a comment to mtk_mutex_write_mod() and clean it up for use in more
>    than 32 mods.
> 
> Hi,
> 
> This series add support for MT8195's two VPPSYS(Video Processor Pipe Subsystem),
> under which there will be corresponding MMSYS and MUTEX settings that
> need to be configured.
> 
> Moudy Ho (2):
>    dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
>    arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS
> 
> Roy-CW.Yeh (6):
>    dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
>    arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS
>    soc: mediatek: mmsys: add support for MT8195 VPPSYS
>    soc: mediatek: mmsys: add config api for RSZ switching and DCM
>    soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1
>    soc: mediatek: mutex: support MT8195 VPPSYS
> 
>   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
>   .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
>   arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
>   drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
>   drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
>   drivers/soc/mediatek/mtk-mmsys.h              |   1 +
>   drivers/soc/mediatek/mtk-mutex.c              | 135 +++++++++++++++++-
>   include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
>   include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
>   9 files changed, 274 insertions(+), 12 deletions(-)
> 

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Re: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[Rob Herring]

On Wed, Dec 7, 2022 at 3:49 AM Moudy Ho <moudy.ho@mediatek.com> wrote:
>
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)

This landed in today's linux-next causing the following binding
warnings. Is this a fix? Only fixes for 6.2 should be added during the
merge window.

/builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.example.dtb:
clock-controller@14000000: $nodename:0: 'clock-controller@14000000'
does not match '^syscon@[0-9a-f]+$'
        From schema:
/builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
/builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.example.dtb:
clock-controller@14000000: compatible: 'oneOf' conditional failed, one
must be fixed:
        ['mediatek,mt8195-vppsys0'] is too short
        'mediatek,mt8195-vppsys0' is not one of
['mediatek,mt2701-mmsys', 'mediatek,mt2712-mmsys',
'mediatek,mt6765-mmsys', 'mediatek,mt6779-mmsys',
'mediatek,mt6795-mmsys', 'mediatek,mt6797-mmsys',
'mediatek,mt8167-mmsys', 'mediatek,mt8173-mmsys',
'mediatek,mt8183-mmsys', 'mediatek,mt8186-mmsys',
'mediatek,mt8188-vdosys0', 'mediatek,mt8192-mmsys',
'mediatek,mt8365-mmsys']
        'mediatek,mt8195-mmsys' was expected
        'mediatek,mt7623-mmsys' was expected
        From schema:
/builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml

Re: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[Rob Herring]

On Wed, Dec 7, 2022 at 3:49 AM Moudy Ho <moudy.ho@mediatek.com> wrote:
>
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)

This landed in today's linux-next causing the following binding
warnings. Is this a fix? Only fixes for 6.2 should be added during the
merge window.

/builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.example.dtb:
clock-controller@14000000: $nodename:0: 'clock-controller@14000000'
does not match '^syscon@[0-9a-f]+$'
        From schema:
/builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
/builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.example.dtb:
clock-controller@14000000: compatible: 'oneOf' conditional failed, one
must be fixed:
        ['mediatek,mt8195-vppsys0'] is too short
        'mediatek,mt8195-vppsys0' is not one of
['mediatek,mt2701-mmsys', 'mediatek,mt2712-mmsys',
'mediatek,mt6765-mmsys', 'mediatek,mt6779-mmsys',
'mediatek,mt6795-mmsys', 'mediatek,mt6797-mmsys',
'mediatek,mt8167-mmsys', 'mediatek,mt8173-mmsys',
'mediatek,mt8183-mmsys', 'mediatek,mt8186-mmsys',
'mediatek,mt8188-vdosys0', 'mediatek,mt8192-mmsys',
'mediatek,mt8365-mmsys']
        'mediatek,mt8195-mmsys' was expected
        'mediatek,mt7623-mmsys' was expected
        From schema:
/builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml

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Re: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[Matthias Brugger]

On 19/12/2022 14:44, Rob Herring wrote:
> On Wed, Dec 7, 2022 at 3:49 AM Moudy Ho <moudy.ho@mediatek.com> wrote:
>>
>> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
>> hardware differences in power domains, clocks and subsystem counts,
>> which should be determined by compatible names.
>>
>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> ---
>>   .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
>>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> This landed in today's linux-next causing the following binding
> warnings. Is this a fix? Only fixes for 6.2 should be added during the
> merge window.
> 

No it's not a fix, it's queued for the next -rc phase. I didn't know of the 
limitation of linux-next only allowing fixes in the merge window.

Actually the patch is wrong. It shouldn't include "mediatek,mt8195-mmsys" as 
fallback for mediatek,mt8195-vppsys[0,1].

I'll revert the whole series from v6.2-tmp/dts64 and v6.2-tmp/soc

Regards,
Matthias

> /builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.example.dtb:
> clock-controller@14000000: $nodename:0: 'clock-controller@14000000'
> does not match '^syscon@[0-9a-f]+$'
>          From schema:
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.example.dtb:
> clock-controller@14000000: compatible: 'oneOf' conditional failed, one
> must be fixed:
>          ['mediatek,mt8195-vppsys0'] is too short
>          'mediatek,mt8195-vppsys0' is not one of
> ['mediatek,mt2701-mmsys', 'mediatek,mt2712-mmsys',
> 'mediatek,mt6765-mmsys', 'mediatek,mt6779-mmsys',
> 'mediatek,mt6795-mmsys', 'mediatek,mt6797-mmsys',
> 'mediatek,mt8167-mmsys', 'mediatek,mt8173-mmsys',
> 'mediatek,mt8183-mmsys', 'mediatek,mt8186-mmsys',
> 'mediatek,mt8188-vdosys0', 'mediatek,mt8192-mmsys',
> 'mediatek,mt8365-mmsys']
>          'mediatek,mt8195-mmsys' was expected
>          'mediatek,mt7623-mmsys' was expected
>          From schema:
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml

Re: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[Matthias Brugger]

On 19/12/2022 14:44, Rob Herring wrote:
> On Wed, Dec 7, 2022 at 3:49 AM Moudy Ho <moudy.ho@mediatek.com> wrote:
>>
>> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
>> hardware differences in power domains, clocks and subsystem counts,
>> which should be determined by compatible names.
>>
>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> ---
>>   .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
>>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> This landed in today's linux-next causing the following binding
> warnings. Is this a fix? Only fixes for 6.2 should be added during the
> merge window.
> 

No it's not a fix, it's queued for the next -rc phase. I didn't know of the 
limitation of linux-next only allowing fixes in the merge window.

Actually the patch is wrong. It shouldn't include "mediatek,mt8195-mmsys" as 
fallback for mediatek,mt8195-vppsys[0,1].

I'll revert the whole series from v6.2-tmp/dts64 and v6.2-tmp/soc

Regards,
Matthias

> /builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.example.dtb:
> clock-controller@14000000: $nodename:0: 'clock-controller@14000000'
> does not match '^syscon@[0-9a-f]+$'
>          From schema:
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.example.dtb:
> clock-controller@14000000: compatible: 'oneOf' conditional failed, one
> must be fixed:
>          ['mediatek,mt8195-vppsys0'] is too short
>          'mediatek,mt8195-vppsys0' is not one of
> ['mediatek,mt2701-mmsys', 'mediatek,mt2712-mmsys',
> 'mediatek,mt6765-mmsys', 'mediatek,mt6779-mmsys',
> 'mediatek,mt6795-mmsys', 'mediatek,mt6797-mmsys',
> 'mediatek,mt8167-mmsys', 'mediatek,mt8173-mmsys',
> 'mediatek,mt8183-mmsys', 'mediatek,mt8186-mmsys',
> 'mediatek,mt8188-vdosys0', 'mediatek,mt8192-mmsys',
> 'mediatek,mt8365-mmsys']
>          'mediatek,mt8195-mmsys' was expected
>          'mediatek,mt7623-mmsys' was expected
>          From schema:
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml

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Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Matthias Brugger]

On 16/12/2022 13:33, Matthias Brugger wrote:
> 
> Whole series applied, thanks!
> 

And now, whole series reverted, please see comment in 1/8.

Regards,
Matthias

> On 07/12/2022 10:49, Moudy Ho wrote:
>> From: mtk18742 <moudy.ho@mediatek.com>
>>
>> Changes since v3:
>> - Rebase on linux-next
>>
>> Changes since v2:
>> - Depend on :
>>    [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
>> - Split dts settings into two patches based on belonging to MMSYS or MUTEX.
>>
>> Changes since v1:
>> - Depend on :
>>    [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
>> - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding file.
>> - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
>> - Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config() to
>>    mtk_mmsys_vpp_rsz_merge_config() and mtk_mmsys_vpp_rsz_dcm_config().
>> - Clean up mtk_mmsys_vpp_rsz_dcm_config().
>> - Add a comment to mtk_mutex_write_mod() and clean it up for use in more
>>    than 32 mods.
>>
>> Hi,
>>
>> This series add support for MT8195's two VPPSYS(Video Processor Pipe Subsystem),
>> under which there will be corresponding MMSYS and MUTEX settings that
>> need to be configured.
>>
>> Moudy Ho (2):
>>    dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
>>    arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS
>>
>> Roy-CW.Yeh (6):
>>    dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
>>    arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS
>>    soc: mediatek: mmsys: add support for MT8195 VPPSYS
>>    soc: mediatek: mmsys: add config api for RSZ switching and DCM
>>    soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1
>>    soc: mediatek: mutex: support MT8195 VPPSYS
>>
>>   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
>>   .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
>>   arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
>>   drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
>>   drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
>>   drivers/soc/mediatek/mtk-mmsys.h              |   1 +
>>   drivers/soc/mediatek/mtk-mutex.c              | 135 +++++++++++++++++-
>>   include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
>>   include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
>>   9 files changed, 274 insertions(+), 12 deletions(-)
>>

Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Matthias Brugger]

On 16/12/2022 13:33, Matthias Brugger wrote:
> 
> Whole series applied, thanks!
> 

And now, whole series reverted, please see comment in 1/8.

Regards,
Matthias

> On 07/12/2022 10:49, Moudy Ho wrote:
>> From: mtk18742 <moudy.ho@mediatek.com>
>>
>> Changes since v3:
>> - Rebase on linux-next
>>
>> Changes since v2:
>> - Depend on :
>>    [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
>> - Split dts settings into two patches based on belonging to MMSYS or MUTEX.
>>
>> Changes since v1:
>> - Depend on :
>>    [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097
>> - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding file.
>> - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
>> - Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config() to
>>    mtk_mmsys_vpp_rsz_merge_config() and mtk_mmsys_vpp_rsz_dcm_config().
>> - Clean up mtk_mmsys_vpp_rsz_dcm_config().
>> - Add a comment to mtk_mutex_write_mod() and clean it up for use in more
>>    than 32 mods.
>>
>> Hi,
>>
>> This series add support for MT8195's two VPPSYS(Video Processor Pipe Subsystem),
>> under which there will be corresponding MMSYS and MUTEX settings that
>> need to be configured.
>>
>> Moudy Ho (2):
>>    dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
>>    arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS
>>
>> Roy-CW.Yeh (6):
>>    dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
>>    arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS
>>    soc: mediatek: mmsys: add support for MT8195 VPPSYS
>>    soc: mediatek: mmsys: add config api for RSZ switching and DCM
>>    soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1
>>    soc: mediatek: mutex: support MT8195 VPPSYS
>>
>>   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
>>   .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
>>   arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
>>   drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
>>   drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
>>   drivers/soc/mediatek/mtk-mmsys.h              |   1 +
>>   drivers/soc/mediatek/mtk-mutex.c              | 135 +++++++++++++++++-
>>   include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
>>   include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
>>   9 files changed, 274 insertions(+), 12 deletions(-)
>>

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Re: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[Krzysztof Kozlowski]

On 19/12/2022 16:17, Matthias Brugger wrote:
> 
> 
> On 19/12/2022 14:44, Rob Herring wrote:
>> On Wed, Dec 7, 2022 at 3:49 AM Moudy Ho <moudy.ho@mediatek.com> wrote:
>>>
>>> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
>>> hardware differences in power domains, clocks and subsystem counts,
>>> which should be determined by compatible names.
>>>
>>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>> ---
>>>   .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
>>>   1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> This landed in today's linux-next causing the following binding
>> warnings. Is this a fix? Only fixes for 6.2 should be added during the
>> merge window.
>>
> 
> No it's not a fix, it's queued for the next -rc phase. I didn't know of the 
> limitation of linux-next only allowing fixes in the merge window.

Stephen asks for it every time. Now it is in separate email:

https://lore.kernel.org/linux-next/20221213120359.47fc3cad@canb.auug.org.au/

Previously it was in each linux-next announcement:
https://lore.kernel.org/linux-next/20220527164940.6ef5b25e@canb.auug.org.au/

> 
> Actually the patch is wrong. It shouldn't include "mediatek,mt8195-mmsys" as 
> fallback for mediatek,mt8195-vppsys[0,1].
> 
> I'll revert the whole series from v6.2-tmp/dts64 and v6.2-tmp/soc

Thanks. Please, drop all material for next cycle from linux-next.

Best regards,
Krzysztof

Re: [PATCH v4 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS

[Krzysztof Kozlowski]

On 19/12/2022 16:17, Matthias Brugger wrote:
> 
> 
> On 19/12/2022 14:44, Rob Herring wrote:
>> On Wed, Dec 7, 2022 at 3:49 AM Moudy Ho <moudy.ho@mediatek.com> wrote:
>>>
>>> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
>>> hardware differences in power domains, clocks and subsystem counts,
>>> which should be determined by compatible names.
>>>
>>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>> ---
>>>   .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
>>>   1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> This landed in today's linux-next causing the following binding
>> warnings. Is this a fix? Only fixes for 6.2 should be added during the
>> merge window.
>>
> 
> No it's not a fix, it's queued for the next -rc phase. I didn't know of the 
> limitation of linux-next only allowing fixes in the merge window.

Stephen asks for it every time. Now it is in separate email:

https://lore.kernel.org/linux-next/20221213120359.47fc3cad@canb.auug.org.au/

Previously it was in each linux-next announcement:
https://lore.kernel.org/linux-next/20220527164940.6ef5b25e@canb.auug.org.au/

> 
> Actually the patch is wrong. It shouldn't include "mediatek,mt8195-mmsys" as 
> fallback for mediatek,mt8195-vppsys[0,1].
> 
> I'll revert the whole series from v6.2-tmp/dts64 and v6.2-tmp/soc

Thanks. Please, drop all material for next cycle from linux-next.

Best regards,
Krzysztof


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Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Moudy Ho (何宗原)]

On Mon, 2022-12-19 at 16:17 +0100, Matthias Brugger wrote:
> 
> On 16/12/2022 13:33, Matthias Brugger wrote:
> > 
> > Whole series applied, thanks!
> > 
> 
> And now, whole series reverted, please see comment in 1/8.
> 
> Regards,
> Matthias
> 

Hi Matthias,

May I send a new series without a fallback compatible like the mt8188
VDOSYS does?

https://patchwork.kernel.org/project/linux-mediatek/patch/20221206020046.11333-3-nathan.lu@mediatek.com/

Regards,
Moudy
> > On 07/12/2022 10:49, Moudy Ho wrote:
> > > From: mtk18742 <moudy.ho@mediatek.com>
> > > 
> > > Changes since v3:
> > > - Rebase on linux-next
> > > 
> > > Changes since v2:
> > > - Depend on :
> > >    [1] 
> > > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$ 
> > >  
> > > - Split dts settings into two patches based on belonging to MMSYS
> > > or MUTEX.
> > > 
> > > Changes since v1:
> > > - Depend on :
> > >    [1] 
> > > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$ 
> > >  
> > > - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding
> > > file.
> > > - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
> > > - Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config()
> > > to
> > >    mtk_mmsys_vpp_rsz_merge_config() and
> > > mtk_mmsys_vpp_rsz_dcm_config().
> > > - Clean up mtk_mmsys_vpp_rsz_dcm_config().
> > > - Add a comment to mtk_mutex_write_mod() and clean it up for use
> > > in more
> > >    than 32 mods.
> > > 
> > > Hi,
> > > 
> > > This series add support for MT8195's two VPPSYS(Video Processor
> > > Pipe Subsystem),
> > > under which there will be corresponding MMSYS and MUTEX settings
> > > that
> > > need to be configured.
> > > 
> > > Moudy Ho (2):
> > >    dt-bindings: arm: mediatek: mmsys: Add support for MT8195
> > > VPPSYS
> > >    arm64: dts: mediatek: mt8195: add MUTEX configuration for
> > > VPPSYS
> > > 
> > > Roy-CW.Yeh (6):
> > >    dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
> > >    arm64: dts: mediatek: mt8195: add MMSYS configuration for
> > > VPPSYS
> > >    soc: mediatek: mmsys: add support for MT8195 VPPSYS
> > >    soc: mediatek: mmsys: add config api for RSZ switching and DCM
> > >    soc: mediatek: mutex: Add mtk_mutex_set_mod support to set
> > > MOD1
> > >    soc: mediatek: mutex: support MT8195 VPPSYS
> > > 
> > >   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
> > >   .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
> > >   arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
> > >   drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
> > >   drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
> > >   drivers/soc/mediatek/mtk-mmsys.h              |   1 +
> > >   drivers/soc/mediatek/mtk-mutex.c              | 135
> > > +++++++++++++++++-
> > >   include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
> > >   include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
> > >   9 files changed, 274 insertions(+), 12 deletions(-)
> > > 

Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Moudy Ho (何宗原)]

On Mon, 2022-12-19 at 16:17 +0100, Matthias Brugger wrote:
> 
> On 16/12/2022 13:33, Matthias Brugger wrote:
> > 
> > Whole series applied, thanks!
> > 
> 
> And now, whole series reverted, please see comment in 1/8.
> 
> Regards,
> Matthias
> 

Hi Matthias,

May I send a new series without a fallback compatible like the mt8188
VDOSYS does?

https://patchwork.kernel.org/project/linux-mediatek/patch/20221206020046.11333-3-nathan.lu@mediatek.com/

Regards,
Moudy
> > On 07/12/2022 10:49, Moudy Ho wrote:
> > > From: mtk18742 <moudy.ho@mediatek.com>
> > > 
> > > Changes since v3:
> > > - Rebase on linux-next
> > > 
> > > Changes since v2:
> > > - Depend on :
> > >    [1] 
> > > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$ 
> > >  
> > > - Split dts settings into two patches based on belonging to MMSYS
> > > or MUTEX.
> > > 
> > > Changes since v1:
> > > - Depend on :
> > >    [1] 
> > > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$ 
> > >  
> > > - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding
> > > file.
> > > - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
> > > - Rename mtk_mmsys_merge_config() and mtk_mmsys_rsz_dcm_config()
> > > to
> > >    mtk_mmsys_vpp_rsz_merge_config() and
> > > mtk_mmsys_vpp_rsz_dcm_config().
> > > - Clean up mtk_mmsys_vpp_rsz_dcm_config().
> > > - Add a comment to mtk_mutex_write_mod() and clean it up for use
> > > in more
> > >    than 32 mods.
> > > 
> > > Hi,
> > > 
> > > This series add support for MT8195's two VPPSYS(Video Processor
> > > Pipe Subsystem),
> > > under which there will be corresponding MMSYS and MUTEX settings
> > > that
> > > need to be configured.
> > > 
> > > Moudy Ho (2):
> > >    dt-bindings: arm: mediatek: mmsys: Add support for MT8195
> > > VPPSYS
> > >    arm64: dts: mediatek: mt8195: add MUTEX configuration for
> > > VPPSYS
> > > 
> > > Roy-CW.Yeh (6):
> > >    dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
> > >    arm64: dts: mediatek: mt8195: add MMSYS configuration for
> > > VPPSYS
> > >    soc: mediatek: mmsys: add support for MT8195 VPPSYS
> > >    soc: mediatek: mmsys: add config api for RSZ switching and DCM
> > >    soc: mediatek: mutex: Add mtk_mutex_set_mod support to set
> > > MOD1
> > >    soc: mediatek: mutex: support MT8195 VPPSYS
> > > 
> > >   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
> > >   .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
> > >   arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
> > >   drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
> > >   drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
> > >   drivers/soc/mediatek/mtk-mmsys.h              |   1 +
> > >   drivers/soc/mediatek/mtk-mutex.c              | 135
> > > +++++++++++++++++-
> > >   include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
> > >   include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
> > >   9 files changed, 274 insertions(+), 12 deletions(-)
> > > 
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Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Moudy Ho (何宗原)]

On Tue, 2022-12-20 at 10:14 +0800, moudy ho wrote:
> On Mon, 2022-12-19 at 16:17 +0100, Matthias Brugger wrote:
> > 
> > On 16/12/2022 13:33, Matthias Brugger wrote:
> > > 
> > > Whole series applied, thanks!
> > > 
> > 
> > And now, whole series reverted, please see comment in 1/8.
> > 
> > Regards,
> > Matthias
> > 
> 
> Hi Matthias,
> 
> May I send a new series without a fallback compatible like the mt8188
> VDOSYS does?
> 
> 
https://patchwork.kernel.org/project/linux-mediatek/patch/20221206020046.11333-3-nathan.lu@mediatek.com/
> 
> Regards,
> Moudy

Hi Matthias,

Sorry for the inaccurate information, the warning mentioned in [1/8] is
because vppsys 0/1 has already been defined in "mediatek,mt8195-
clock.yaml" as follows:

https://patchwork.kernel.org/project/linux-mediatek/patch/20210914021633.26377-2-chun-jie.chen@mediatek.com/

Is it possible to fix it by just removing [1/8], or should I send a new
series?

Regards,
Moudy

> > > On 07/12/2022 10:49, Moudy Ho wrote:
> > > > From: mtk18742 <moudy.ho@mediatek.com>
> > > > 
> > > > Changes since v3:
> > > > - Rebase on linux-next
> > > > 
> > > > Changes since v2:
> > > > - Depend on :
> > > >    [1] 
> > > > 
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$
> > > >  
> > > >  
> > > > - Split dts settings into two patches based on belonging to
> > > > MMSYS
> > > > or MUTEX.
> > > > 
> > > > Changes since v1:
> > > > - Depend on :
> > > >    [1] 
> > > > 
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$
> > > >  
> > > >  
> > > > - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding
> > > > file.
> > > > - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
> > > > - Rename mtk_mmsys_merge_config() and
> > > > mtk_mmsys_rsz_dcm_config()
> > > > to
> > > >    mtk_mmsys_vpp_rsz_merge_config() and
> > > > mtk_mmsys_vpp_rsz_dcm_config().
> > > > - Clean up mtk_mmsys_vpp_rsz_dcm_config().
> > > > - Add a comment to mtk_mutex_write_mod() and clean it up for
> > > > use
> > > > in more
> > > >    than 32 mods.
> > > > 
> > > > Hi,
> > > > 
> > > > This series add support for MT8195's two VPPSYS(Video Processor
> > > > Pipe Subsystem),
> > > > under which there will be corresponding MMSYS and MUTEX
> > > > settings
> > > > that
> > > > need to be configured.
> > > > 
> > > > Moudy Ho (2):
> > > >    dt-bindings: arm: mediatek: mmsys: Add support for MT8195
> > > > VPPSYS
> > > >    arm64: dts: mediatek: mt8195: add MUTEX configuration for
> > > > VPPSYS
> > > > 
> > > > Roy-CW.Yeh (6):
> > > >    dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
> > > >    arm64: dts: mediatek: mt8195: add MMSYS configuration for
> > > > VPPSYS
> > > >    soc: mediatek: mmsys: add support for MT8195 VPPSYS
> > > >    soc: mediatek: mmsys: add config api for RSZ switching and
> > > > DCM
> > > >    soc: mediatek: mutex: Add mtk_mutex_set_mod support to set
> > > > MOD1
> > > >    soc: mediatek: mutex: support MT8195 VPPSYS
> > > > 
> > > >   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
> > > >   .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
> > > >   arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
> > > >   drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
> > > >   drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
> > > >   drivers/soc/mediatek/mtk-mmsys.h              |   1 +
> > > >   drivers/soc/mediatek/mtk-mutex.c              | 135
> > > > +++++++++++++++++-
> > > >   include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
> > > >   include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
> > > >   9 files changed, 274 insertions(+), 12 deletions(-)
> > > > 

Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Moudy Ho (何宗原)]

On Tue, 2022-12-20 at 10:14 +0800, moudy ho wrote:
> On Mon, 2022-12-19 at 16:17 +0100, Matthias Brugger wrote:
> > 
> > On 16/12/2022 13:33, Matthias Brugger wrote:
> > > 
> > > Whole series applied, thanks!
> > > 
> > 
> > And now, whole series reverted, please see comment in 1/8.
> > 
> > Regards,
> > Matthias
> > 
> 
> Hi Matthias,
> 
> May I send a new series without a fallback compatible like the mt8188
> VDOSYS does?
> 
> 
https://patchwork.kernel.org/project/linux-mediatek/patch/20221206020046.11333-3-nathan.lu@mediatek.com/
> 
> Regards,
> Moudy

Hi Matthias,

Sorry for the inaccurate information, the warning mentioned in [1/8] is
because vppsys 0/1 has already been defined in "mediatek,mt8195-
clock.yaml" as follows:

https://patchwork.kernel.org/project/linux-mediatek/patch/20210914021633.26377-2-chun-jie.chen@mediatek.com/

Is it possible to fix it by just removing [1/8], or should I send a new
series?

Regards,
Moudy

> > > On 07/12/2022 10:49, Moudy Ho wrote:
> > > > From: mtk18742 <moudy.ho@mediatek.com>
> > > > 
> > > > Changes since v3:
> > > > - Rebase on linux-next
> > > > 
> > > > Changes since v2:
> > > > - Depend on :
> > > >    [1] 
> > > > 
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$
> > > >  
> > > >  
> > > > - Split dts settings into two patches based on belonging to
> > > > MMSYS
> > > > or MUTEX.
> > > > 
> > > > Changes since v1:
> > > > - Depend on :
> > > >    [1] 
> > > > 
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$
> > > >  
> > > >  
> > > > - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding
> > > > file.
> > > > - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
> > > > - Rename mtk_mmsys_merge_config() and
> > > > mtk_mmsys_rsz_dcm_config()
> > > > to
> > > >    mtk_mmsys_vpp_rsz_merge_config() and
> > > > mtk_mmsys_vpp_rsz_dcm_config().
> > > > - Clean up mtk_mmsys_vpp_rsz_dcm_config().
> > > > - Add a comment to mtk_mutex_write_mod() and clean it up for
> > > > use
> > > > in more
> > > >    than 32 mods.
> > > > 
> > > > Hi,
> > > > 
> > > > This series add support for MT8195's two VPPSYS(Video Processor
> > > > Pipe Subsystem),
> > > > under which there will be corresponding MMSYS and MUTEX
> > > > settings
> > > > that
> > > > need to be configured.
> > > > 
> > > > Moudy Ho (2):
> > > >    dt-bindings: arm: mediatek: mmsys: Add support for MT8195
> > > > VPPSYS
> > > >    arm64: dts: mediatek: mt8195: add MUTEX configuration for
> > > > VPPSYS
> > > > 
> > > > Roy-CW.Yeh (6):
> > > >    dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
> > > >    arm64: dts: mediatek: mt8195: add MMSYS configuration for
> > > > VPPSYS
> > > >    soc: mediatek: mmsys: add support for MT8195 VPPSYS
> > > >    soc: mediatek: mmsys: add config api for RSZ switching and
> > > > DCM
> > > >    soc: mediatek: mutex: Add mtk_mutex_set_mod support to set
> > > > MOD1
> > > >    soc: mediatek: mutex: support MT8195 VPPSYS
> > > > 
> > > >   .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
> > > >   .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
> > > >   arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
> > > >   drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
> > > >   drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
> > > >   drivers/soc/mediatek/mtk-mmsys.h              |   1 +
> > > >   drivers/soc/mediatek/mtk-mutex.c              | 135
> > > > +++++++++++++++++-
> > > >   include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
> > > >   include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
> > > >   9 files changed, 274 insertions(+), 12 deletions(-)
> > > > 
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Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Matthias Brugger]

Hi Moudy,

On 20/12/2022 04:40, Moudy Ho (何宗原) wrote:
> On Tue, 2022-12-20 at 10:14 +0800, moudy ho wrote:
>> On Mon, 2022-12-19 at 16:17 +0100, Matthias Brugger wrote:
>>>
>>> On 16/12/2022 13:33, Matthias Brugger wrote:
>>>>
>>>> Whole series applied, thanks!
>>>>
>>>
>>> And now, whole series reverted, please see comment in 1/8.
>>>
>>> Regards,
>>> Matthias
>>>
>>
>> Hi Matthias,
>>
>> May I send a new series without a fallback compatible like the mt8188
>> VDOSYS does?
>>
>>
> https://patchwork.kernel.org/project/linux-mediatek/patch/20221206020046.11333-3-nathan.lu@mediatek.com/
>>
>> Regards,
>> Moudy
> 
> Hi Matthias,
> 
> Sorry for the inaccurate information, the warning mentioned in [1/8] is
> because vppsys 0/1 has already been defined in "mediatek,mt8195-
> clock.yaml" as follows:
> 
> https://patchwork.kernel.org/project/linux-mediatek/patch/20210914021633.26377-2-chun-jie.chen@mediatek.com/
> 
> Is it possible to fix it by just removing [1/8], or should I send a new
> series?
> 

You will need to remove it from the clock binding and of course from the clock 
drivers. One example is this one:
https://patchwork.kernel.org/project/linux-mediatek/patch/20210914021633.26377-21-chun-jie.chen@mediatek.com/

In the end the mmsys will probe by the compatible and will then probe the clock 
driver as a platform driver.

Best regards,
Matthias


> Regards,
> Moudy
> 
>>>> On 07/12/2022 10:49, Moudy Ho wrote:
>>>>> From: mtk18742 <moudy.ho@mediatek.com>
>>>>>
>>>>> Changes since v3:
>>>>> - Rebase on linux-next
>>>>>
>>>>> Changes since v2:
>>>>> - Depend on :
>>>>>     [1]
>>>>>
> https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$
>>>>>   
>>>>>   
>>>>> - Split dts settings into two patches based on belonging to
>>>>> MMSYS
>>>>> or MUTEX.
>>>>>
>>>>> Changes since v1:
>>>>> - Depend on :
>>>>>     [1]
>>>>>
> https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$
>>>>>   
>>>>>   
>>>>> - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding
>>>>> file.
>>>>> - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
>>>>> - Rename mtk_mmsys_merge_config() and
>>>>> mtk_mmsys_rsz_dcm_config()
>>>>> to
>>>>>     mtk_mmsys_vpp_rsz_merge_config() and
>>>>> mtk_mmsys_vpp_rsz_dcm_config().
>>>>> - Clean up mtk_mmsys_vpp_rsz_dcm_config().
>>>>> - Add a comment to mtk_mutex_write_mod() and clean it up for
>>>>> use
>>>>> in more
>>>>>     than 32 mods.
>>>>>
>>>>> Hi,
>>>>>
>>>>> This series add support for MT8195's two VPPSYS(Video Processor
>>>>> Pipe Subsystem),
>>>>> under which there will be corresponding MMSYS and MUTEX
>>>>> settings
>>>>> that
>>>>> need to be configured.
>>>>>
>>>>> Moudy Ho (2):
>>>>>     dt-bindings: arm: mediatek: mmsys: Add support for MT8195
>>>>> VPPSYS
>>>>>     arm64: dts: mediatek: mt8195: add MUTEX configuration for
>>>>> VPPSYS
>>>>>
>>>>> Roy-CW.Yeh (6):
>>>>>     dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
>>>>>     arm64: dts: mediatek: mt8195: add MMSYS configuration for
>>>>> VPPSYS
>>>>>     soc: mediatek: mmsys: add support for MT8195 VPPSYS
>>>>>     soc: mediatek: mmsys: add config api for RSZ switching and
>>>>> DCM
>>>>>     soc: mediatek: mutex: Add mtk_mutex_set_mod support to set
>>>>> MOD1
>>>>>     soc: mediatek: mutex: support MT8195 VPPSYS
>>>>>
>>>>>    .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
>>>>>    .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
>>>>>    arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
>>>>>    drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
>>>>>    drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
>>>>>    drivers/soc/mediatek/mtk-mmsys.h              |   1 +
>>>>>    drivers/soc/mediatek/mtk-mutex.c              | 135
>>>>> +++++++++++++++++-
>>>>>    include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
>>>>>    include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
>>>>>    9 files changed, 274 insertions(+), 12 deletions(-)
>>>>>

Re: [PATCH v4 0/8] add support MDP3 on MT8195 platform

[Matthias Brugger]

Hi Moudy,

On 20/12/2022 04:40, Moudy Ho (何宗原) wrote:
> On Tue, 2022-12-20 at 10:14 +0800, moudy ho wrote:
>> On Mon, 2022-12-19 at 16:17 +0100, Matthias Brugger wrote:
>>>
>>> On 16/12/2022 13:33, Matthias Brugger wrote:
>>>>
>>>> Whole series applied, thanks!
>>>>
>>>
>>> And now, whole series reverted, please see comment in 1/8.
>>>
>>> Regards,
>>> Matthias
>>>
>>
>> Hi Matthias,
>>
>> May I send a new series without a fallback compatible like the mt8188
>> VDOSYS does?
>>
>>
> https://patchwork.kernel.org/project/linux-mediatek/patch/20221206020046.11333-3-nathan.lu@mediatek.com/
>>
>> Regards,
>> Moudy
> 
> Hi Matthias,
> 
> Sorry for the inaccurate information, the warning mentioned in [1/8] is
> because vppsys 0/1 has already been defined in "mediatek,mt8195-
> clock.yaml" as follows:
> 
> https://patchwork.kernel.org/project/linux-mediatek/patch/20210914021633.26377-2-chun-jie.chen@mediatek.com/
> 
> Is it possible to fix it by just removing [1/8], or should I send a new
> series?
> 

You will need to remove it from the clock binding and of course from the clock 
drivers. One example is this one:
https://patchwork.kernel.org/project/linux-mediatek/patch/20210914021633.26377-21-chun-jie.chen@mediatek.com/

In the end the mmsys will probe by the compatible and will then probe the clock 
driver as a platform driver.

Best regards,
Matthias


> Regards,
> Moudy
> 
>>>> On 07/12/2022 10:49, Moudy Ho wrote:
>>>>> From: mtk18742 <moudy.ho@mediatek.com>
>>>>>
>>>>> Changes since v3:
>>>>> - Rebase on linux-next
>>>>>
>>>>> Changes since v2:
>>>>> - Depend on :
>>>>>     [1]
>>>>>
> https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$
>>>>>   
>>>>>   
>>>>> - Split dts settings into two patches based on belonging to
>>>>> MMSYS
>>>>> or MUTEX.
>>>>>
>>>>> Changes since v1:
>>>>> - Depend on :
>>>>>     [1]
>>>>>
> https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=681097__;!!CTRNKA9wMg0ARbw!giZVy8TiFNylgWKOjI75fSmleN6UlckPuiXzFf5jbdVgFbHdIxG3d3Jvkqp7Eka73I2TmataD_d5QjzBnk6-sYY$
>>>>>   
>>>>>   
>>>>> - Add compatible names to VPPSYS0 and VPPSYS1 in MMSYS binding
>>>>> file.
>>>>> - Fix VPPSYS's MMSYS and MUTEX dts to pass the dtsb_check.
>>>>> - Rename mtk_mmsys_merge_config() and
>>>>> mtk_mmsys_rsz_dcm_config()
>>>>> to
>>>>>     mtk_mmsys_vpp_rsz_merge_config() and
>>>>> mtk_mmsys_vpp_rsz_dcm_config().
>>>>> - Clean up mtk_mmsys_vpp_rsz_dcm_config().
>>>>> - Add a comment to mtk_mutex_write_mod() and clean it up for
>>>>> use
>>>>> in more
>>>>>     than 32 mods.
>>>>>
>>>>> Hi,
>>>>>
>>>>> This series add support for MT8195's two VPPSYS(Video Processor
>>>>> Pipe Subsystem),
>>>>> under which there will be corresponding MMSYS and MUTEX
>>>>> settings
>>>>> that
>>>>> need to be configured.
>>>>>
>>>>> Moudy Ho (2):
>>>>>     dt-bindings: arm: mediatek: mmsys: Add support for MT8195
>>>>> VPPSYS
>>>>>     arm64: dts: mediatek: mt8195: add MUTEX configuration for
>>>>> VPPSYS
>>>>>
>>>>> Roy-CW.Yeh (6):
>>>>>     dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS
>>>>>     arm64: dts: mediatek: mt8195: add MMSYS configuration for
>>>>> VPPSYS
>>>>>     soc: mediatek: mmsys: add support for MT8195 VPPSYS
>>>>>     soc: mediatek: mmsys: add config api for RSZ switching and
>>>>> DCM
>>>>>     soc: mediatek: mutex: Add mtk_mutex_set_mod support to set
>>>>> MOD1
>>>>>     soc: mediatek: mutex: support MT8195 VPPSYS
>>>>>
>>>>>    .../bindings/arm/mediatek/mediatek,mmsys.yaml |   5 +-
>>>>>    .../bindings/soc/mediatek/mediatek,mutex.yaml |   1 +
>>>>>    arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  28 +++-
>>>>>    drivers/soc/mediatek/mt8195-mmsys.h           |  13 ++
>>>>>    drivers/soc/mediatek/mtk-mmsys.c              |  64 +++++++++
>>>>>    drivers/soc/mediatek/mtk-mmsys.h              |   1 +
>>>>>    drivers/soc/mediatek/mtk-mutex.c              | 135
>>>>> +++++++++++++++++-
>>>>>    include/linux/soc/mediatek/mtk-mmsys.h        |   4 +
>>>>>    include/linux/soc/mediatek/mtk-mutex.h        |  35 +++++
>>>>>    9 files changed, 274 insertions(+), 12 deletions(-)
>>>>>

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