* [PATCH 0/4] target/alpha: Use tcg_constant_* @ 2021-07-08 18:25 Richard Henderson 2021-07-08 18:25 ` [PATCH 1/4] target/alpha: Store set into rx flag Richard Henderson ` (3 more replies) 0 siblings, 4 replies; 8+ messages in thread From: Richard Henderson @ 2021-07-08 18:25 UTC (permalink / raw) To: qemu-devel Replace use of tcg_const_*, which makes a copy into a temp which must be freed, with direct use of the constant. r~ Richard Henderson (4): target/alpha: Store set into rx flag target/alpha: Use dest_sink for HW_RET temporary target/alpha: Use tcg_constant_i64 for zero and lit target/alpha: Use tcg_constant_* elsewhere target/alpha/translate.c | 70 +++++++++++----------------------------- 1 file changed, 18 insertions(+), 52 deletions(-) -- 2.25.1 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/4] target/alpha: Store set into rx flag 2021-07-08 18:25 [PATCH 0/4] target/alpha: Use tcg_constant_* Richard Henderson @ 2021-07-08 18:25 ` Richard Henderson 2021-07-08 18:25 ` [PATCH 2/4] target/alpha: Use dest_sink for HW_RET temporary Richard Henderson ` (2 subsequent siblings) 3 siblings, 0 replies; 8+ messages in thread From: Richard Henderson @ 2021-07-08 18:25 UTC (permalink / raw) To: qemu-devel A paste-o meant that we wrote back the existing value of the RX flag rather than changing it to TMP. Use tcg_constant_i64 while we're at it. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/alpha/translate.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index f2922f5f8c..d8bd47de75 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -1116,15 +1116,11 @@ static void gen_msk_l(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit, static void gen_rx(DisasContext *ctx, int ra, int set) { - TCGv tmp; - if (ra != 31) { ld_flag_byte(ctx->ir[ra], ENV_FLAG_RX_SHIFT); } - tmp = tcg_const_i64(set); - st_flag_byte(ctx->ir[ra], ENV_FLAG_RX_SHIFT); - tcg_temp_free(tmp); + st_flag_byte(tcg_constant_i64(set), ENV_FLAG_RX_SHIFT); } static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode) -- 2.25.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/4] target/alpha: Use dest_sink for HW_RET temporary 2021-07-08 18:25 [PATCH 0/4] target/alpha: Use tcg_constant_* Richard Henderson 2021-07-08 18:25 ` [PATCH 1/4] target/alpha: Store set into rx flag Richard Henderson @ 2021-07-08 18:25 ` Richard Henderson 2021-08-04 21:05 ` Philippe Mathieu-Daudé 2021-07-08 18:25 ` [PATCH 3/4] target/alpha: Use tcg_constant_i64 for zero and lit Richard Henderson 2021-07-08 18:25 ` [PATCH 4/4] target/alpha: Use tcg_constant_* elsewhere Richard Henderson 3 siblings, 1 reply; 8+ messages in thread From: Richard Henderson @ 2021-07-08 18:25 UTC (permalink / raw) To: qemu-devel This temp is automatically freed, just like ctx->lit. But we're about to remove ctx->lit, so use sink instead. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/alpha/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index d8bd47de75..5ea091eef5 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -2749,7 +2749,7 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn) /* Pre-EV6 CPUs interpreted this as HW_REI, loading the return address from EXC_ADDR. This turns out to be useful for our emulation PALcode, so continue to accept it. */ - ctx->lit = vb = tcg_temp_new(); + vb = dest_sink(ctx); tcg_gen_ld_i64(vb, cpu_env, offsetof(CPUAlphaState, exc_addr)); } else { vb = load_gpr(ctx, rb); -- 2.25.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/4] target/alpha: Use dest_sink for HW_RET temporary 2021-07-08 18:25 ` [PATCH 2/4] target/alpha: Use dest_sink for HW_RET temporary Richard Henderson @ 2021-08-04 21:05 ` Philippe Mathieu-Daudé 0 siblings, 0 replies; 8+ messages in thread From: Philippe Mathieu-Daudé @ 2021-08-04 21:05 UTC (permalink / raw) To: Richard Henderson, qemu-devel On 7/8/21 8:25 PM, Richard Henderson wrote: > This temp is automatically freed, just like ctx->lit. > But we're about to remove ctx->lit, so use sink instead. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/alpha/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/4] target/alpha: Use tcg_constant_i64 for zero and lit 2021-07-08 18:25 [PATCH 0/4] target/alpha: Use tcg_constant_* Richard Henderson 2021-07-08 18:25 ` [PATCH 1/4] target/alpha: Store set into rx flag Richard Henderson 2021-07-08 18:25 ` [PATCH 2/4] target/alpha: Use dest_sink for HW_RET temporary Richard Henderson @ 2021-07-08 18:25 ` Richard Henderson 2021-07-08 19:10 ` Philippe Mathieu-Daudé 2021-07-08 18:25 ` [PATCH 4/4] target/alpha: Use tcg_constant_* elsewhere Richard Henderson 3 siblings, 1 reply; 8+ messages in thread From: Richard Henderson @ 2021-07-08 18:25 UTC (permalink / raw) To: qemu-devel These constant temps do not need to be freed, and therefore need less bookkeeping from tcg producers. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/alpha/translate.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 5ea091eef5..3fd66fb78d 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -67,8 +67,6 @@ struct DisasContext { /* Temporaries for $31 and $f31 as source and destination. */ TCGv zero; TCGv sink; - /* Temporary for immediate constants. */ - TCGv lit; }; /* Target-specific return values from translate_one, indicating the @@ -158,7 +156,7 @@ void alpha_translate_init(void) static TCGv load_zero(DisasContext *ctx) { if (!ctx->zero) { - ctx->zero = tcg_const_i64(0); + ctx->zero = tcg_constant_i64(0); } return ctx->zero; } @@ -178,14 +176,6 @@ static void free_context_temps(DisasContext *ctx) tcg_temp_free(ctx->sink); ctx->sink = NULL; } - if (ctx->zero) { - tcg_temp_free(ctx->zero); - ctx->zero = NULL; - } - if (ctx->lit) { - tcg_temp_free(ctx->lit); - ctx->lit = NULL; - } } static TCGv load_gpr(DisasContext *ctx, unsigned reg) @@ -201,8 +191,7 @@ static TCGv load_gpr_lit(DisasContext *ctx, unsigned reg, uint8_t lit, bool islit) { if (islit) { - ctx->lit = tcg_const_i64(lit); - return ctx->lit; + return tcg_constant_i64(lit); } else if (likely(reg < 31)) { return ctx->ir[reg]; } else { @@ -3024,7 +3013,6 @@ static void alpha_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) ctx->zero = NULL; ctx->sink = NULL; - ctx->lit = NULL; /* Bound the number of insns to execute to those left on the page. */ if (in_superpage(ctx, ctx->base.pc_first)) { -- 2.25.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 3/4] target/alpha: Use tcg_constant_i64 for zero and lit 2021-07-08 18:25 ` [PATCH 3/4] target/alpha: Use tcg_constant_i64 for zero and lit Richard Henderson @ 2021-07-08 19:10 ` Philippe Mathieu-Daudé 0 siblings, 0 replies; 8+ messages in thread From: Philippe Mathieu-Daudé @ 2021-07-08 19:10 UTC (permalink / raw) To: Richard Henderson, qemu-devel On 7/8/21 8:25 PM, Richard Henderson wrote: > These constant temps do not need to be freed, and > therefore need less bookkeeping from tcg producers. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/alpha/translate.c | 16 ++-------------- > 1 file changed, 2 insertions(+), 14 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 4/4] target/alpha: Use tcg_constant_* elsewhere 2021-07-08 18:25 [PATCH 0/4] target/alpha: Use tcg_constant_* Richard Henderson ` (2 preceding siblings ...) 2021-07-08 18:25 ` [PATCH 3/4] target/alpha: Use tcg_constant_i64 for zero and lit Richard Henderson @ 2021-07-08 18:25 ` Richard Henderson 2021-07-08 19:10 ` Philippe Mathieu-Daudé 3 siblings, 1 reply; 8+ messages in thread From: Richard Henderson @ 2021-07-08 18:25 UTC (permalink / raw) To: qemu-devel Replace the remaining uses of tcg_const_*. These uses are all local, with the allocate and free close together. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/alpha/translate.c | 46 ++++++++++++---------------------------- 1 file changed, 14 insertions(+), 32 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 3fd66fb78d..cf5ad46853 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -251,11 +251,9 @@ static void gen_excp_1(int exception, int error_code) { TCGv_i32 tmp1, tmp2; - tmp1 = tcg_const_i32(exception); - tmp2 = tcg_const_i32(error_code); + tmp1 = tcg_constant_i32(exception); + tmp2 = tcg_constant_i32(error_code); gen_helper_excp(cpu_env, tmp1, tmp2); - tcg_temp_free_i32(tmp2); - tcg_temp_free_i32(tmp1); } static DisasJumpType gen_excp(DisasContext *ctx, int exception, int error_code) @@ -506,15 +504,11 @@ static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, return DISAS_NORETURN; } else { - TCGv_i64 z = tcg_const_i64(0); - TCGv_i64 d = tcg_const_i64(dest); - TCGv_i64 p = tcg_const_i64(ctx->base.pc_next); + TCGv_i64 z = load_zero(ctx); + TCGv_i64 d = tcg_constant_i64(dest); + TCGv_i64 p = tcg_constant_i64(ctx->base.pc_next); tcg_gen_movcond_i64(cond, cpu_pc, cmp, z, d, p); - - tcg_temp_free_i64(z); - tcg_temp_free_i64(d); - tcg_temp_free_i64(p); return DISAS_PC_UPDATED; } } @@ -716,22 +710,19 @@ static void gen_fp_exc_raise(int rc, int fn11) if (!(fn11 & QUAL_I)) { ignore |= FPCR_INE; } - ign = tcg_const_i32(ignore); + ign = tcg_constant_i32(ignore); /* ??? Pass in the regno of the destination so that the helper can set EXC_MASK, which contains a bitmask of destination registers that have caused arithmetic traps. A simple userspace emulation does not require this. We do need it for a guest kernel's entArith, or if we were to do something clever with imprecise exceptions. */ - reg = tcg_const_i32(rc + 32); + reg = tcg_constant_i32(rc + 32); if (fn11 & QUAL_S) { gen_helper_fp_exc_raise_s(cpu_env, ign, reg); } else { gen_helper_fp_exc_raise(cpu_env, ign, reg); } - - tcg_temp_free_i32(reg); - tcg_temp_free_i32(ign); } static void gen_cvtlq(TCGv vc, TCGv vb) @@ -824,7 +815,7 @@ IEEE_INTCVT(cvtqt) static void gen_cpy_mask(TCGv vc, TCGv va, TCGv vb, bool inv_a, uint64_t mask) { - TCGv vmask = tcg_const_i64(mask); + TCGv vmask = tcg_constant_i64(mask); TCGv tmp = tcg_temp_new_i64(); if (inv_a) { @@ -836,7 +827,6 @@ static void gen_cpy_mask(TCGv vc, TCGv va, TCGv vb, bool inv_a, uint64_t mask) tcg_gen_andc_i64(vc, vb, vmask); tcg_gen_or_i64(vc, vc, tmp); - tcg_temp_free(vmask); tcg_temp_free(tmp); } @@ -1210,12 +1200,9 @@ static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode) case 0x3E: /* WTINT */ - { - TCGv_i32 tmp = tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + - offsetof(CPUState, halted)); - tcg_temp_free_i32(tmp); - } + tcg_gen_st_i32(tcg_constant_i32(1), cpu_env, + -offsetof(AlphaCPU, env) + + offsetof(CPUState, halted)); tcg_gen_movi_i64(ctx->ir[IR_V0], 0); return gen_excp(ctx, EXCP_HALTED, 0); @@ -1366,12 +1353,8 @@ static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv vb, int regno) case 253: /* WAIT */ - { - TCGv_i32 tmp = tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + - offsetof(CPUState, halted)); - tcg_temp_free_i32(tmp); - } + tcg_gen_st_i32(tcg_constant_i32(1), cpu_env, + -offsetof(AlphaCPU, env) + offsetof(CPUState, halted)); return gen_excp(ctx, EXCP_HALTED, 0); case 252: @@ -2744,9 +2727,8 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn) vb = load_gpr(ctx, rb); } tcg_gen_movi_i64(cpu_lock_addr, -1); + st_flag_byte(load_zero(ctx), ENV_FLAG_RX_SHIFT); tmp = tcg_temp_new(); - tcg_gen_movi_i64(tmp, 0); - st_flag_byte(tmp, ENV_FLAG_RX_SHIFT); tcg_gen_andi_i64(tmp, vb, 1); st_flag_byte(tmp, ENV_FLAG_PAL_SHIFT); tcg_temp_free(tmp); -- 2.25.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 4/4] target/alpha: Use tcg_constant_* elsewhere 2021-07-08 18:25 ` [PATCH 4/4] target/alpha: Use tcg_constant_* elsewhere Richard Henderson @ 2021-07-08 19:10 ` Philippe Mathieu-Daudé 0 siblings, 0 replies; 8+ messages in thread From: Philippe Mathieu-Daudé @ 2021-07-08 19:10 UTC (permalink / raw) To: Richard Henderson, qemu-devel On 7/8/21 8:25 PM, Richard Henderson wrote: > Replace the remaining uses of tcg_const_*. These uses are > all local, with the allocate and free close together. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/alpha/translate.c | 46 ++++++++++++---------------------------- > 1 file changed, 14 insertions(+), 32 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-08-04 21:06 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-07-08 18:25 [PATCH 0/4] target/alpha: Use tcg_constant_* Richard Henderson 2021-07-08 18:25 ` [PATCH 1/4] target/alpha: Store set into rx flag Richard Henderson 2021-07-08 18:25 ` [PATCH 2/4] target/alpha: Use dest_sink for HW_RET temporary Richard Henderson 2021-08-04 21:05 ` Philippe Mathieu-Daudé 2021-07-08 18:25 ` [PATCH 3/4] target/alpha: Use tcg_constant_i64 for zero and lit Richard Henderson 2021-07-08 19:10 ` Philippe Mathieu-Daudé 2021-07-08 18:25 ` [PATCH 4/4] target/alpha: Use tcg_constant_* elsewhere Richard Henderson 2021-07-08 19:10 ` Philippe Mathieu-Daudé
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