All of lore.kernel.org
 help / color / mirror / Atom feed
From: Laszlo Ersek <lersek@redhat.com>
To: Igor Mammedov <imammedo@redhat.com>
Cc: "Chen, Yingwen" <yingwen.chen@intel.com>,
	Brijesh Singh <brijesh.singh@amd.com>,
	devel@edk2.groups.io,
	"phillip.goerl@oracle.com" <phillip.goerl@oracle.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"Yao, Jiewen" <jiewen.yao@intel.com>,
	"Nakajima, Jun" <jun.nakajima@intel.com>,
	"Kinney, Michael D" <michael.d.kinney@intel.com>,
	"pbonzini@redhat.com" <pbonzini@redhat.com>,
	"boris.ostrovsky@oracle.com" <boris.ostrovsky@oracle.com>,
	"rfc@edk2.groups.io" <rfc@edk2.groups.io>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>
Subject: Re: [edk2-devel] [Qemu-devel] [PATCH 1/2] q35: implement 128K SMRAM at default SMBASE address
Date: Mon, 7 Oct 2019 11:44:35 +0200	[thread overview]
Message-ID: <ddd26a7a-5aa0-27dc-4936-2f539b95b1df@redhat.com> (raw)
In-Reply-To: <20191004133052.20373155@redhat.com>

On 10/04/19 13:31, Igor Mammedov wrote:
> On Tue, 1 Oct 2019 20:03:20 +0200
> "Laszlo Ersek" <lersek@redhat.com> wrote:

>> (1) What values to use.

> SeaBIOS writes 0x00 into command port, but it seems that's taken by
> EFI_SMM_COMMUNICATION_PROTOCOL. So we can use the next unused value
> (lets say 0x4). We probably don't have to use status port or 
> EFI_SMM_COMMUNICATION_PROTOCOL, since the value of written into 0xB2
> is sufficient to distinguish hotplug event.

Thanks. Can you please write a QEMU patch for the ACPI generator such
that hotplugging a VCPU writes value 4 to IO port 0xB2?

That will allow me to experiment with OVMF.

(I can experiment with some other parts in edk2 even before that.)

>> (2) How the parameters are passed.
>>
>>
>> (2a) For the new CPU, the SMI remains pending, until it gets an
>> INIT-SIPI-SIPI from one of the previously plugged CPUs (most likely, the
>> BSP). At that point, the new CPU will execute the "initial SMI handler
>> for hotplugged CPUs", at the default SMBASE.
>>
>> That's a routine we'll have to write in assembly, from zero. In this
>> routine, we can read back IO ports 0xB2 and 0xB3. And QEMU will be happy
>> to provide the values last written (see apm_ioport_readb() in
>> "hw/isa/apm.c"). So we can receive the values in this routine. Alright.
> 
> Potentially we can can avoid writing custom SMI handler,
> what do you think about following workflow:
> 
> on system boot after initial CPUs relocation, firmware set NOP SMI handler
> at default SMBASE.
> Then as reaction to GPE triggered SMI (on cpu hotplug), after SMI rendezvous,
> a host cpu reads IO port 0xB2 and does hotplugged CPUs enumeration.
> 
>   a) assuming we allow hotplug only in case of negotiated SMI broadcast
>      host CPU shoots down all in-flight INIT/SIPI/SIPI for hotpugged CPUs
>      to avoid race within relocation handler.

How is that "shootdown" possible?

>  After that host CPU in loop
> 
>   b) it prepares/initializes necessary CPU structures for a hotplugged
>      CPU if necessary and replaces NOP SMI handler with the relocation
>      SMI handler that is used during system boot.
>      
>   c) a host CPU sends NOP INIT/SIPI/SIPI to the hotplugged CPU
> 
>   d) the woken up hotplugged CPU, jumps to default SMBASE and
>      executes hotplug relocation handler.
> 
>   e) after the hotplugged CPU  is relocated and if there are more
>      hotplugged CPUs, a host CPU repeats b-d steps for the next
>      hotplugged CPU.
> 
>   f) after all CPUs are relocated, restore NOP SMI handler at default
>      SMBASE.
> 

Thanks
Laszlo


  reply	other threads:[~2019-10-07  9:45 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-17 13:07 [Qemu-devel] [PATCH 0/2] q35: mch: allow to lock down 128K RAM at default SMBASE address Igor Mammedov
2019-09-17 13:07 ` [Qemu-devel] [PATCH 1/2] q35: implement 128K SMRAM " Igor Mammedov
2019-09-19 17:02   ` Laszlo Ersek
2019-09-20  8:28     ` [edk2-devel] " Igor Mammedov
2019-09-20  9:28       ` Laszlo Ersek
2019-09-23 18:35         ` Laszlo Ersek
2019-09-24 11:19           ` Igor Mammedov
2019-09-30 11:51             ` Laszlo Ersek
2019-09-30 12:36               ` Igor Mammedov
2019-09-30 14:22                 ` Yao, Jiewen
2019-10-01 18:03                   ` Laszlo Ersek
2019-10-04 11:31                     ` Igor Mammedov
2019-10-07  9:44                       ` Laszlo Ersek [this message]
2019-09-24 11:47         ` Paolo Bonzini
2019-09-17 13:07 ` [Qemu-devel] [PATCH 2/2] tests: q35: MCH: add default SMBASE SMRAM lock test Igor Mammedov
2019-09-17 15:23 ` [Qemu-devel] [edk2-devel] [PATCH 0/2] q35: mch: allow to lock down 128K RAM at default SMBASE address no-reply
2019-09-17 15:24 ` no-reply

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ddd26a7a-5aa0-27dc-4936-2f539b95b1df@redhat.com \
    --to=lersek@redhat.com \
    --cc=alex.williamson@redhat.com \
    --cc=boris.ostrovsky@oracle.com \
    --cc=brijesh.singh@amd.com \
    --cc=devel@edk2.groups.io \
    --cc=imammedo@redhat.com \
    --cc=jiewen.yao@intel.com \
    --cc=joao.m.martins@oracle.com \
    --cc=jun.nakajima@intel.com \
    --cc=michael.d.kinney@intel.com \
    --cc=pbonzini@redhat.com \
    --cc=phillip.goerl@oracle.com \
    --cc=qemu-devel@nongnu.org \
    --cc=rfc@edk2.groups.io \
    --cc=yingwen.chen@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.