From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org, Richard Henderson <rth@twiddle.net>,
Aurelien Jarno <aurelien@aurel32.net>,
Aleksandar Markovic <aleksandar.markovic@mips.com>
Cc: "Fredrik Noring" <noring@nocrew.org>,
"Jürgen Urban" <JuergenUrban@gmx.de>,
"Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: [Qemu-devel] [RFC] target/mips: Initial support for MIPS R5900
Date: Fri, 7 Sep 2018 21:03:01 -0300 [thread overview]
Message-ID: <dde6d3cb-f2a4-e36b-69ac-8147fc5e752d@amsat.org> (raw)
In-Reply-To: <20180707194137.GB14409@localhost.localdomain>
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Hi,
On 7/7/18 4:41 PM, Fredrik Noring wrote:
[...]
> --- a/target/mips/mips-defs.h
> +++ b/target/mips/mips-defs.h
> @@ -52,6 +52,7 @@
> #define ASE_MSA 0x01000000
>
> /* Chip specific instructions. */
> +#define INSN_R5900 0x10000000
We have 4 bits to store the chip-specific instructions and this is the
last bit available.
Any objection to upraise CPUMIPSState.insn_flags to a uint64_t?
I'd then shift the chip-specific bits to the 32 upper bits, to keep this
flag clean.
> #define INSN_LOONGSON2E 0x20000000
> #define INSN_LOONGSON2F 0x40000000
> #define INSN_VR54XX 0x80000000
> @@ -62,6 +63,7 @@
> #define CPU_MIPS3 (CPU_MIPS2 | ISA_MIPS3)
> #define CPU_MIPS4 (CPU_MIPS3 | ISA_MIPS4)
> #define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX)
> +#define CPU_R5900 (CPU_MIPS4 | INSN_R5900)
> #define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E)
> #define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F)
[...]
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prev parent reply other threads:[~2018-09-08 0:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-07 19:41 [Qemu-devel] [RFC] target/mips: Initial support for MIPS R5900 Fredrik Noring
2018-07-08 12:10 ` Fredrik Noring
2018-07-08 21:07 ` "Jürgen Urban"
2018-08-01 1:33 ` Maciej W. Rozycki
2018-08-01 13:39 ` Fredrik Noring
2018-08-01 13:54 ` Richard Henderson
2018-09-07 19:16 ` [Qemu-devel] [PATCH v2] " Fredrik Noring
2018-09-08 9:20 ` Aleksandar Markovic
2018-09-08 14:27 ` [Qemu-devel] [PATCH v3] target/mips: Support R5900 GCC programs in user mode Fredrik Noring
2018-09-11 9:46 ` Aleksandar Markovic
2018-09-08 11:31 ` [Qemu-devel] [PATCH v2] target/mips: Initial support for MIPS R5900 Maciej W. Rozycki
2018-09-12 20:23 ` Maciej W. Rozycki
2018-09-16 16:19 ` [Qemu-devel] [PATCH v3] target/mips: Support R5900 GCC programs in user mode Fredrik Noring
2018-09-08 0:03 ` Philippe Mathieu-Daudé [this message]
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