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From: Pu Wen <puwen@hygon.cn>
To: xen-devel@lists.xenproject.org
Cc: "Pu Wen" <puwen@hygon.cn>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	"Wei Liu" <wei.liu2@citrix.com>,
	"Jan Beulich" <jbeulich@suse.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>
Subject: [PATCH v2 02/14] x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2
Date: Thu, 21 Feb 2019 17:48:54 +0800	[thread overview]
Message-ID: <def8c70bb26f9d5bc92e29f2ef182a87fbccb408.1550647742.git.puwen@hygon.cn> (raw)
In-Reply-To: <cover.1550647742.git.puwen@hygon.cn>

The Hygon Dhyana CPU supports the MSR way to get TOP_MEM2. So add Hygon
Dhyana support to print the value of TOP_MEM2.

Signed-off-by: Pu Wen <puwen@hygon.cn>
---
 xen/arch/x86/cpu/mtrr/generic.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c
index 8f9cf1b..94ee7d6 100644
--- a/xen/arch/x86/cpu/mtrr/generic.c
+++ b/xen/arch/x86/cpu/mtrr/generic.c
@@ -217,8 +217,9 @@ static void __init print_mtrr_state(const char *level)
 			printk("%s  %u disabled\n", level, i);
 	}
 
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD
-	    && boot_cpu_data.x86 >= 0xf) {
+	if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
+	     boot_cpu_data.x86 >= 0xf) ||
+	     boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 		uint64_t syscfg, tom2;
 
 		rdmsrl(MSR_K8_SYSCFG, syscfg);
-- 
2.7.4


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  parent reply	other threads:[~2019-02-21  9:52 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-21  9:48 [PATCH v2 00/14] Add support for Hygon Dhyana Family 18h processor Pu Wen
2019-02-21  9:48 ` [PATCH v2 01/14] x86/cpu: Create Hygon Dhyana architecture support file Pu Wen
2019-03-14 17:10   ` Jan Beulich
2019-03-15 10:17     ` Pu Wen
2019-03-15 11:17       ` Jan Beulich
2019-03-16  9:57         ` Pu Wen
2019-03-18  8:54           ` Jan Beulich
2019-03-19 12:33             ` Pu Wen
2019-03-19 13:02               ` Jan Beulich
2019-03-19 13:34                 ` Pu Wen
2019-02-21  9:48 ` Pu Wen [this message]
2019-03-15 12:39   ` [PATCH v2 02/14] x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 Jan Beulich
2019-03-16 10:06     ` Pu Wen
2019-03-18  8:57       ` Jan Beulich
2019-03-18 15:51         ` Pu Wen
2019-03-18 16:51           ` Jan Beulich
2019-02-21  9:50 ` [PATCH v2 03/14] x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU Pu Wen
2019-03-15 12:41   ` Jan Beulich
2019-03-16 10:11     ` Pu Wen
2019-03-18  8:59       ` Jan Beulich
2019-03-19 11:32         ` Pu Wen
2019-03-19 12:57           ` Jan Beulich
2019-03-19 13:47             ` Pu Wen
2019-03-19 13:57               ` Jan Beulich
2019-03-19 15:22                 ` Pu Wen
2019-02-21  9:51 ` [PATCH v2 04/14] x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure Pu Wen
2019-03-15 12:47   ` Jan Beulich
2019-02-21  9:51 ` [PATCH v2 05/14] x86/spec_ctrl: Add Hygon Dhyana to the respective mitigation machinery Pu Wen
2019-03-15 12:47   ` Jan Beulich
2019-02-21  9:51 ` [PATCH v2 06/14] x86/apic: Add Hygon Dhyana support Pu Wen
2019-03-15 12:48   ` Jan Beulich
2019-02-21  9:52 ` [PATCH v2 07/14] x86/acpi: " Pu Wen
2019-03-15 12:49   ` Jan Beulich
2019-02-21  9:52 ` [PATCH v2 08/14] x86/iommu: " Pu Wen
2019-03-15 13:18   ` Jan Beulich
2019-02-21  9:52 ` [PATCH v2 09/14] x86/pv: Add Hygon Dhyana support to emulate MSRs access Pu Wen
2019-03-15 13:23   ` Jan Beulich
2019-02-21  9:53 ` [PATCH v2 10/14] x86/domain: Add Hygon Dhyana support Pu Wen
2019-03-15 13:24   ` Jan Beulich
2019-02-21  9:53 ` [PATCH v2 11/14] x86/domctl: " Pu Wen
2019-03-15 13:28   ` Jan Beulich
2019-03-16 10:14     ` Pu Wen
2019-02-21  9:53 ` [PATCH v2 12/14] x86/traps: " Pu Wen
2019-02-21  9:54 ` [PATCH v2 13/14] x86/cpuid: " Pu Wen
2019-03-15 13:29   ` Jan Beulich
2019-02-21  9:54 ` [PATCH v2 14/14] tools/libxc: " Pu Wen
2019-02-21 16:37 ` [PATCH v2 00/14] Add support for Hygon Dhyana Family 18h processor Wei Liu
2019-02-22  2:30   ` Pu Wen
2019-02-22 13:21     ` Wei Liu
2019-03-15 13:41 ` Jan Beulich
2019-03-16 10:40   ` Pu Wen

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