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* [PATCH] stm32mp: psci: set cntfrq register of cpu on
@ 2020-03-02 10:27 Patrick Delaunay
  2020-03-18  9:58 ` Patrice CHOTARD
  2020-03-24  8:42 ` Patrick DELAUNAY
  0 siblings, 2 replies; 3+ messages in thread
From: Patrick Delaunay @ 2020-03-02 10:27 UTC (permalink / raw)
  To: u-boot

From: Ludovic Barre <ludovic.barre@st.com>

This path allows to set the cntfrq register of targeted cpu.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
---

 arch/arm/mach-stm32mp/psci.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c
index 1d91b2d324..3fb038d3e7 100644
--- a/arch/arm/mach-stm32mp/psci.c
+++ b/arch/arm/mach-stm32mp/psci.c
@@ -30,6 +30,22 @@ u8 psci_state[STM32MP1_PSCI_NR_CPUS] __secure_data = {
 	 PSCI_AFFINITY_LEVEL_ON,
 	 PSCI_AFFINITY_LEVEL_OFF};
 
+static u32 __secure_data cntfrq;
+
+static u32 __secure cp15_read_cntfrq(void)
+{
+	u32 frq;
+
+	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
+
+	return frq;
+}
+
+static void __secure cp15_write_cntfrq(u32 frq)
+{
+	asm volatile ("mcr p15, 0, %0, c14, c0, 0" : : "r" (frq));
+}
+
 static inline void psci_set_state(int cpu, u8 state)
 {
 	psci_state[cpu] = state;
@@ -63,6 +79,9 @@ void __secure psci_arch_cpu_entry(void)
 
 	psci_set_state(cpu, PSCI_AFFINITY_LEVEL_ON);
 
+	/* write the saved cntfrq */
+	cp15_write_cntfrq(cntfrq);
+
 	/* reset magic in TAMP register */
 	writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);
 }
@@ -130,6 +149,9 @@ s32 __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
 	if (psci_state[cpu] == PSCI_AFFINITY_LEVEL_ON)
 		return ARM_PSCI_RET_ALREADY_ON;
 
+	/* read and save cntfrq of current cpu to write on target cpu  */
+	cntfrq = cp15_read_cntfrq();
+
 	/* reset magic in TAMP register */
 	if (readl(TAMP_BACKUP_MAGIC_NUMBER))
 		writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH] stm32mp: psci: set cntfrq register of cpu on
  2020-03-02 10:27 [PATCH] stm32mp: psci: set cntfrq register of cpu on Patrick Delaunay
@ 2020-03-18  9:58 ` Patrice CHOTARD
  2020-03-24  8:42 ` Patrick DELAUNAY
  1 sibling, 0 replies; 3+ messages in thread
From: Patrice CHOTARD @ 2020-03-18  9:58 UTC (permalink / raw)
  To: u-boot


On 3/2/20 11:27 AM, Patrick Delaunay wrote:
> From: Ludovic Barre <ludovic.barre@st.com>
>
> This path allows to set the cntfrq register of targeted cpu.
>
> Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> ---
>
>  arch/arm/mach-stm32mp/psci.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c
> index 1d91b2d324..3fb038d3e7 100644
> --- a/arch/arm/mach-stm32mp/psci.c
> +++ b/arch/arm/mach-stm32mp/psci.c
> @@ -30,6 +30,22 @@ u8 psci_state[STM32MP1_PSCI_NR_CPUS] __secure_data = {
>  	 PSCI_AFFINITY_LEVEL_ON,
>  	 PSCI_AFFINITY_LEVEL_OFF};
>  
> +static u32 __secure_data cntfrq;
> +
> +static u32 __secure cp15_read_cntfrq(void)
> +{
> +	u32 frq;
> +
> +	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
> +
> +	return frq;
> +}
> +
> +static void __secure cp15_write_cntfrq(u32 frq)
> +{
> +	asm volatile ("mcr p15, 0, %0, c14, c0, 0" : : "r" (frq));
> +}
> +
>  static inline void psci_set_state(int cpu, u8 state)
>  {
>  	psci_state[cpu] = state;
> @@ -63,6 +79,9 @@ void __secure psci_arch_cpu_entry(void)
>  
>  	psci_set_state(cpu, PSCI_AFFINITY_LEVEL_ON);
>  
> +	/* write the saved cntfrq */
> +	cp15_write_cntfrq(cntfrq);
> +
>  	/* reset magic in TAMP register */
>  	writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);
>  }
> @@ -130,6 +149,9 @@ s32 __secure psci_cpu_on(u32 function_id, u32 target_cpu, u32 pc,
>  	if (psci_state[cpu] == PSCI_AFFINITY_LEVEL_ON)
>  		return ARM_PSCI_RET_ALREADY_ON;
>  
> +	/* read and save cntfrq of current cpu to write on target cpu  */
> +	cntfrq = cp15_read_cntfrq();
> +
>  	/* reset magic in TAMP register */
>  	if (readl(TAMP_BACKUP_MAGIC_NUMBER))
>  		writel(0xFFFFFFFF, TAMP_BACKUP_MAGIC_NUMBER);

Acked-by: Patrice Chotard <patrice.chotard@st.com>

Thanks

PAtrice

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH] stm32mp: psci: set cntfrq register of cpu on
  2020-03-02 10:27 [PATCH] stm32mp: psci: set cntfrq register of cpu on Patrick Delaunay
  2020-03-18  9:58 ` Patrice CHOTARD
@ 2020-03-24  8:42 ` Patrick DELAUNAY
  1 sibling, 0 replies; 3+ messages in thread
From: Patrick DELAUNAY @ 2020-03-24  8:42 UTC (permalink / raw)
  To: u-boot

Hi,

> From: Patrick DELAUNAY <patrick.delaunay@st.com>
> Sent: lundi 2 mars 2020 11:27
> 
> From: Ludovic Barre <ludovic.barre@st.com>
> 
> This path allows to set the cntfrq register of targeted cpu.
> 
> Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
> ---

Applied to u-boot-stm/next, thanks!

Regards

Patrick

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-03-24  8:42 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-03-02 10:27 [PATCH] stm32mp: psci: set cntfrq register of cpu on Patrick Delaunay
2020-03-18  9:58 ` Patrice CHOTARD
2020-03-24  8:42 ` Patrick DELAUNAY

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