* [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check
@ 2023-03-24 13:51 Stanislav Lisovskiy
2023-03-24 16:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Implement UHBR bandwidth check (rev3) Patchwork
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: Stanislav Lisovskiy @ 2023-03-24 13:51 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
According to spec, we should check if output_bpp * pixel_rate is less
than DDI clock * 72, if UHBR is used.
v2: - s/pipe_config/crtc_state/ (Jani Nikula)
- Merged previous patch into that one, to remove empty function(Jani Nikula)
v3: - Make that constraint check to be DSC-related only
- Limit this to only DISPLAY_VER <= 13
HSDES: 1406899791
BSPEC: 49259
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 29 +++++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index a860cbc5dbea..4c0edb760b8e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -45,6 +45,27 @@
#include "intel_hotplug.h"
#include "skl_scaler.h"
+static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,
+ const struct drm_display_mode *adjusted_mode,
+ struct intel_crtc_state *crtc_state,
+ bool dsc)
+{
+ if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) <= 13 && dsc) {
+ int output_bpp = bpp;
+ /* DisplayPort 2 128b/132b, bits per lane is always 32 */
+ int symbol_clock = crtc_state->port_clock / 32;
+
+ if (output_bpp * adjusted_mode->crtc_clock >=
+ symbol_clock * 72) {
+ drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n",
+ output_bpp * adjusted_mode->crtc_clock, symbol_clock * 72);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
int max_bpp,
@@ -87,6 +108,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
+ ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state, dsc);
+ if (ret)
+ continue;
+
slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
connector->port,
crtc_state->pbn);
@@ -104,8 +129,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
}
}
- /* Despite slots are non-zero, we still failed the atomic check */
- if (ret && slots >= 0)
+ /* We failed to find a proper bpp/timeslots, return error */
+ if (ret)
slots = ret;
if (slots < 0) {
--
2.37.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Implement UHBR bandwidth check (rev3)
2023-03-24 13:51 [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy
@ 2023-03-24 16:05 ` Patchwork
2023-03-24 16:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-03-24 16:05 UTC (permalink / raw)
To: Stanislav Lisovskiy; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Implement UHBR bandwidth check (rev3)
URL : https://patchwork.freedesktop.org/series/112806/
State : warning
== Summary ==
Error: dim checkpatch failed
5b3a41314c80 drm/i915: Implement UHBR bandwidth check
-:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#10:
- Merged previous patch into that one, to remove empty function(Jani Nikula)
total: 0 errors, 1 warnings, 0 checks, 47 lines checked
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Implement UHBR bandwidth check (rev3)
2023-03-24 13:51 [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy
2023-03-24 16:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Implement UHBR bandwidth check (rev3) Patchwork
@ 2023-03-24 16:17 ` Patchwork
2023-03-24 22:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-04-04 10:56 ` [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check Govindapillai, Vinod
3 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-03-24 16:17 UTC (permalink / raw)
To: Stanislav Lisovskiy; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4425 bytes --]
== Series Details ==
Series: drm/i915: Implement UHBR bandwidth check (rev3)
URL : https://patchwork.freedesktop.org/series/112806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12910 -> Patchwork_112806v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/index.html
Participating hosts (37 -> 36)
------------------------------
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_112806v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3@smem:
- bat-rpls-2: NOTRUN -> [ABORT][1] ([i915#7978])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-rpls-2/igt@gem_exec_suspend@basic-s3@smem.html
- bat-rpls-1: NOTRUN -> [ABORT][2] ([i915#6687] / [i915#7978])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@mman:
- bat-rpls-2: NOTRUN -> [TIMEOUT][3] ([i915#6794])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-rpls-2/igt@i915_selftest@live@mman.html
* igt@i915_selftest@live@slpc:
- bat-rpls-1: NOTRUN -> [DMESG-FAIL][4] ([i915#6367])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-rpls-1/igt@i915_selftest@live@slpc.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][5] ([i915#5354]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
#### Possible fixes ####
* igt@i915_selftest@live@migrate:
- bat-dg2-11: [DMESG-WARN][6] ([i915#7699]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/bat-dg2-11/igt@i915_selftest@live@migrate.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-dg2-11/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@requests:
- bat-rpls-2: [ABORT][8] ([i915#7913] / [i915#7982]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/bat-rpls-2/igt@i915_selftest@live@requests.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-rpls-2/igt@i915_selftest@live@requests.html
- bat-rpls-1: [ABORT][10] ([i915#7911]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/bat-rpls-1/igt@i915_selftest@live@requests.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-rpls-1/igt@i915_selftest@live@requests.html
* igt@i915_selftest@live@workarounds:
- bat-rpls-2: [DMESG-FAIL][12] ([i915#6763] / [i915#7913]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/bat-rpls-2/igt@i915_selftest@live@workarounds.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/bat-rpls-2/igt@i915_selftest@live@workarounds.html
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#7982]: https://gitlab.freedesktop.org/drm/intel/issues/7982
Build changes
-------------
* Linux: CI_DRM_12910 -> Patchwork_112806v3
CI-20190529: 20190529
CI_DRM_12910: 34e37caa656a3f5907fd3afcacb4ef69b1d3062c @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7217: 605a0a5896b8f49a41e04c358d00a85e4fb6df4e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_112806v3: 34e37caa656a3f5907fd3afcacb4ef69b1d3062c @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
f1276e555e85 drm/i915: Implement UHBR bandwidth check
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/index.html
[-- Attachment #2: Type: text/html, Size: 5369 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Implement UHBR bandwidth check (rev3)
2023-03-24 13:51 [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy
2023-03-24 16:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Implement UHBR bandwidth check (rev3) Patchwork
2023-03-24 16:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-03-24 22:23 ` Patchwork
2023-04-04 10:56 ` [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check Govindapillai, Vinod
3 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-03-24 22:23 UTC (permalink / raw)
To: Stanislav Lisovskiy; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 23915 bytes --]
== Series Details ==
Series: drm/i915: Implement UHBR bandwidth check (rev3)
URL : https://patchwork.freedesktop.org/series/112806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12910_full -> Patchwork_112806v3_full
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_112806v3_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_112806v3_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (8 -> 7)
------------------------------
Missing (1): shard-rkl0
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_112806v3_full:
### IGT changes ###
#### Warnings ####
* igt@kms_hdr@static-toggle:
- shard-snb: [SKIP][1] ([fdo#109271]) -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-snb2/igt@kms_hdr@static-toggle.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-snb2/igt@kms_hdr@static-toggle.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@perf@gen12-invalid-class-instance}:
- {shard-rkl}: NOTRUN -> [SKIP][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-1/igt@perf@gen12-invalid-class-instance.html
Known issues
------------
Here are the changes found in Patchwork_112806v3_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-apl: NOTRUN -> [SKIP][4] ([fdo#109271]) +49 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-apl1/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: NOTRUN -> [ABORT][5] ([i915#5566])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-apl1/igt@gen9_exec_parse@allowed-single.html
- shard-glk: [PASS][6] -> [ABORT][7] ([i915#5566])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-glk3/igt@gen9_exec_parse@allowed-single.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-glk2/igt@gen9_exec_parse@allowed-single.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-glk: [PASS][8] -> [DMESG-FAIL][9] ([i915#5334])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-glk7/igt@i915_selftest@live@gt_heartbeat.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-glk9/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-1:
- shard-apl: NOTRUN -> [TIMEOUT][10] ([i915#7173])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-apl1/igt@kms_content_protection@atomic-dpms@pipe-a-dp-1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
- shard-glk: [PASS][11] -> [DMESG-FAIL][12] ([i915#118])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-glk2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-glk5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html
#### Possible fixes ####
* igt@drm_fdinfo@virtual-idle:
- {shard-rkl}: [FAIL][13] ([i915#7742]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-2/igt@drm_fdinfo@virtual-idle.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-3/igt@drm_fdinfo@virtual-idle.html
* igt@fbdev@eof:
- {shard-rkl}: [SKIP][15] ([i915#2582]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-4/igt@fbdev@eof.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-6/igt@fbdev@eof.html
* igt@fbdev@pan:
- {shard-tglu}: [SKIP][17] ([i915#2582]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-tglu-10/igt@fbdev@pan.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-tglu-3/igt@fbdev@pan.html
* igt@feature_discovery@psr1:
- {shard-rkl}: [SKIP][19] ([i915#658]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-3/igt@feature_discovery@psr1.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-6/igt@feature_discovery@psr1.html
* igt@gem_busy@close-race:
- shard-apl: [ABORT][21] ([i915#6016]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-apl6/igt@gem_busy@close-race.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-apl1/igt@gem_busy@close-race.html
* igt@gem_exec_endless@dispatch@bcs0:
- {shard-rkl}: [SKIP][23] ([i915#6247]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-5/igt@gem_exec_endless@dispatch@bcs0.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-1/igt@gem_exec_endless@dispatch@bcs0.html
* igt@gem_exec_reloc@basic-scanout@vcs0:
- {shard-tglu}: [SKIP][25] ([i915#3639]) -> [PASS][26] +4 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-tglu-9/igt@gem_exec_reloc@basic-scanout@vcs0.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-tglu-7/igt@gem_exec_reloc@basic-scanout@vcs0.html
* igt@gem_exec_reloc@basic-wc-read-noreloc:
- {shard-rkl}: [SKIP][27] ([i915#3281]) -> [PASS][28] +7 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-3/igt@gem_exec_reloc@basic-wc-read-noreloc.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-5/igt@gem_exec_reloc@basic-wc-read-noreloc.html
* igt@gem_pread@snoop:
- {shard-rkl}: [SKIP][29] ([i915#3282]) -> [PASS][30] +4 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-1/igt@gem_pread@snoop.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-5/igt@gem_pread@snoop.html
* igt@gen9_exec_parse@bb-start-out:
- {shard-rkl}: [SKIP][31] ([i915#2527]) -> [PASS][32] +3 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-1/igt@gen9_exec_parse@bb-start-out.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-5/igt@gen9_exec_parse@bb-start-out.html
* igt@i915_pipe_stress@stress-xrgb8888-ytiled:
- {shard-rkl}: [SKIP][33] ([i915#4098]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-5/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-6/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html
* igt@i915_pm_rpm@cursor-dpms:
- {shard-tglu}: [SKIP][35] ([i915#1849]) -> [PASS][36] +16 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-tglu-9/igt@i915_pm_rpm@cursor-dpms.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-tglu-7/igt@i915_pm_rpm@cursor-dpms.html
* igt@i915_pm_rpm@dpms-lpsp:
- {shard-rkl}: [SKIP][37] ([i915#1397]) -> [PASS][38] +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-5/igt@i915_pm_rpm@dpms-lpsp.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-6/igt@i915_pm_rpm@dpms-lpsp.html
* igt@i915_pm_rpm@i2c:
- {shard-tglu}: [SKIP][39] ([i915#3547]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-tglu-10/igt@i915_pm_rpm@i2c.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-tglu-1/igt@i915_pm_rpm@i2c.html
* igt@i915_pm_rpm@modeset-lpsp:
- {shard-tglu}: [SKIP][41] ([i915#1397]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-tglu-10/igt@i915_pm_rpm@modeset-lpsp.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-tglu-1/igt@i915_pm_rpm@modeset-lpsp.html
* igt@i915_pm_rpm@system-suspend-modeset:
- {shard-rkl}: [SKIP][43] ([fdo#109308]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-4/igt@i915_pm_rpm@system-suspend-modeset.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-6/igt@i915_pm_rpm@system-suspend-modeset.html
* igt@i915_suspend@forcewake:
- shard-apl: [ABORT][45] ([i915#180]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-apl4/igt@i915_suspend@forcewake.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-apl1/igt@i915_suspend@forcewake.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- {shard-rkl}: [SKIP][47] ([i915#1845] / [i915#4098]) -> [PASS][48] +30 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-3/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-6/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs:
- {shard-tglu}: [SKIP][49] ([i915#1845]) -> [PASS][50] +35 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-tglu-10/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-tglu-1/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [FAIL][51] ([i915#72]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-glk4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [FAIL][53] ([i915#2346]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
- shard-glk: [FAIL][55] ([i915#2346]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render:
- {shard-rkl}: [SKIP][57] ([i915#1849] / [i915#4098]) -> [PASS][58] +19 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
* {igt@kms_plane@invalid-pixel-format-settings}:
- {shard-tglu}: [SKIP][59] ([i915#8152]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-tglu-10/igt@kms_plane@invalid-pixel-format-settings.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-tglu-3/igt@kms_plane@invalid-pixel-format-settings.html
* igt@kms_psr@cursor_mmap_gtt:
- {shard-rkl}: [SKIP][61] ([i915#1072]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-rkl-3/igt@kms_psr@cursor_mmap_gtt.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-rkl-6/igt@kms_psr@cursor_mmap_gtt.html
* igt@kms_vblank@pipe-c-accuracy-idle:
- shard-glk: [FAIL][63] ([i915#43]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-glk9/igt@kms_vblank@pipe-c-accuracy-idle.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-glk4/igt@kms_vblank@pipe-c-accuracy-idle.html
* igt@kms_vblank@pipe-c-wait-idle:
- {shard-tglu}: [SKIP][65] ([i915#1845] / [i915#7651]) -> [PASS][66] +9 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12910/shard-tglu-9/igt@kms_vblank@pipe-c-wait-idle.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/shard-tglu-7/igt@kms_vblank@pipe-c-wait-idle.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#2232]: https://gitlab.freedesktop.org/drm/intel/issues/2232
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#43]: https://gitlab.freedesktop.org/drm/intel/issues/43
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#5115]: https://gitlab.freedesktop.org/drm/intel/issues/5115
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#6016]: https://gitlab.freedesktop.org/drm/intel/issues/6016
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
[i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355
[i915#6403]: https://gitlab.freedesktop.org/drm/intel/issues/6403
[i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
[i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8018]: https://gitlab.freedesktop.org/drm/intel/issues/8018
[i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
[i915#8154]: https://gitlab.freedesktop.org/drm/intel/issues/8154
[i915#8155]: https://gitlab.freedesktop.org/drm/intel/issues/8155
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8308]: https://gitlab.freedesktop.org/drm/intel/issues/8308
Build changes
-------------
* Linux: CI_DRM_12910 -> Patchwork_112806v3
CI-20190529: 20190529
CI_DRM_12910: 34e37caa656a3f5907fd3afcacb4ef69b1d3062c @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7217: 605a0a5896b8f49a41e04c358d00a85e4fb6df4e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_112806v3: 34e37caa656a3f5907fd3afcacb4ef69b1d3062c @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112806v3/index.html
[-- Attachment #2: Type: text/html, Size: 17919 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check
2023-03-24 13:51 [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy
` (2 preceding siblings ...)
2023-03-24 22:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2023-04-04 10:56 ` Govindapillai, Vinod
3 siblings, 0 replies; 10+ messages in thread
From: Govindapillai, Vinod @ 2023-04-04 10:56 UTC (permalink / raw)
To: Lisovskiy, Stanislav, intel-gfx; +Cc: Nikula, Jani
Hi Stan,
On Fri, 2023-03-24 at 15:51 +0200, Stanislav Lisovskiy wrote:
> According to spec, we should check if output_bpp * pixel_rate is less
> than DDI clock * 72, if UHBR is used.
>
> v2: - s/pipe_config/crtc_state/ (Jani Nikula)
> - Merged previous patch into that one, to remove empty function(Jani Nikula)
>
> v3: - Make that constraint check to be DSC-related only
> - Limit this to only DISPLAY_VER <= 13
>
> HSDES: 1406899791
> BSPEC: 49259
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 29 +++++++++++++++++++--
> 1 file changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index a860cbc5dbea..4c0edb760b8e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -45,6 +45,27 @@
> #include "intel_hotplug.h"
> #include "skl_scaler.h"
>
> +static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,
> + const struct drm_display_mode *adjusted_mode,
> + struct intel_crtc_state *crtc_state,
> + bool dsc)
> +{
> + if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) <= 13 && dsc) {
> + int output_bpp = bpp;
> + /* DisplayPort 2 128b/132b, bits per lane is always 32 */
> + int symbol_clock = crtc_state->port_clock / 32;
> +
> + if (output_bpp * adjusted_mode->crtc_clock >=
> + symbol_clock * 72) {
> + drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available
> %d)\n",
> + output_bpp * adjusted_mode->crtc_clock, symbol_clock * 72);
> + return -EINVAL;
> + }
> + }
> +
> + return 0;
> +}
> +
> static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> int max_bpp,
> @@ -87,6 +108,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
>
> drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
>
> + ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state, dsc);
> + if (ret)
> + continue;
> +
One suggestion, if you move this constraints check to the top of the "for loop", you may be able to
save an unnecessary "drm_dp_calc_pbn_mode" call in case constraints doesn't match for a bpp.
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
> connector->port,
> crtc_state->pbn);
> @@ -104,8 +129,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> }
> }
>
> - /* Despite slots are non-zero, we still failed the atomic check */
> - if (ret && slots >= 0)
> + /* We failed to find a proper bpp/timeslots, return error */
> + if (ret)
> slots = ret;
>
> if (slots < 0) {
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check
2023-02-27 11:20 Stanislav Lisovskiy
@ 2023-03-09 12:54 ` Ville Syrjälä
0 siblings, 0 replies; 10+ messages in thread
From: Ville Syrjälä @ 2023-03-09 12:54 UTC (permalink / raw)
To: Stanislav Lisovskiy; +Cc: jani.nikula, intel-gfx
On Mon, Feb 27, 2023 at 01:20:30PM +0200, Stanislav Lisovskiy wrote:
> According to spec, we should check if output_bpp * pixel_rate is less
> than DDI clock * 72, if UHBR is used.
>
> v2: - s/pipe_config/crtc_state/ (Jani Nikula)
> - Merged previous patch into that one, to remove empty function(Jani Nikula)
>
> HSDES: 1406899791
> BSPEC: 49259
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 28 +++++++++++++++++++--
> 1 file changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index a860cbc5dbea..d0e2e37cd758 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -45,6 +45,26 @@
> #include "intel_hotplug.h"
> #include "skl_scaler.h"
>
> +static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,
> + const struct drm_display_mode *adjusted_mode,
> + struct intel_crtc_state *crtc_state)
> +{
> + if (intel_dp_is_uhbr(crtc_state)) {
> + int output_bpp = bpp;
> + /* DisplayPort 2 128b/132b, bits per lane is always 32 */
> + int symbol_clock = crtc_state->port_clock / 32;
> +
> + if (output_bpp * adjusted_mode->crtc_clock >=
> + symbol_clock * 72) {
> + drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n",
> + output_bpp * adjusted_mode->crtc_clock, symbol_clock * 72);
> + return -EINVAL;
> + }
You're still doing this for non-DSC as well. Did we get any
clarification whether that is correct or not?
> + }
> +
> + return 0;
> +}
> +
> static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> int max_bpp,
> @@ -87,6 +107,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
>
> drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
>
> + ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state);
> + if (ret)
> + continue;
> +
> slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
> connector->port,
> crtc_state->pbn);
> @@ -104,8 +128,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
> }
> }
>
> - /* Despite slots are non-zero, we still failed the atomic check */
> - if (ret && slots >= 0)
> + /* We failed to find a proper bpp/timeslots, return error */
> + if (ret)
> slots = ret;
>
> if (slots < 0) {
> --
> 2.37.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check
@ 2023-02-27 11:20 Stanislav Lisovskiy
2023-03-09 12:54 ` Ville Syrjälä
0 siblings, 1 reply; 10+ messages in thread
From: Stanislav Lisovskiy @ 2023-02-27 11:20 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
According to spec, we should check if output_bpp * pixel_rate is less
than DDI clock * 72, if UHBR is used.
v2: - s/pipe_config/crtc_state/ (Jani Nikula)
- Merged previous patch into that one, to remove empty function(Jani Nikula)
HSDES: 1406899791
BSPEC: 49259
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 28 +++++++++++++++++++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index a860cbc5dbea..d0e2e37cd758 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -45,6 +45,26 @@
#include "intel_hotplug.h"
#include "skl_scaler.h"
+static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,
+ const struct drm_display_mode *adjusted_mode,
+ struct intel_crtc_state *crtc_state)
+{
+ if (intel_dp_is_uhbr(crtc_state)) {
+ int output_bpp = bpp;
+ /* DisplayPort 2 128b/132b, bits per lane is always 32 */
+ int symbol_clock = crtc_state->port_clock / 32;
+
+ if (output_bpp * adjusted_mode->crtc_clock >=
+ symbol_clock * 72) {
+ drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n",
+ output_bpp * adjusted_mode->crtc_clock, symbol_clock * 72);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
int max_bpp,
@@ -87,6 +107,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp);
+ ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state);
+ if (ret)
+ continue;
+
slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
connector->port,
crtc_state->pbn);
@@ -104,8 +128,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
}
}
- /* Despite slots are non-zero, we still failed the atomic check */
- if (ret && slots >= 0)
+ /* We failed to find a proper bpp/timeslots, return error */
+ if (ret)
slots = ret;
if (slots < 0) {
--
2.37.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check
2023-01-13 14:43 ` Ville Syrjälä
@ 2023-01-16 7:51 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 10+ messages in thread
From: Lisovskiy, Stanislav @ 2023-01-16 7:51 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Jan 13, 2023 at 04:43:54PM +0200, Ville Syrjälä wrote:
> On Fri, Jan 13, 2023 at 03:06:28PM +0200, Stanislav Lisovskiy wrote:
> > According to spec, we should check if output_bpp * pixel_rate is less
> > than DDI clock * 72, if UHBR is used.
> >
> > HSDES: 1406899791
> > BSPEC: 49259
> >
> > v2: - Removed wrong comment(Rodrigo Vivi)
> > - Added HSDES to the commit msg(Rodrigo Vivi)
> > - Moved UHBR check to the MST specific code
> >
> > v3: - Changed commit subject(Rodrigo Vivi)
> > - Fixed the error message if check fails(Rodrigo Vivi)
> >
> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp_mst.c | 16 +++++++++++++---
> > 1 file changed, 13 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index 8b0e4defa3f1..36e368995bef 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -339,10 +339,20 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> > ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
> > conn_state, &limits,
> > pipe_config->dp_m_n.tu, false);
> > - }
> > + if (ret < 0)
> > + return ret;
> >
> > - if (ret)
> > - return ret;
> > + if (intel_dp_is_uhbr(pipe_config)) {
> > + int output_bpp = pipe_config->dsc.compressed_bpp;
> > +
> > + if (output_bpp * adjusted_mode->crtc_clock >=
> > + pipe_config->port_clock * 72) {
> > + drm_dbg_kms(&dev_priv->drm, "UHBR check failed(required bw %d available %d)\n",
> > + output_bpp * adjusted_mode->crtc_clock, pipe_config->port_clock * 72);
> > + return -EINVAL;
>
> Doesn't this just mean the user can never enable this particular
> mode? Would seem more sensible to account for the extra
> limitation when we determine port_clock and/or compressed_bpp.
So do you mean I should add this as part of the constraints, that we check, where we optimize
port_clock? probably also then if we fail to find uncompressed more for that,
then we need to try with DSC, also gradually decreasing compressed_bpp.
Stan
>
> > + }
> > + }
> > + }
> >
> > ret = intel_dp_mst_update_slots(encoder, pipe_config, conn_state);
> > if (ret)
> > --
> > 2.37.3
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check
2023-01-13 13:06 Stanislav Lisovskiy
@ 2023-01-13 14:43 ` Ville Syrjälä
2023-01-16 7:51 ` Lisovskiy, Stanislav
0 siblings, 1 reply; 10+ messages in thread
From: Ville Syrjälä @ 2023-01-13 14:43 UTC (permalink / raw)
To: Stanislav Lisovskiy; +Cc: intel-gfx
On Fri, Jan 13, 2023 at 03:06:28PM +0200, Stanislav Lisovskiy wrote:
> According to spec, we should check if output_bpp * pixel_rate is less
> than DDI clock * 72, if UHBR is used.
>
> HSDES: 1406899791
> BSPEC: 49259
>
> v2: - Removed wrong comment(Rodrigo Vivi)
> - Added HSDES to the commit msg(Rodrigo Vivi)
> - Moved UHBR check to the MST specific code
>
> v3: - Changed commit subject(Rodrigo Vivi)
> - Fixed the error message if check fails(Rodrigo Vivi)
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 8b0e4defa3f1..36e368995bef 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -339,10 +339,20 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
> ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
> conn_state, &limits,
> pipe_config->dp_m_n.tu, false);
> - }
> + if (ret < 0)
> + return ret;
>
> - if (ret)
> - return ret;
> + if (intel_dp_is_uhbr(pipe_config)) {
> + int output_bpp = pipe_config->dsc.compressed_bpp;
> +
> + if (output_bpp * adjusted_mode->crtc_clock >=
> + pipe_config->port_clock * 72) {
> + drm_dbg_kms(&dev_priv->drm, "UHBR check failed(required bw %d available %d)\n",
> + output_bpp * adjusted_mode->crtc_clock, pipe_config->port_clock * 72);
> + return -EINVAL;
Doesn't this just mean the user can never enable this particular
mode? Would seem more sensible to account for the extra
limitation when we determine port_clock and/or compressed_bpp.
> + }
> + }
> + }
>
> ret = intel_dp_mst_update_slots(encoder, pipe_config, conn_state);
> if (ret)
> --
> 2.37.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH] drm/i915: Implement UHBR bandwidth check
@ 2023-01-13 13:06 Stanislav Lisovskiy
2023-01-13 14:43 ` Ville Syrjälä
0 siblings, 1 reply; 10+ messages in thread
From: Stanislav Lisovskiy @ 2023-01-13 13:06 UTC (permalink / raw)
To: intel-gfx
According to spec, we should check if output_bpp * pixel_rate is less
than DDI clock * 72, if UHBR is used.
HSDES: 1406899791
BSPEC: 49259
v2: - Removed wrong comment(Rodrigo Vivi)
- Added HSDES to the commit msg(Rodrigo Vivi)
- Moved UHBR check to the MST specific code
v3: - Changed commit subject(Rodrigo Vivi)
- Fixed the error message if check fails(Rodrigo Vivi)
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 8b0e4defa3f1..36e368995bef 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -339,10 +339,20 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
conn_state, &limits,
pipe_config->dp_m_n.tu, false);
- }
+ if (ret < 0)
+ return ret;
- if (ret)
- return ret;
+ if (intel_dp_is_uhbr(pipe_config)) {
+ int output_bpp = pipe_config->dsc.compressed_bpp;
+
+ if (output_bpp * adjusted_mode->crtc_clock >=
+ pipe_config->port_clock * 72) {
+ drm_dbg_kms(&dev_priv->drm, "UHBR check failed(required bw %d available %d)\n",
+ output_bpp * adjusted_mode->crtc_clock, pipe_config->port_clock * 72);
+ return -EINVAL;
+ }
+ }
+ }
ret = intel_dp_mst_update_slots(encoder, pipe_config, conn_state);
if (ret)
--
2.37.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-04-04 10:56 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
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2023-02-27 11:20 Stanislav Lisovskiy
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