[PATCH] x86: also suppress use of MMX insns

[PATCH] x86: also suppress use of MMX insns

[Jan Beulich]

Passing -mno-sse alone is not enough: The compiler may still find
(questionable) reasons to use MMX insns. In particular with gcc12 use
of MOVD+PUNPCKLDQ+MOVQ was observed in an apparent attempt to auto-
vectorize the storing of two adjacent zeroes, 32 bits each.

Reported-by: ChrisD <chris@dalessio.org>
Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/arch.mk
+++ b/xen/arch/x86/arch.mk
@@ -36,9 +36,9 @@ $(call cc-option-add,CFLAGS,CC,-Wa$$(com
 
 CFLAGS += -mno-red-zone -fpic
 
-# Xen doesn't use SSE interally.  If the compiler supports it, also skip the
-# SSE setup for variadic function calls.
-CFLAGS += -mno-sse $(call cc-option,$(CC),-mskip-rax-setup)
+# Xen doesn't use MMX or SSE interally.  If the compiler supports it, also skip
+# the SSE setup for variadic function calls.
+CFLAGS += -mno-mmx -mno-sse $(call cc-option,$(CC),-mskip-rax-setup)
 
 ifeq ($(CONFIG_INDIRECT_THUNK),y)
 # Compile with gcc thunk-extern, indirect-branch-register if available.

Re: [PATCH] x86: also suppress use of MMX insns

[Andrew Cooper]

On 20/07/2022 14:30, Jan Beulich wrote:
> Passing -mno-sse alone is not enough: The compiler may still find
> (questionable) reasons to use MMX insns. In particular with gcc12 use
> of MOVD+PUNPCKLDQ+MOVQ was observed in an apparent attempt to auto-
> vectorize the storing of two adjacent zeroes, 32 bits each.
>
> Reported-by: ChrisD <chris@dalessio.org>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

But while we're at it, what else might we have to clobber to stop
nonsense like this?  x87 and avx come to mind.

Re: [PATCH] x86: also suppress use of MMX insns

[Jan Beulich]

On 20.07.2022 15:33, Andrew Cooper wrote:
> On 20/07/2022 14:30, Jan Beulich wrote:
>> Passing -mno-sse alone is not enough: The compiler may still find
>> (questionable) reasons to use MMX insns. In particular with gcc12 use
>> of MOVD+PUNPCKLDQ+MOVQ was observed in an apparent attempt to auto-
>> vectorize the storing of two adjacent zeroes, 32 bits each.
>>
>> Reported-by: ChrisD <chris@dalessio.org>
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

Thanks.

> But while we're at it, what else might we have to clobber to stop
> nonsense like this?  x87 and avx come to mind.

AVX is taking SSE as a prereq (with -mno-sse %xmm etc registers simply
are unavailable). And with -msoft-float I would very much hope we have
clearly indicated to the compiler that we want no x87 insns whatsoever.

Jan

Re: [PATCH] x86: also suppress use of MMX insns

[Andrew Cooper]

On 20/07/2022 14:36, Jan Beulich wrote:
> On 20.07.2022 15:33, Andrew Cooper wrote:
>> On 20/07/2022 14:30, Jan Beulich wrote:
>>> Passing -mno-sse alone is not enough: The compiler may still find
>>> (questionable) reasons to use MMX insns. In particular with gcc12 use
>>> of MOVD+PUNPCKLDQ+MOVQ was observed in an apparent attempt to auto-
>>> vectorize the storing of two adjacent zeroes, 32 bits each.
>>>
>>> Reported-by: ChrisD <chris@dalessio.org>
>>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Thanks.
>
>> But while we're at it, what else might we have to clobber to stop
>> nonsense like this?  x87 and avx come to mind.
> AVX is taking SSE as a prereq (with -mno-sse %xmm etc registers simply
> are unavailable). And with -msoft-float I would very much hope we have
> clearly indicated to the compiler that we want no x87 insns whatsoever.

Ok.  Sounds plausible.

~Andrew