[Intel-gfx] [PATCH v2 0/7] drm/i915/bios: remove vbt ddi_port_info caching

[Intel-gfx] [PATCH v2 0/7] drm/i915/bios: remove vbt ddi_port_info caching

[Jani Nikula]

v2 of https://patchwork.freedesktop.org/series/93957/ with the CI issues
fixed (fingers crossed!).

BR,
Jani.

Jani Nikula (7):
  drm/i915/bios: use hdmi level shift directly from child data
  drm/i915/bios: use max tmds clock directly from child data
  drm/i915/bios: use dp max link rate directly from child data
  drm/i915/bios: use alternate aux channel directly from child data
  drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize
  drm/i915/bios: use ddc pin directly from child data
  drm/i915/bios: get rid of vbt ddi_port_info

 drivers/gpu/drm/i915/display/intel_bios.c | 372 +++++++++++-----------
 drivers/gpu/drm/i915/i915_drv.h           |  18 +-
 2 files changed, 187 insertions(+), 203 deletions(-)

-- 
2.30.2

[Intel-gfx] [PATCH v2 1/7] drm/i915/bios: use hdmi level shift directly from child data

[Jani Nikula]

Avoid extra caching of the data.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 26 +++++++++++++----------
 drivers/gpu/drm/i915/i915_drv.h           |  4 ----
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index e86e6ed2d3bf..afb5fcd9dd0c 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1868,6 +1868,14 @@ intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
 		devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
 }
 
+static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
+{
+	if (!devdata || devdata->i915->vbt.version < 158)
+		return -1;
+
+	return devdata->child.hdmi_level_shifter_value;
+}
+
 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
 {
 	/*
@@ -1887,7 +1895,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 	const struct child_device_config *child = &devdata->child;
 	struct ddi_vbt_port_info *info;
 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
-	int dp_boost_level, hdmi_boost_level;
+	int dp_boost_level, hdmi_boost_level, hdmi_level_shift;
 	enum port port;
 
 	port = dvo_port_to_port(i915, child->dvo_port);
@@ -1949,15 +1957,11 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 		sanitize_aux_ch(i915, port);
 	}
 
-	if (i915->vbt.version >= 158) {
-		/* The VBT HDMI level shift values match the table we have. */
-		u8 hdmi_level_shift = child->hdmi_level_shifter_value;
+	hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
+	if (hdmi_level_shift >= 0) {
 		drm_dbg_kms(&i915->drm,
 			    "Port %c VBT HDMI level shift: %d\n",
-			    port_name(port),
-			    hdmi_level_shift);
-		info->hdmi_level_shift = hdmi_level_shift;
-		info->hdmi_level_shift_set = true;
+			    port_name(port), hdmi_level_shift);
 	}
 
 	if (i915->vbt.version >= 204) {
@@ -2950,13 +2954,13 @@ int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
 	return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
 }
 
+/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
-	const struct ddi_vbt_port_info *info =
-		&i915->vbt.ddi_port_info[encoder->port];
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
 
-	return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
+	return _intel_bios_hdmi_level_shift(devdata);
 }
 
 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index be2392bbcecc..67a9f07550d4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -641,10 +641,6 @@ struct ddi_vbt_port_info {
 
 	int max_tmds_clock;
 
-	/* This is an index in the HDMI/DVI DDI buffer translation table. */
-	u8 hdmi_level_shift;
-	u8 hdmi_level_shift_set:1;
-
 	u8 alternate_aux_channel;
 	u8 alternate_ddc_pin;
 
-- 
2.30.2

Re: [Intel-gfx] [PATCH v2 1/7] drm/i915/bios: use hdmi level shift directly from child data

[Nautiyal, Ankit K]

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 9/1/2021 9:39 PM, Jani Nikula wrote:
> Avoid extra caching of the data.
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_bios.c | 26 +++++++++++++----------
>   drivers/gpu/drm/i915/i915_drv.h           |  4 ----
>   2 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index e86e6ed2d3bf..afb5fcd9dd0c 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1868,6 +1868,14 @@ intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
>   		devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
>   }
>   
> +static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
> +{
> +	if (!devdata || devdata->i915->vbt.version < 158)
> +		return -1;
> +
> +	return devdata->child.hdmi_level_shifter_value;
> +}
> +
>   static bool is_port_valid(struct drm_i915_private *i915, enum port port)
>   {
>   	/*
> @@ -1887,7 +1895,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   	const struct child_device_config *child = &devdata->child;
>   	struct ddi_vbt_port_info *info;
>   	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
> -	int dp_boost_level, hdmi_boost_level;
> +	int dp_boost_level, hdmi_boost_level, hdmi_level_shift;
>   	enum port port;
>   
>   	port = dvo_port_to_port(i915, child->dvo_port);
> @@ -1949,15 +1957,11 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   		sanitize_aux_ch(i915, port);
>   	}
>   
> -	if (i915->vbt.version >= 158) {
> -		/* The VBT HDMI level shift values match the table we have. */
> -		u8 hdmi_level_shift = child->hdmi_level_shifter_value;
> +	hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
> +	if (hdmi_level_shift >= 0) {
>   		drm_dbg_kms(&i915->drm,
>   			    "Port %c VBT HDMI level shift: %d\n",
> -			    port_name(port),
> -			    hdmi_level_shift);
> -		info->hdmi_level_shift = hdmi_level_shift;
> -		info->hdmi_level_shift_set = true;
> +			    port_name(port), hdmi_level_shift);
>   	}
>   
>   	if (i915->vbt.version >= 204) {
> @@ -2950,13 +2954,13 @@ int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
>   	return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
>   }
>   
> +/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
>   int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> -	const struct ddi_vbt_port_info *info =
> -		&i915->vbt.ddi_port_info[encoder->port];
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
>   
> -	return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
> +	return _intel_bios_hdmi_level_shift(devdata);
>   }
>   
>   int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index be2392bbcecc..67a9f07550d4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -641,10 +641,6 @@ struct ddi_vbt_port_info {
>   
>   	int max_tmds_clock;
>   
> -	/* This is an index in the HDMI/DVI DDI buffer translation table. */
> -	u8 hdmi_level_shift;
> -	u8 hdmi_level_shift_set:1;
> -
>   	u8 alternate_aux_channel;
>   	u8 alternate_ddc_pin;
>   

[Intel-gfx] [PATCH v2 2/7] drm/i915/bios: use max tmds clock directly from child data

[Jani Nikula]

Avoid extra caching of the data.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 52 +++++++++++------------
 drivers/gpu/drm/i915/i915_drv.h           |  2 -
 2 files changed, 26 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index afb5fcd9dd0c..253a528ba61a 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1876,6 +1876,24 @@ static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *de
 	return devdata->child.hdmi_level_shifter_value;
 }
 
+static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
+{
+	if (!devdata || devdata->i915->vbt.version < 204)
+		return 0;
+
+	switch (devdata->child.hdmi_max_data_rate) {
+	default:
+		MISSING_CASE(devdata->child.hdmi_max_data_rate);
+		fallthrough;
+	case HDMI_MAX_DATA_RATE_PLATFORM:
+		return 0;
+	case HDMI_MAX_DATA_RATE_297:
+		return 297000;
+	case HDMI_MAX_DATA_RATE_165:
+		return 165000;
+	}
+}
+
 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
 {
 	/*
@@ -1895,7 +1913,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 	const struct child_device_config *child = &devdata->child;
 	struct ddi_vbt_port_info *info;
 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
-	int dp_boost_level, hdmi_boost_level, hdmi_level_shift;
+	int dp_boost_level, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
 	enum port port;
 
 	port = dvo_port_to_port(i915, child->dvo_port);
@@ -1964,30 +1982,11 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 			    port_name(port), hdmi_level_shift);
 	}
 
-	if (i915->vbt.version >= 204) {
-		int max_tmds_clock;
-
-		switch (child->hdmi_max_data_rate) {
-		default:
-			MISSING_CASE(child->hdmi_max_data_rate);
-			fallthrough;
-		case HDMI_MAX_DATA_RATE_PLATFORM:
-			max_tmds_clock = 0;
-			break;
-		case HDMI_MAX_DATA_RATE_297:
-			max_tmds_clock = 297000;
-			break;
-		case HDMI_MAX_DATA_RATE_165:
-			max_tmds_clock = 165000;
-			break;
-		}
-
-		if (max_tmds_clock)
-			drm_dbg_kms(&i915->drm,
-				    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
-				    port_name(port), max_tmds_clock);
-		info->max_tmds_clock = max_tmds_clock;
-	}
+	max_tmds_clock = _intel_bios_max_tmds_clock(devdata);
+	if (max_tmds_clock)
+		drm_dbg_kms(&i915->drm,
+			    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
+			    port_name(port), max_tmds_clock);
 
 	/* I_boost config for SKL and above */
 	dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
@@ -2950,8 +2949,9 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
 
-	return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
+	return _intel_bios_max_tmds_clock(devdata);
 }
 
 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 67a9f07550d4..8b4a31265978 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -639,8 +639,6 @@ struct ddi_vbt_port_info {
 	/* Non-NULL if port present. */
 	struct intel_bios_encoder_data *devdata;
 
-	int max_tmds_clock;
-
 	u8 alternate_aux_channel;
 	u8 alternate_ddc_pin;
 
-- 
2.30.2

Re: [Intel-gfx] [PATCH v2 2/7] drm/i915/bios: use max tmds clock directly from child data

[Nautiyal, Ankit K]

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 9/1/2021 9:40 PM, Jani Nikula wrote:
> Avoid extra caching of the data.
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_bios.c | 52 +++++++++++------------
>   drivers/gpu/drm/i915/i915_drv.h           |  2 -
>   2 files changed, 26 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index afb5fcd9dd0c..253a528ba61a 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1876,6 +1876,24 @@ static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *de
>   	return devdata->child.hdmi_level_shifter_value;
>   }
>   
> +static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
> +{
> +	if (!devdata || devdata->i915->vbt.version < 204)
> +		return 0;
> +
> +	switch (devdata->child.hdmi_max_data_rate) {
> +	default:
> +		MISSING_CASE(devdata->child.hdmi_max_data_rate);
> +		fallthrough;
> +	case HDMI_MAX_DATA_RATE_PLATFORM:
> +		return 0;
> +	case HDMI_MAX_DATA_RATE_297:
> +		return 297000;
> +	case HDMI_MAX_DATA_RATE_165:
> +		return 165000;
> +	}
> +}
> +
>   static bool is_port_valid(struct drm_i915_private *i915, enum port port)
>   {
>   	/*
> @@ -1895,7 +1913,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   	const struct child_device_config *child = &devdata->child;
>   	struct ddi_vbt_port_info *info;
>   	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
> -	int dp_boost_level, hdmi_boost_level, hdmi_level_shift;
> +	int dp_boost_level, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
>   	enum port port;
>   
>   	port = dvo_port_to_port(i915, child->dvo_port);
> @@ -1964,30 +1982,11 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   			    port_name(port), hdmi_level_shift);
>   	}
>   
> -	if (i915->vbt.version >= 204) {
> -		int max_tmds_clock;
> -
> -		switch (child->hdmi_max_data_rate) {
> -		default:
> -			MISSING_CASE(child->hdmi_max_data_rate);
> -			fallthrough;
> -		case HDMI_MAX_DATA_RATE_PLATFORM:
> -			max_tmds_clock = 0;
> -			break;
> -		case HDMI_MAX_DATA_RATE_297:
> -			max_tmds_clock = 297000;
> -			break;
> -		case HDMI_MAX_DATA_RATE_165:
> -			max_tmds_clock = 165000;
> -			break;
> -		}
> -
> -		if (max_tmds_clock)
> -			drm_dbg_kms(&i915->drm,
> -				    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
> -				    port_name(port), max_tmds_clock);
> -		info->max_tmds_clock = max_tmds_clock;
> -	}
> +	max_tmds_clock = _intel_bios_max_tmds_clock(devdata);
> +	if (max_tmds_clock)
> +		drm_dbg_kms(&i915->drm,
> +			    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
> +			    port_name(port), max_tmds_clock);
>   
>   	/* I_boost config for SKL and above */
>   	dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
> @@ -2950,8 +2949,9 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
>   int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
>   
> -	return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
> +	return _intel_bios_max_tmds_clock(devdata);
>   }
>   
>   /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 67a9f07550d4..8b4a31265978 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -639,8 +639,6 @@ struct ddi_vbt_port_info {
>   	/* Non-NULL if port present. */
>   	struct intel_bios_encoder_data *devdata;
>   
> -	int max_tmds_clock;
> -
>   	u8 alternate_aux_channel;
>   	u8 alternate_ddc_pin;
>   

[Intel-gfx] [PATCH v2 3/7] drm/i915/bios: use dp max link rate directly from child data

[Jani Nikula]

Avoid extra caching of the data.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 28 ++++++++++++++---------
 drivers/gpu/drm/i915/i915_drv.h           |  2 --
 2 files changed, 17 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 253a528ba61a..10b2beddc121 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1815,6 +1815,17 @@ static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
 	}
 }
 
+static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
+{
+	if (!devdata || devdata->i915->vbt.version < 216)
+		return 0;
+
+	if (devdata->i915->vbt.version >= 230)
+		return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
+	else
+		return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
+}
+
 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
 				 enum port port)
 {
@@ -1913,7 +1924,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 	const struct child_device_config *child = &devdata->child;
 	struct ddi_vbt_port_info *info;
 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
-	int dp_boost_level, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
+	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
 	enum port port;
 
 	port = dvo_port_to_port(i915, child->dvo_port);
@@ -2001,17 +2012,11 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 			    "Port %c VBT HDMI boost level: %d\n",
 			    port_name(port), hdmi_boost_level);
 
-	/* DP max link rate for GLK+ */
-	if (i915->vbt.version >= 216) {
-		if (i915->vbt.version >= 230)
-			info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
-		else
-			info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
-
+	dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata);
+	if (dp_max_link_rate)
 		drm_dbg_kms(&i915->drm,
 			    "Port %c VBT DP max link rate: %d\n",
-			    port_name(port), info->dp_max_link_rate);
-	}
+			    port_name(port), dp_max_link_rate);
 
 	info->devdata = devdata;
 }
@@ -2982,8 +2987,9 @@ int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *de
 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
 
-	return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
+	return _intel_bios_dp_max_link_rate(devdata);
 }
 
 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8b4a31265978..586b5368d4fc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -641,8 +641,6 @@ struct ddi_vbt_port_info {
 
 	u8 alternate_aux_channel;
 	u8 alternate_ddc_pin;
-
-	int dp_max_link_rate;		/* 0 for not limited by VBT */
 };
 
 enum psr_lines_to_wait {
-- 
2.30.2

Re: [Intel-gfx] [PATCH v2 3/7] drm/i915/bios: use dp max link rate directly from child data

[Nautiyal, Ankit K]

A small nitpick below:

Otherwise the patch looks good to me.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 9/1/2021 9:40 PM, Jani Nikula wrote:
> Avoid extra caching of the data.
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_bios.c | 28 ++++++++++++++---------
>   drivers/gpu/drm/i915/i915_drv.h           |  2 --
>   2 files changed, 17 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 253a528ba61a..10b2beddc121 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1815,6 +1815,17 @@ static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
>   	}
>   }
>   
> +static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
> +{
> +	if (!devdata || devdata->i915->vbt.version < 216)
> +		return 0;
> +
> +	if (devdata->i915->vbt.version >= 230)
> +		return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
> +	else
> +		return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);

Can do away with else.

Regards,

Ankit

> +}
> +
>   static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
>   				 enum port port)
>   {
> @@ -1913,7 +1924,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   	const struct child_device_config *child = &devdata->child;
>   	struct ddi_vbt_port_info *info;
>   	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
> -	int dp_boost_level, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
> +	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
>   	enum port port;
>   
>   	port = dvo_port_to_port(i915, child->dvo_port);
> @@ -2001,17 +2012,11 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   			    "Port %c VBT HDMI boost level: %d\n",
>   			    port_name(port), hdmi_boost_level);
>   
> -	/* DP max link rate for GLK+ */
> -	if (i915->vbt.version >= 216) {
> -		if (i915->vbt.version >= 230)
> -			info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
> -		else
> -			info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
> -
> +	dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata);
> +	if (dp_max_link_rate)
>   		drm_dbg_kms(&i915->drm,
>   			    "Port %c VBT DP max link rate: %d\n",
> -			    port_name(port), info->dp_max_link_rate);
> -	}
> +			    port_name(port), dp_max_link_rate);
>   
>   	info->devdata = devdata;
>   }
> @@ -2982,8 +2987,9 @@ int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *de
>   int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
>   
> -	return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
> +	return _intel_bios_dp_max_link_rate(devdata);
>   }
>   
>   int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8b4a31265978..586b5368d4fc 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -641,8 +641,6 @@ struct ddi_vbt_port_info {
>   
>   	u8 alternate_aux_channel;
>   	u8 alternate_ddc_pin;
> -
> -	int dp_max_link_rate;		/* 0 for not limited by VBT */
>   };
>   
>   enum psr_lines_to_wait {

[Intel-gfx] [PATCH v2 4/7] drm/i915/bios: use alternate aux channel directly from child data

[Jani Nikula]

Avoid extra caching of the data.

v2: Check for !info->devdata in intel_bios_port_aux_ch() (Ankit)

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 26 +++++++++++------------
 drivers/gpu/drm/i915/i915_drv.h           |  1 -
 2 files changed, 12 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 10b2beddc121..69d7da66f168 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1565,28 +1565,29 @@ static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
 	for_each_port(port) {
 		info = &i915->vbt.ddi_port_info[port];
 
-		if (info->devdata && aux_ch == info->alternate_aux_channel)
+		if (info->devdata && aux_ch == info->devdata->child.aux_channel)
 			return port;
 	}
 
 	return PORT_NONE;
 }
 
-static void sanitize_aux_ch(struct drm_i915_private *i915,
+static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
 			    enum port port)
 {
-	struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
+	struct drm_i915_private *i915 = devdata->i915;
+	struct ddi_vbt_port_info *info;
 	struct child_device_config *child;
 	enum port p;
 
-	p = get_port_by_aux_ch(i915, info->alternate_aux_channel);
+	p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
 	if (p == PORT_NONE)
 		return;
 
 	drm_dbg_kms(&i915->drm,
 		    "port %c trying to use the same AUX CH (0x%x) as port %c, "
 		    "disabling port %c DP support\n",
-		    port_name(port), info->alternate_aux_channel,
+		    port_name(port), devdata->child.aux_channel,
 		    port_name(p), port_name(p));
 
 	/*
@@ -1602,7 +1603,7 @@ static void sanitize_aux_ch(struct drm_i915_private *i915,
 	child = &info->devdata->child;
 
 	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
-	info->alternate_aux_channel = 0;
+	child->aux_channel = 0;
 }
 
 static const u8 cnp_ddc_pin_map[] = {
@@ -1980,11 +1981,8 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 		}
 	}
 
-	if (is_dp) {
-		info->alternate_aux_channel = child->aux_channel;
-
-		sanitize_aux_ch(i915, port);
-	}
+	if (is_dp)
+		sanitize_aux_ch(devdata, port);
 
 	hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
 	if (hdmi_level_shift >= 0) {
@@ -2863,7 +2861,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
 		&i915->vbt.ddi_port_info[port];
 	enum aux_ch aux_ch;
 
-	if (!info->alternate_aux_channel) {
+	if (!info->devdata || !info->devdata->child.aux_channel) {
 		aux_ch = (enum aux_ch)port;
 
 		drm_dbg_kms(&i915->drm,
@@ -2879,7 +2877,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
 	 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
 	 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
 	 */
-	switch (info->alternate_aux_channel) {
+	switch (info->devdata->child.aux_channel) {
 	case DP_AUX_A:
 		aux_ch = AUX_CH_A;
 		break;
@@ -2940,7 +2938,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
 			aux_ch = AUX_CH_I;
 		break;
 	default:
-		MISSING_CASE(info->alternate_aux_channel);
+		MISSING_CASE(info->devdata->child.aux_channel);
 		aux_ch = AUX_CH_A;
 		break;
 	}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 586b5368d4fc..032d59119407 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -639,7 +639,6 @@ struct ddi_vbt_port_info {
 	/* Non-NULL if port present. */
 	struct intel_bios_encoder_data *devdata;
 
-	u8 alternate_aux_channel;
 	u8 alternate_ddc_pin;
 };
 
-- 
2.30.2

Re: [Intel-gfx] [PATCH v2 4/7] drm/i915/bios: use alternate aux channel directly from child data

[Nautiyal, Ankit K]

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 9/1/2021 9:40 PM, Jani Nikula wrote:
> Avoid extra caching of the data.
>
> v2: Check for !info->devdata in intel_bios_port_aux_ch() (Ankit)
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_bios.c | 26 +++++++++++------------
>   drivers/gpu/drm/i915/i915_drv.h           |  1 -
>   2 files changed, 12 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 10b2beddc121..69d7da66f168 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1565,28 +1565,29 @@ static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
>   	for_each_port(port) {
>   		info = &i915->vbt.ddi_port_info[port];
>   
> -		if (info->devdata && aux_ch == info->alternate_aux_channel)
> +		if (info->devdata && aux_ch == info->devdata->child.aux_channel)
>   			return port;
>   	}
>   
>   	return PORT_NONE;
>   }
>   
> -static void sanitize_aux_ch(struct drm_i915_private *i915,
> +static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
>   			    enum port port)
>   {
> -	struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
> +	struct drm_i915_private *i915 = devdata->i915;
> +	struct ddi_vbt_port_info *info;
>   	struct child_device_config *child;
>   	enum port p;
>   
> -	p = get_port_by_aux_ch(i915, info->alternate_aux_channel);
> +	p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
>   	if (p == PORT_NONE)
>   		return;
>   
>   	drm_dbg_kms(&i915->drm,
>   		    "port %c trying to use the same AUX CH (0x%x) as port %c, "
>   		    "disabling port %c DP support\n",
> -		    port_name(port), info->alternate_aux_channel,
> +		    port_name(port), devdata->child.aux_channel,
>   		    port_name(p), port_name(p));
>   
>   	/*
> @@ -1602,7 +1603,7 @@ static void sanitize_aux_ch(struct drm_i915_private *i915,
>   	child = &info->devdata->child;
>   
>   	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
> -	info->alternate_aux_channel = 0;
> +	child->aux_channel = 0;
>   }
>   
>   static const u8 cnp_ddc_pin_map[] = {
> @@ -1980,11 +1981,8 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   		}
>   	}
>   
> -	if (is_dp) {
> -		info->alternate_aux_channel = child->aux_channel;
> -
> -		sanitize_aux_ch(i915, port);
> -	}
> +	if (is_dp)
> +		sanitize_aux_ch(devdata, port);
>   
>   	hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
>   	if (hdmi_level_shift >= 0) {
> @@ -2863,7 +2861,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
>   		&i915->vbt.ddi_port_info[port];
>   	enum aux_ch aux_ch;
>   
> -	if (!info->alternate_aux_channel) {
> +	if (!info->devdata || !info->devdata->child.aux_channel) {
>   		aux_ch = (enum aux_ch)port;
>   
>   		drm_dbg_kms(&i915->drm,
> @@ -2879,7 +2877,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
>   	 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
>   	 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
>   	 */
> -	switch (info->alternate_aux_channel) {
> +	switch (info->devdata->child.aux_channel) {
>   	case DP_AUX_A:
>   		aux_ch = AUX_CH_A;
>   		break;
> @@ -2940,7 +2938,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
>   			aux_ch = AUX_CH_I;
>   		break;
>   	default:
> -		MISSING_CASE(info->alternate_aux_channel);
> +		MISSING_CASE(info->devdata->child.aux_channel);
>   		aux_ch = AUX_CH_A;
>   		break;
>   	}
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 586b5368d4fc..032d59119407 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -639,7 +639,6 @@ struct ddi_vbt_port_info {
>   	/* Non-NULL if port present. */
>   	struct intel_bios_encoder_data *devdata;
>   
> -	u8 alternate_aux_channel;
>   	u8 alternate_ddc_pin;
>   };
>   

[Intel-gfx] [PATCH v2 5/7] drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize

[Jani Nikula]

Move code around to avoid a forward declaration in the future.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 154 +++++++++++-----------
 1 file changed, 77 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 69d7da66f168..b4113506b3b8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1501,6 +1501,83 @@ static u8 translate_iboost(u8 val)
 	return mapping[val];
 }
 
+static const u8 cnp_ddc_pin_map[] = {
+	[0] = 0, /* N/A */
+	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
+	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
+	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
+	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
+};
+
+static const u8 icp_ddc_pin_map[] = {
+	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
+	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
+	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
+	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
+	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
+	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
+	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
+	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
+	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
+};
+
+static const u8 rkl_pch_tgp_ddc_pin_map[] = {
+	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
+	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
+	[RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
+	[RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
+};
+
+static const u8 adls_ddc_pin_map[] = {
+	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
+	[ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
+	[ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
+	[ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
+	[ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
+};
+
+static const u8 gen9bc_tgp_ddc_pin_map[] = {
+	[DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
+	[DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
+	[DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
+};
+
+static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
+{
+	const u8 *ddc_pin_map;
+	int n_entries;
+
+	if (IS_ALDERLAKE_S(i915)) {
+		ddc_pin_map = adls_ddc_pin_map;
+		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
+	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
+		return vbt_pin;
+	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
+		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
+		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
+	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
+		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
+		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
+	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
+		ddc_pin_map = icp_ddc_pin_map;
+		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
+	} else if (HAS_PCH_CNP(i915)) {
+		ddc_pin_map = cnp_ddc_pin_map;
+		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
+	} else {
+		/* Assuming direct map */
+		return vbt_pin;
+	}
+
+	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
+		return ddc_pin_map[vbt_pin];
+
+	drm_dbg_kms(&i915->drm,
+		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
+		    vbt_pin);
+	return 0;
+}
+
 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
 {
 	const struct ddi_vbt_port_info *info;
@@ -1606,83 +1683,6 @@ static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
 	child->aux_channel = 0;
 }
 
-static const u8 cnp_ddc_pin_map[] = {
-	[0] = 0, /* N/A */
-	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
-	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
-	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
-	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
-};
-
-static const u8 icp_ddc_pin_map[] = {
-	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
-	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
-	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
-	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
-	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
-	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
-	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
-	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
-	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
-};
-
-static const u8 rkl_pch_tgp_ddc_pin_map[] = {
-	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
-	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
-	[RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
-	[RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
-};
-
-static const u8 adls_ddc_pin_map[] = {
-	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
-	[ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
-	[ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
-	[ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
-	[ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
-};
-
-static const u8 gen9bc_tgp_ddc_pin_map[] = {
-	[DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
-	[DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
-	[DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
-};
-
-static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
-{
-	const u8 *ddc_pin_map;
-	int n_entries;
-
-	if (IS_ALDERLAKE_S(i915)) {
-		ddc_pin_map = adls_ddc_pin_map;
-		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
-	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
-		return vbt_pin;
-	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
-		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
-		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
-	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
-		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
-		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
-	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
-		ddc_pin_map = icp_ddc_pin_map;
-		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
-	} else if (HAS_PCH_CNP(i915)) {
-		ddc_pin_map = cnp_ddc_pin_map;
-		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
-	} else {
-		/* Assuming direct map */
-		return vbt_pin;
-	}
-
-	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
-		return ddc_pin_map[vbt_pin];
-
-	drm_dbg_kms(&i915->drm,
-		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
-		    vbt_pin);
-	return 0;
-}
-
 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
 				    const int port_mapping[][3], u8 dvo_port)
 {
-- 
2.30.2

Re: [Intel-gfx] [PATCH v2 5/7] drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize

[Nautiyal, Ankit K]

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 9/1/2021 9:40 PM, Jani Nikula wrote:
> Move code around to avoid a forward declaration in the future.
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_bios.c | 154 +++++++++++-----------
>   1 file changed, 77 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 69d7da66f168..b4113506b3b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1501,6 +1501,83 @@ static u8 translate_iboost(u8 val)
>   	return mapping[val];
>   }
>   
> +static const u8 cnp_ddc_pin_map[] = {
> +	[0] = 0, /* N/A */
> +	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
> +	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
> +	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
> +	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
> +};
> +
> +static const u8 icp_ddc_pin_map[] = {
> +	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
> +	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
> +	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
> +	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
> +	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
> +	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
> +	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
> +	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
> +	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
> +};
> +
> +static const u8 rkl_pch_tgp_ddc_pin_map[] = {
> +	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
> +	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
> +	[RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
> +	[RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
> +};
> +
> +static const u8 adls_ddc_pin_map[] = {
> +	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
> +	[ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
> +	[ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
> +	[ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
> +	[ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
> +};
> +
> +static const u8 gen9bc_tgp_ddc_pin_map[] = {
> +	[DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
> +	[DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
> +	[DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
> +};
> +
> +static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
> +{
> +	const u8 *ddc_pin_map;
> +	int n_entries;
> +
> +	if (IS_ALDERLAKE_S(i915)) {
> +		ddc_pin_map = adls_ddc_pin_map;
> +		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
> +	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
> +		return vbt_pin;
> +	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
> +		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
> +		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
> +	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
> +		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
> +		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
> +	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
> +		ddc_pin_map = icp_ddc_pin_map;
> +		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
> +	} else if (HAS_PCH_CNP(i915)) {
> +		ddc_pin_map = cnp_ddc_pin_map;
> +		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
> +	} else {
> +		/* Assuming direct map */
> +		return vbt_pin;
> +	}
> +
> +	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
> +		return ddc_pin_map[vbt_pin];
> +
> +	drm_dbg_kms(&i915->drm,
> +		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
> +		    vbt_pin);
> +	return 0;
> +}
> +
>   static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
>   {
>   	const struct ddi_vbt_port_info *info;
> @@ -1606,83 +1683,6 @@ static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
>   	child->aux_channel = 0;
>   }
>   
> -static const u8 cnp_ddc_pin_map[] = {
> -	[0] = 0, /* N/A */
> -	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
> -	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
> -	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
> -	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
> -};
> -
> -static const u8 icp_ddc_pin_map[] = {
> -	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
> -	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
> -	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
> -	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
> -	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
> -	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
> -	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
> -	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
> -	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
> -};
> -
> -static const u8 rkl_pch_tgp_ddc_pin_map[] = {
> -	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
> -	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
> -	[RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
> -	[RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
> -};
> -
> -static const u8 adls_ddc_pin_map[] = {
> -	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
> -	[ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
> -	[ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
> -	[ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
> -	[ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
> -};
> -
> -static const u8 gen9bc_tgp_ddc_pin_map[] = {
> -	[DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
> -	[DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
> -	[DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
> -};
> -
> -static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
> -{
> -	const u8 *ddc_pin_map;
> -	int n_entries;
> -
> -	if (IS_ALDERLAKE_S(i915)) {
> -		ddc_pin_map = adls_ddc_pin_map;
> -		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
> -	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
> -		return vbt_pin;
> -	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
> -		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
> -		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
> -	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
> -		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
> -		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
> -	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
> -		ddc_pin_map = icp_ddc_pin_map;
> -		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
> -	} else if (HAS_PCH_CNP(i915)) {
> -		ddc_pin_map = cnp_ddc_pin_map;
> -		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
> -	} else {
> -		/* Assuming direct map */
> -		return vbt_pin;
> -	}
> -
> -	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
> -		return ddc_pin_map[vbt_pin];
> -
> -	drm_dbg_kms(&i915->drm,
> -		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
> -		    vbt_pin);
> -	return 0;
> -}
> -
>   static enum port __dvo_port_to_port(int n_ports, int n_dvo,
>   				    const int port_mapping[][3], u8 dvo_port)
>   {

[Intel-gfx] [PATCH v2 6/7] drm/i915/bios: use ddc pin directly from child data

[Jani Nikula]

Avoid extra caching of the data. This is slightly more subtle than one
would think. For one thing, we explicitly ignore 0 value in child device
ddc pin; this is specified as N/A and does not warrant a warning. For
another, we start looking for ddc pin collisions in sanitize using
unmapped pin numbering.

v2: Check !devdata in intel_bios_alternate_ddc_pin()

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 49 +++++++++++++----------
 drivers/gpu/drm/i915/i915_drv.h           |  2 -
 2 files changed, 28 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index b4113506b3b8..0c16a848a6e4 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1589,28 +1589,43 @@ static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
 	for_each_port(port) {
 		info = &i915->vbt.ddi_port_info[port];
 
-		if (info->devdata && ddc_pin == info->alternate_ddc_pin)
+		if (info->devdata && ddc_pin == info->devdata->child.ddc_pin)
 			return port;
 	}
 
 	return PORT_NONE;
 }
 
-static void sanitize_ddc_pin(struct drm_i915_private *i915,
+static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
 			     enum port port)
 {
-	struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
+	struct drm_i915_private *i915 = devdata->i915;
+	struct ddi_vbt_port_info *info;
 	struct child_device_config *child;
+	u8 mapped_ddc_pin;
 	enum port p;
 
-	p = get_port_by_ddc_pin(i915, info->alternate_ddc_pin);
+	if (!devdata->child.ddc_pin)
+		return;
+
+	mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
+	if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
+		drm_dbg_kms(&i915->drm,
+			    "Port %c has invalid DDC pin %d, "
+			    "sticking to defaults\n",
+			    port_name(port), mapped_ddc_pin);
+		devdata->child.ddc_pin = 0;
+		return;
+	}
+
+	p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
 	if (p == PORT_NONE)
 		return;
 
 	drm_dbg_kms(&i915->drm,
 		    "port %c trying to use the same DDC pin (0x%x) as port %c, "
 		    "disabling port %c DVI/HDMI support\n",
-		    port_name(port), info->alternate_ddc_pin,
+		    port_name(port), mapped_ddc_pin,
 		    port_name(p), port_name(p));
 
 	/*
@@ -1628,7 +1643,7 @@ static void sanitize_ddc_pin(struct drm_i915_private *i915,
 	child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
 	child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
 
-	info->alternate_ddc_pin = 0;
+	child->ddc_pin = 0;
 }
 
 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
@@ -1966,20 +1981,8 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 		    supports_typec_usb, supports_tbt,
 		    devdata->dsc != NULL);
 
-	if (is_dvi) {
-		u8 ddc_pin;
-
-		ddc_pin = map_ddc_pin(i915, child->ddc_pin);
-		if (intel_gmbus_is_valid_pin(i915, ddc_pin)) {
-			info->alternate_ddc_pin = ddc_pin;
-			sanitize_ddc_pin(i915, port);
-		} else {
-			drm_dbg_kms(&i915->drm,
-				    "Port %c has invalid DDC pin %d, "
-				    "sticking to defaults\n",
-				    port_name(port), ddc_pin);
-		}
-	}
+	if (is_dvi)
+		sanitize_ddc_pin(devdata, port);
 
 	if (is_dp)
 		sanitize_aux_ch(devdata, port);
@@ -2993,8 +2996,12 @@ int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
+
+	if (!devdata || !devdata->child.ddc_pin)
+		return 0;
 
-	return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
+	return map_ddc_pin(i915, devdata->child.ddc_pin);
 }
 
 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 032d59119407..744181cbe21c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -638,8 +638,6 @@ i915_fence_timeout(const struct drm_i915_private *i915)
 struct ddi_vbt_port_info {
 	/* Non-NULL if port present. */
 	struct intel_bios_encoder_data *devdata;
-
-	u8 alternate_ddc_pin;
 };
 
 enum psr_lines_to_wait {
-- 
2.30.2

Re: [Intel-gfx] [PATCH v2 6/7] drm/i915/bios: use ddc pin directly from child data

[Nautiyal, Ankit K]

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 9/1/2021 9:40 PM, Jani Nikula wrote:
> Avoid extra caching of the data. This is slightly more subtle than one
> would think. For one thing, we explicitly ignore 0 value in child device
> ddc pin; this is specified as N/A and does not warrant a warning. For
> another, we start looking for ddc pin collisions in sanitize using
> unmapped pin numbering.
>
> v2: Check !devdata in intel_bios_alternate_ddc_pin()
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_bios.c | 49 +++++++++++++----------
>   drivers/gpu/drm/i915/i915_drv.h           |  2 -
>   2 files changed, 28 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index b4113506b3b8..0c16a848a6e4 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1589,28 +1589,43 @@ static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
>   	for_each_port(port) {
>   		info = &i915->vbt.ddi_port_info[port];
>   
> -		if (info->devdata && ddc_pin == info->alternate_ddc_pin)
> +		if (info->devdata && ddc_pin == info->devdata->child.ddc_pin)
>   			return port;
>   	}
>   
>   	return PORT_NONE;
>   }
>   
> -static void sanitize_ddc_pin(struct drm_i915_private *i915,
> +static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
>   			     enum port port)
>   {
> -	struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
> +	struct drm_i915_private *i915 = devdata->i915;
> +	struct ddi_vbt_port_info *info;
>   	struct child_device_config *child;
> +	u8 mapped_ddc_pin;
>   	enum port p;
>   
> -	p = get_port_by_ddc_pin(i915, info->alternate_ddc_pin);
> +	if (!devdata->child.ddc_pin)
> +		return;
> +
> +	mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
> +	if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
> +		drm_dbg_kms(&i915->drm,
> +			    "Port %c has invalid DDC pin %d, "
> +			    "sticking to defaults\n",
> +			    port_name(port), mapped_ddc_pin);
> +		devdata->child.ddc_pin = 0;
> +		return;
> +	}
> +
> +	p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
>   	if (p == PORT_NONE)
>   		return;
>   
>   	drm_dbg_kms(&i915->drm,
>   		    "port %c trying to use the same DDC pin (0x%x) as port %c, "
>   		    "disabling port %c DVI/HDMI support\n",
> -		    port_name(port), info->alternate_ddc_pin,
> +		    port_name(port), mapped_ddc_pin,
>   		    port_name(p), port_name(p));
>   
>   	/*
> @@ -1628,7 +1643,7 @@ static void sanitize_ddc_pin(struct drm_i915_private *i915,
>   	child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
>   	child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
>   
> -	info->alternate_ddc_pin = 0;
> +	child->ddc_pin = 0;
>   }
>   
>   static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
> @@ -1966,20 +1981,8 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   		    supports_typec_usb, supports_tbt,
>   		    devdata->dsc != NULL);
>   
> -	if (is_dvi) {
> -		u8 ddc_pin;
> -
> -		ddc_pin = map_ddc_pin(i915, child->ddc_pin);
> -		if (intel_gmbus_is_valid_pin(i915, ddc_pin)) {
> -			info->alternate_ddc_pin = ddc_pin;
> -			sanitize_ddc_pin(i915, port);
> -		} else {
> -			drm_dbg_kms(&i915->drm,
> -				    "Port %c has invalid DDC pin %d, "
> -				    "sticking to defaults\n",
> -				    port_name(port), ddc_pin);
> -		}
> -	}
> +	if (is_dvi)
> +		sanitize_ddc_pin(devdata, port);
>   
>   	if (is_dp)
>   		sanitize_aux_ch(devdata, port);
> @@ -2993,8 +2996,12 @@ int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
>   int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
> +
> +	if (!devdata || !devdata->child.ddc_pin)
> +		return 0;
>   
> -	return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
> +	return map_ddc_pin(i915, devdata->child.ddc_pin);
>   }
>   
>   bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 032d59119407..744181cbe21c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -638,8 +638,6 @@ i915_fence_timeout(const struct drm_i915_private *i915)
>   struct ddi_vbt_port_info {
>   	/* Non-NULL if port present. */
>   	struct intel_bios_encoder_data *devdata;
> -
> -	u8 alternate_ddc_pin;
>   };
>   
>   enum psr_lines_to_wait {

[Intel-gfx] [PATCH v2 7/7] drm/i915/bios: get rid of vbt ddi_port_info

[Jani Nikula]

We can finally remove the extra caching in ddi_port_info. Good riddance.

v2: Rebased

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 63 +++++++++--------------
 drivers/gpu/drm/i915/i915_drv.h           |  7 +--
 2 files changed, 25 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 0c16a848a6e4..052f27c0fb0c 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1580,16 +1580,16 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
 
 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
 {
-	const struct ddi_vbt_port_info *info;
+	const struct intel_bios_encoder_data *devdata;
 	enum port port;
 
 	if (!ddc_pin)
 		return PORT_NONE;
 
 	for_each_port(port) {
-		info = &i915->vbt.ddi_port_info[port];
+		devdata = i915->vbt.ports[port];
 
-		if (info->devdata && ddc_pin == info->devdata->child.ddc_pin)
+		if (devdata && ddc_pin == devdata->child.ddc_pin)
 			return port;
 	}
 
@@ -1600,7 +1600,6 @@ static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
 			     enum port port)
 {
 	struct drm_i915_private *i915 = devdata->i915;
-	struct ddi_vbt_port_info *info;
 	struct child_device_config *child;
 	u8 mapped_ddc_pin;
 	enum port p;
@@ -1637,8 +1636,7 @@ static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
 	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
 	 * port A and port E with the same AUX ch and we must pick port E :(
 	 */
-	info = &i915->vbt.ddi_port_info[p];
-	child = &info->devdata->child;
+	child = &i915->vbt.ports[p]->child;
 
 	child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
 	child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
@@ -1648,16 +1646,16 @@ static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
 
 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
 {
-	const struct ddi_vbt_port_info *info;
+	const struct intel_bios_encoder_data *devdata;
 	enum port port;
 
 	if (!aux_ch)
 		return PORT_NONE;
 
 	for_each_port(port) {
-		info = &i915->vbt.ddi_port_info[port];
+		devdata = i915->vbt.ports[port];
 
-		if (info->devdata && aux_ch == info->devdata->child.aux_channel)
+		if (devdata && aux_ch == devdata->child.aux_channel)
 			return port;
 	}
 
@@ -1668,7 +1666,6 @@ static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
 			    enum port port)
 {
 	struct drm_i915_private *i915 = devdata->i915;
-	struct ddi_vbt_port_info *info;
 	struct child_device_config *child;
 	enum port p;
 
@@ -1691,8 +1688,7 @@ static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
 	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
 	 * port A and port E with the same AUX ch and we must pick port E :(
 	 */
-	info = &i915->vbt.ddi_port_info[p];
-	child = &info->devdata->child;
+	child = &i915->vbt.ports[p]->child;
 
 	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
 	child->aux_channel = 0;
@@ -1938,7 +1934,6 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 			   struct intel_bios_encoder_data *devdata)
 {
 	const struct child_device_config *child = &devdata->child;
-	struct ddi_vbt_port_info *info;
 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
 	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
 	enum port port;
@@ -1954,9 +1949,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 		return;
 	}
 
-	info = &i915->vbt.ddi_port_info[port];
-
-	if (info->devdata) {
+	if (i915->vbt.ports[port]) {
 		drm_dbg_kms(&i915->drm,
 			    "More than one child device for port %c in VBT, using the first.\n",
 			    port_name(port));
@@ -2019,7 +2012,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
 			    "Port %c VBT DP max link rate: %d\n",
 			    port_name(port), dp_max_link_rate);
 
-	info->devdata = devdata;
+	i915->vbt.ports[port] = devdata;
 }
 
 static void parse_ddi_ports(struct drm_i915_private *i915)
@@ -2557,12 +2550,8 @@ bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
 		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
 	};
 
-	if (HAS_DDI(i915)) {
-		const struct ddi_vbt_port_info *port_info =
-			&i915->vbt.ddi_port_info[port];
-
-		return port_info->devdata;
-	}
+	if (HAS_DDI(i915))
+		return i915->vbt.ports[port];
 
 	/* FIXME maybe deal with port A as well? */
 	if (drm_WARN_ON(&i915->drm,
@@ -2813,8 +2802,7 @@ bool
 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
 				enum port port)
 {
-	const struct intel_bios_encoder_data *devdata =
-		i915->vbt.ddi_port_info[port].devdata;
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
 
 	if (drm_WARN_ON_ONCE(&i915->drm,
 			     !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
@@ -2834,8 +2822,7 @@ bool
 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
 			     enum port port)
 {
-	const struct intel_bios_encoder_data *devdata =
-		i915->vbt.ddi_port_info[port].devdata;
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
 
 	return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
 }
@@ -2851,8 +2838,7 @@ bool
 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
 				   enum port port)
 {
-	const struct intel_bios_encoder_data *devdata =
-		i915->vbt.ddi_port_info[port].devdata;
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
 
 	return devdata && devdata->child.lane_reversal;
 }
@@ -2860,11 +2846,10 @@ intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
 				   enum port port)
 {
-	const struct ddi_vbt_port_info *info =
-		&i915->vbt.ddi_port_info[port];
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
 	enum aux_ch aux_ch;
 
-	if (!info->devdata || !info->devdata->child.aux_channel) {
+	if (!devdata || !devdata->child.aux_channel) {
 		aux_ch = (enum aux_ch)port;
 
 		drm_dbg_kms(&i915->drm,
@@ -2880,7 +2865,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
 	 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
 	 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
 	 */
-	switch (info->devdata->child.aux_channel) {
+	switch (devdata->child.aux_channel) {
 	case DP_AUX_A:
 		aux_ch = AUX_CH_A;
 		break;
@@ -2941,7 +2926,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
 			aux_ch = AUX_CH_I;
 		break;
 	default:
-		MISSING_CASE(info->devdata->child.aux_channel);
+		MISSING_CASE(devdata->child.aux_channel);
 		aux_ch = AUX_CH_A;
 		break;
 	}
@@ -2955,7 +2940,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
-	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
 
 	return _intel_bios_max_tmds_clock(devdata);
 }
@@ -2964,7 +2949,7 @@ int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
-	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
 
 	return _intel_bios_hdmi_level_shift(devdata);
 }
@@ -2988,7 +2973,7 @@ int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *de
 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
-	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
 
 	return _intel_bios_dp_max_link_rate(devdata);
 }
@@ -2996,7 +2981,7 @@ int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
-	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
 
 	if (!devdata || !devdata->child.ddc_pin)
 		return 0;
@@ -3017,5 +3002,5 @@ bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devda
 const struct intel_bios_encoder_data *
 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
 {
-	return i915->vbt.ddi_port_info[port].devdata;
+	return i915->vbt.ports[port];
 }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 744181cbe21c..309a483d1722 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -635,11 +635,6 @@ i915_fence_timeout(const struct drm_i915_private *i915)
 /* Amount of PSF GV points, BSpec precisely defines this */
 #define I915_NUM_PSF_GV_POINTS 3
 
-struct ddi_vbt_port_info {
-	/* Non-NULL if port present. */
-	struct intel_bios_encoder_data *devdata;
-};
-
 enum psr_lines_to_wait {
 	PSR_0_LINES_TO_WAIT = 0,
 	PSR_1_LINE_TO_WAIT,
@@ -720,7 +715,7 @@ struct intel_vbt_data {
 
 	struct list_head display_devices;
 
-	struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
+	struct intel_bios_encoder_data *ports[I915_MAX_PORTS]; /* Non-NULL if port present. */
 	struct sdvo_device_mapping sdvo_mappings[2];
 };
 
-- 
2.30.2

Re: [Intel-gfx] [PATCH v2 7/7] drm/i915/bios: get rid of vbt ddi_port_info

[Nautiyal, Ankit K]

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 9/1/2021 9:40 PM, Jani Nikula wrote:
> We can finally remove the extra caching in ddi_port_info. Good riddance.
>
> v2: Rebased
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_bios.c | 63 +++++++++--------------
>   drivers/gpu/drm/i915/i915_drv.h           |  7 +--
>   2 files changed, 25 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 0c16a848a6e4..052f27c0fb0c 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1580,16 +1580,16 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
>   
>   static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
>   {
> -	const struct ddi_vbt_port_info *info;
> +	const struct intel_bios_encoder_data *devdata;
>   	enum port port;
>   
>   	if (!ddc_pin)
>   		return PORT_NONE;
>   
>   	for_each_port(port) {
> -		info = &i915->vbt.ddi_port_info[port];
> +		devdata = i915->vbt.ports[port];
>   
> -		if (info->devdata && ddc_pin == info->devdata->child.ddc_pin)
> +		if (devdata && ddc_pin == devdata->child.ddc_pin)
>   			return port;
>   	}
>   
> @@ -1600,7 +1600,6 @@ static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
>   			     enum port port)
>   {
>   	struct drm_i915_private *i915 = devdata->i915;
> -	struct ddi_vbt_port_info *info;
>   	struct child_device_config *child;
>   	u8 mapped_ddc_pin;
>   	enum port p;
> @@ -1637,8 +1636,7 @@ static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
>   	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
>   	 * port A and port E with the same AUX ch and we must pick port E :(
>   	 */
> -	info = &i915->vbt.ddi_port_info[p];
> -	child = &info->devdata->child;
> +	child = &i915->vbt.ports[p]->child;
>   
>   	child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
>   	child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
> @@ -1648,16 +1646,16 @@ static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
>   
>   static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
>   {
> -	const struct ddi_vbt_port_info *info;
> +	const struct intel_bios_encoder_data *devdata;
>   	enum port port;
>   
>   	if (!aux_ch)
>   		return PORT_NONE;
>   
>   	for_each_port(port) {
> -		info = &i915->vbt.ddi_port_info[port];
> +		devdata = i915->vbt.ports[port];
>   
> -		if (info->devdata && aux_ch == info->devdata->child.aux_channel)
> +		if (devdata && aux_ch == devdata->child.aux_channel)
>   			return port;
>   	}
>   
> @@ -1668,7 +1666,6 @@ static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
>   			    enum port port)
>   {
>   	struct drm_i915_private *i915 = devdata->i915;
> -	struct ddi_vbt_port_info *info;
>   	struct child_device_config *child;
>   	enum port p;
>   
> @@ -1691,8 +1688,7 @@ static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
>   	 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
>   	 * port A and port E with the same AUX ch and we must pick port E :(
>   	 */
> -	info = &i915->vbt.ddi_port_info[p];
> -	child = &info->devdata->child;
> +	child = &i915->vbt.ports[p]->child;
>   
>   	child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
>   	child->aux_channel = 0;
> @@ -1938,7 +1934,6 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   			   struct intel_bios_encoder_data *devdata)
>   {
>   	const struct child_device_config *child = &devdata->child;
> -	struct ddi_vbt_port_info *info;
>   	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
>   	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
>   	enum port port;
> @@ -1954,9 +1949,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   		return;
>   	}
>   
> -	info = &i915->vbt.ddi_port_info[port];
> -
> -	if (info->devdata) {
> +	if (i915->vbt.ports[port]) {
>   		drm_dbg_kms(&i915->drm,
>   			    "More than one child device for port %c in VBT, using the first.\n",
>   			    port_name(port));
> @@ -2019,7 +2012,7 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>   			    "Port %c VBT DP max link rate: %d\n",
>   			    port_name(port), dp_max_link_rate);
>   
> -	info->devdata = devdata;
> +	i915->vbt.ports[port] = devdata;
>   }
>   
>   static void parse_ddi_ports(struct drm_i915_private *i915)
> @@ -2557,12 +2550,8 @@ bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
>   		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
>   	};
>   
> -	if (HAS_DDI(i915)) {
> -		const struct ddi_vbt_port_info *port_info =
> -			&i915->vbt.ddi_port_info[port];
> -
> -		return port_info->devdata;
> -	}
> +	if (HAS_DDI(i915))
> +		return i915->vbt.ports[port];
>   
>   	/* FIXME maybe deal with port A as well? */
>   	if (drm_WARN_ON(&i915->drm,
> @@ -2813,8 +2802,7 @@ bool
>   intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
>   				enum port port)
>   {
> -	const struct intel_bios_encoder_data *devdata =
> -		i915->vbt.ddi_port_info[port].devdata;
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
>   
>   	if (drm_WARN_ON_ONCE(&i915->drm,
>   			     !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
> @@ -2834,8 +2822,7 @@ bool
>   intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
>   			     enum port port)
>   {
> -	const struct intel_bios_encoder_data *devdata =
> -		i915->vbt.ddi_port_info[port].devdata;
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
>   
>   	return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
>   }
> @@ -2851,8 +2838,7 @@ bool
>   intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
>   				   enum port port)
>   {
> -	const struct intel_bios_encoder_data *devdata =
> -		i915->vbt.ddi_port_info[port].devdata;
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
>   
>   	return devdata && devdata->child.lane_reversal;
>   }
> @@ -2860,11 +2846,10 @@ intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
>   enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
>   				   enum port port)
>   {
> -	const struct ddi_vbt_port_info *info =
> -		&i915->vbt.ddi_port_info[port];
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
>   	enum aux_ch aux_ch;
>   
> -	if (!info->devdata || !info->devdata->child.aux_channel) {
> +	if (!devdata || !devdata->child.aux_channel) {
>   		aux_ch = (enum aux_ch)port;
>   
>   		drm_dbg_kms(&i915->drm,
> @@ -2880,7 +2865,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
>   	 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
>   	 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
>   	 */
> -	switch (info->devdata->child.aux_channel) {
> +	switch (devdata->child.aux_channel) {
>   	case DP_AUX_A:
>   		aux_ch = AUX_CH_A;
>   		break;
> @@ -2941,7 +2926,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
>   			aux_ch = AUX_CH_I;
>   		break;
>   	default:
> -		MISSING_CASE(info->devdata->child.aux_channel);
> +		MISSING_CASE(devdata->child.aux_channel);
>   		aux_ch = AUX_CH_A;
>   		break;
>   	}
> @@ -2955,7 +2940,7 @@ enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
>   int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> -	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
>   
>   	return _intel_bios_max_tmds_clock(devdata);
>   }
> @@ -2964,7 +2949,7 @@ int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
>   int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> -	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
>   
>   	return _intel_bios_hdmi_level_shift(devdata);
>   }
> @@ -2988,7 +2973,7 @@ int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *de
>   int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> -	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
>   
>   	return _intel_bios_dp_max_link_rate(devdata);
>   }
> @@ -2996,7 +2981,7 @@ int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
>   int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
>   {
>   	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> -	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;
> +	const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
>   
>   	if (!devdata || !devdata->child.ddc_pin)
>   		return 0;
> @@ -3017,5 +3002,5 @@ bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devda
>   const struct intel_bios_encoder_data *
>   intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
>   {
> -	return i915->vbt.ddi_port_info[port].devdata;
> +	return i915->vbt.ports[port];
>   }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 744181cbe21c..309a483d1722 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -635,11 +635,6 @@ i915_fence_timeout(const struct drm_i915_private *i915)
>   /* Amount of PSF GV points, BSpec precisely defines this */
>   #define I915_NUM_PSF_GV_POINTS 3
>   
> -struct ddi_vbt_port_info {
> -	/* Non-NULL if port present. */
> -	struct intel_bios_encoder_data *devdata;
> -};
> -
>   enum psr_lines_to_wait {
>   	PSR_0_LINES_TO_WAIT = 0,
>   	PSR_1_LINE_TO_WAIT,
> @@ -720,7 +715,7 @@ struct intel_vbt_data {
>   
>   	struct list_head display_devices;
>   
> -	struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
> +	struct intel_bios_encoder_data *ports[I915_MAX_PORTS]; /* Non-NULL if port present. */
>   	struct sdvo_device_mapping sdvo_mappings[2];
>   };
>   

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/bios: remove vbt ddi_port_info caching (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/bios: remove vbt ddi_port_info caching (rev2)
URL   : https://patchwork.freedesktop.org/series/93957/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
631c5797e268 drm/i915/bios: use hdmi level shift directly from child data
-:71: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#71: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2961:
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;

total: 0 errors, 1 warnings, 0 checks, 66 lines checked
69a7a6ba4efa drm/i915/bios: use max tmds clock directly from child data
-:92: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#92: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2952:
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;

total: 0 errors, 1 warnings, 0 checks, 85 lines checked
58c59f8ec842 drm/i915/bios: use dp max link rate directly from child data
-:70: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#70: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2990:
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;

total: 0 errors, 1 warnings, 0 checks, 63 lines checked
8f42bba04387 drm/i915/bios: use alternate aux channel directly from child data
76b2336849d2 drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize
efaf221f51b3 drm/i915/bios: use ddc pin directly from child data
-:109: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#109: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2999:
+	const struct intel_bios_encoder_data *devdata = i915->vbt.ddi_port_info[encoder->port].devdata;

total: 0 errors, 1 warnings, 0 checks, 99 lines checked
2898c8f26498 drm/i915/bios: get rid of vbt ddi_port_info

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/bios: remove vbt ddi_port_info caching (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4854 bytes --]

== Series Details ==

Series: drm/i915/bios: remove vbt ddi_port_info caching (rev2)
URL   : https://patchwork.freedesktop.org/series/93957/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10544 -> Patchwork_20938
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/index.html

Known issues
------------

  Here are the changes found in Patchwork_20938 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-tgl-1115g4:      [PASS][1] -> [FAIL][2] ([i915#1888])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html

  * igt@i915_selftest@live@workarounds:
    - fi-rkl-guc:         [PASS][3] -> [DMESG-FAIL][4] ([i915#3928])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/fi-rkl-guc/igt@i915_selftest@live@workarounds.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/fi-rkl-guc/igt@i915_selftest@live@workarounds.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - fi-snb-2600:        NOTRUN -> [SKIP][5] ([fdo#109271]) +37 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/fi-snb-2600/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-snb-2600:        NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/fi-snb-2600/igt@kms_chamelium@hdmi-crc-fast.html

  * igt@runner@aborted:
    - fi-rkl-guc:         NOTRUN -> [FAIL][7] ([i915#3928])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/fi-rkl-guc/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-cfl-8109u:       [FAIL][8] ([i915#4054]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/fi-cfl-8109u/igt@i915_pm_rpm@module-reload.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/fi-cfl-8109u/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live@execlists:
    - fi-cfl-8109u:       [DMESG-WARN][10] ([i915#203]) -> [PASS][11] +4 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/fi-cfl-8109u/igt@i915_selftest@live@execlists.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/fi-cfl-8109u/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@hangcheck:
    - {fi-hsw-gt1}:       [DMESG-WARN][12] ([i915#3303]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#203]: https://gitlab.freedesktop.org/drm/intel/issues/203
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3928]: https://gitlab.freedesktop.org/drm/intel/issues/3928
  [i915#4054]: https://gitlab.freedesktop.org/drm/intel/issues/4054


Participating hosts (42 -> 35)
------------------------------

  Additional (1): fi-snb-2600 
  Missing    (8): fi-ilk-m540 bat-adls-5 bat-dg1-6 bat-dg1-5 fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus bat-jsl-1 


Build changes
-------------

  * Linux: CI_DRM_10544 -> Patchwork_20938

  CI-20190529: 20190529
  CI_DRM_10544: 078e7300cf0130241e5d472d8e2f7eef4ef11b65 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6193: 080869f804cb86b25a38889e5ce9a870571cd8c4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_20938: 2898c8f26498730dd4cc1afb133442abbf483c12 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

2898c8f26498 drm/i915/bios: get rid of vbt ddi_port_info
efaf221f51b3 drm/i915/bios: use ddc pin directly from child data
76b2336849d2 drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize
8f42bba04387 drm/i915/bios: use alternate aux channel directly from child data
58c59f8ec842 drm/i915/bios: use dp max link rate directly from child data
69a7a6ba4efa drm/i915/bios: use max tmds clock directly from child data
631c5797e268 drm/i915/bios: use hdmi level shift directly from child data

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/index.html

[-- Attachment #2: Type: text/html, Size: 5836 bytes --]

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/bios: remove vbt ddi_port_info caching (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30277 bytes --]

== Series Details ==

Series: drm/i915/bios: remove vbt ddi_port_info caching (rev2)
URL   : https://patchwork.freedesktop.org/series/93957/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10544_full -> Patchwork_20938_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_20938_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rps@reset:
    - {shard-rkl}:        [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@i915_pm_rps@reset.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@i915_pm_rps@reset.html

  * igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
    - {shard-rkl}:        [SKIP][3] ([i915#1845]) -> [SKIP][4] +16 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen:
    - {shard-rkl}:        [SKIP][5] ([fdo#112022]) -> [SKIP][6] +8 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-2/igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_cursor_crc@pipe-c-cursor-32x10-offscreen.html

  
Known issues
------------

  Here are the changes found in Patchwork_20938_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-clear:
    - shard-skl:          [PASS][7] -> [FAIL][8] ([i915#1888] / [i915#3160])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-skl4/igt@gem_create@create-clear.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl7/igt@gem_create@create-clear.html

  * igt@gem_ctx_persistence@process:
    - shard-snb:          NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1099]) +5 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-snb2/igt@gem_ctx_persistence@process.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [PASS][10] -> [TIMEOUT][11] ([i915#2369] / [i915#3063] / [i915#3648])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-tglb1/igt@gem_eio@unwedge-stress.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb3/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-kbl:          [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-kbl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-iclb:         [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-iclb3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-iclb1/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-tglb:         [PASS][16] -> [FAIL][17] ([i915#2842]) +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-tglb5/igt@gem_exec_fair@basic-pace@vcs1.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-kbl:          [PASS][18] -> [SKIP][19] ([fdo#109271])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-tglb:         NOTRUN -> [SKIP][20] ([fdo#109313])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb3/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_mmap_gtt@cpuset-big-copy-odd:
    - shard-iclb:         [PASS][21] -> [FAIL][22] ([i915#2428])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-iclb3/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-iclb1/igt@gem_mmap_gtt@cpuset-big-copy-odd.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-apl:          NOTRUN -> [WARN][23] ([i915#2658])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl1/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-kbl:          NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#3323])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@gem_userptr_blits@dmabuf-sync.html
    - shard-apl:          NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#3323])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl7/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-tglb:         NOTRUN -> [FAIL][26] ([i915#3318])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@gem_userptr_blits@vma-merge.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [PASS][27] -> [DMESG-WARN][28] ([i915#1436] / [i915#716])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-skl6/igt@gen9_exec_parse@allowed-single.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl6/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-iclb:         NOTRUN -> [SKIP][29] ([i915#2856]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-iclb2/igt@gen9_exec_parse@bb-start-far.html
    - shard-tglb:         NOTRUN -> [SKIP][30] ([i915#2856])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb3/igt@gen9_exec_parse@bb-start-far.html

  * igt@i915_pm_rpm@gem-mmap-type@fixed:
    - shard-apl:          NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#3976])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl8/igt@i915_pm_rpm@gem-mmap-type@fixed.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#3777]) +1 similar issue
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-skl:          NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3777])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3777]) +2 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][35] ([i915#3722])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-apl:          NOTRUN -> [SKIP][36] ([fdo#109271]) +310 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][37] ([i915#3689] / [i915#3886]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb3/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][38] ([i915#3689]) +2 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_ccs.html

  * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3886]) +14 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl7/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
    - shard-skl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +2 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl1/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs:
    - shard-snb:          NOTRUN -> [SKIP][42] ([fdo#109271]) +501 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-snb5/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html

  * igt@kms_color@pipe-c-ctm-0-25:
    - shard-skl:          [PASS][43] -> [DMESG-WARN][44] ([i915#1982]) +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-skl7/igt@kms_color@pipe-c-ctm-0-25.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_color@pipe-c-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-a-ctm-limited-range:
    - shard-apl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +29 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl3/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
    - shard-snb:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +21 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-snb5/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html

  * igt@kms_color_chamelium@pipe-d-ctm-0-75:
    - shard-tglb:         NOTRUN -> [SKIP][47] ([fdo#109284] / [fdo#111827]) +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@kms_color_chamelium@pipe-d-ctm-0-75.html

  * igt@kms_color_chamelium@pipe-d-ctm-green-to-red:
    - shard-skl:          NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_color_chamelium@pipe-d-ctm-green-to-red.html

  * igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes:
    - shard-kbl:          NOTRUN -> [SKIP][49] ([fdo#109271] / [fdo#111827]) +7 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-apl:          NOTRUN -> [TIMEOUT][50] ([i915#1319])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl7/igt@kms_content_protection@atomic-dpms.html
    - shard-kbl:          NOTRUN -> [TIMEOUT][51] ([i915#1319])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@uevent:
    - shard-tglb:         NOTRUN -> [SKIP][52] ([fdo#111828])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x170-sliding:
    - shard-kbl:          NOTRUN -> [SKIP][53] ([fdo#109271]) +71 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-512x170-sliding.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-skl:          [PASS][54] -> [INCOMPLETE][55] ([i915#2828] / [i915#300])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][56] ([i915#3319])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement.html

  * igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge:
    - shard-skl:          NOTRUN -> [SKIP][57] ([fdo#109271]) +33 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html

  * igt@kms_flip@plain-flip-fb-recreate@c-edp1:
    - shard-skl:          [PASS][58] -> [FAIL][59] ([i915#2122])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-skl7/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl5/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
    - shard-apl:          NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#2672])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([fdo#111825]) +9 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#533]) +2 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl8/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-d:
    - shard-skl:          NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#533])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_pipe_crc_basic@read-crc-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][64] -> [DMESG-WARN][65] ([i915#180]) +1 similar issue
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
    - shard-apl:          NOTRUN -> [FAIL][66] ([fdo#108145] / [i915#265]) +3 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl3/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-skl:          NOTRUN -> [FAIL][67] ([fdo#108145] / [i915#265])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
    - shard-kbl:          NOTRUN -> [FAIL][68] ([fdo#108145] / [i915#265]) +1 similar issue
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
    - shard-apl:          NOTRUN -> [FAIL][69] ([i915#265]) +1 similar issue
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl7/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
    - shard-apl:          NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#658]) +8 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
    - shard-kbl:          NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#658]) +2 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5:
    - shard-skl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#658])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-iclb:         [PASS][73] -> [SKIP][74] ([fdo#109441])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-iclb4/igt@kms_psr@psr2_cursor_plane_onoff.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-kbl:          [PASS][75] -> [INCOMPLETE][76] ([i915#155] / [i915#2828])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-kbl1/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-d-wait-forked:
    - shard-iclb:         NOTRUN -> [SKIP][77] ([fdo#109278]) +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-iclb2/igt@kms_vblank@pipe-d-wait-forked.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-apl:          NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#2437])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl7/igt@kms_writeback@writeback-fb-id.html
    - shard-kbl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#2437])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-tglb:         NOTRUN -> [SKIP][80] ([i915#2437])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@prime_nv_pcopy@test1_micro:
    - shard-tglb:         NOTRUN -> [SKIP][81] ([fdo#109291])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@prime_nv_pcopy@test1_micro.html

  * igt@sysfs_clients@fair-1:
    - shard-tglb:         NOTRUN -> [SKIP][82] ([i915#2994])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@sysfs_clients@fair-1.html

  * igt@sysfs_clients@fair-3:
    - shard-kbl:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2994]) +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@sysfs_clients@fair-3.html

  * igt@sysfs_clients@fair-7:
    - shard-apl:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2994]) +3 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl1/igt@sysfs_clients@fair-7.html

  * igt@sysfs_clients@sema-25:
    - shard-skl:          NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2994])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@sysfs_clients@sema-25.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - shard-apl:          [DMESG-WARN][86] ([i915#180]) -> [PASS][87]
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-apl8/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-apl1/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_eio@reset-stress:
    - {shard-rkl}:        [FAIL][88] ([i915#3115]) -> [PASS][89]
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@gem_eio@reset-stress.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@gem_eio@reset-stress.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-kbl:          [FAIL][90] ([i915#2846]) -> [PASS][91]
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-kbl4/igt@gem_exec_fair@basic-deadline.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
    - {shard-rkl}:        [FAIL][92] ([i915#2846]) -> [PASS][93]
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@gem_exec_fair@basic-deadline.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][94] ([i915#2842]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-iclb1/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][96] ([i915#2842]) -> [PASS][97] +1 similar issue
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
    - shard-tglb:         [FAIL][98] ([i915#2842]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-tglb5/igt@gem_exec_fair@basic-pace@bcs0.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@gem_exec_fair@basic-pace@bcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
    - shard-kbl:          [FAIL][100] ([i915#2842]) -> [PASS][101] +1 similar issue
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs0.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - {shard-rkl}:        [FAIL][102] ([i915#2842]) -> [PASS][103] +1 similar issue
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-1/igt@gem_exec_fair@basic-throttle@rcs0.html
    - shard-iclb:         [FAIL][104] ([i915#2849]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-iclb4/igt@gem_exec_fair@basic-throttle@rcs0.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy:
    - {shard-rkl}:        [FAIL][106] ([i915#2428]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-6/igt@gem_mmap_gtt@cpuset-basic-small-copy.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-2/igt@gem_mmap_gtt@cpuset-basic-small-copy.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
    - shard-iclb:         [FAIL][108] ([i915#2428]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-iclb4/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-iclb6/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html

  * igt@i915_pm_dc@dc5-psr:
    - {shard-rkl}:        [SKIP][110] ([i915#658]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@i915_pm_dc@dc5-psr.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@i915_pm_dc@dc5-psr.html

  * igt@i915_pm_rpm@basic-rte:
    - {shard-rkl}:        [SKIP][112] ([fdo#109308]) -> [PASS][113] +2 similar issues
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-2/igt@i915_pm_rpm@basic-rte.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@i915_pm_rpm@basic-rte.html

  * igt@i915_pm_rpm@gem-execbuf-stress:
    - shard-tglb:         [INCOMPLETE][114] ([i915#2411]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-tglb8/igt@i915_pm_rpm@gem-execbuf-stress.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@i915_pm_rpm@gem-execbuf-stress.html

  * igt@i915_selftest@live@hangcheck:
    - shard-snb:          [INCOMPLETE][116] ([i915#3921]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-snb5/igt@i915_selftest@live@hangcheck.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-snb6/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@requests:
    - shard-tglb:         [DMESG-FAIL][118] ([i915#4062]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-tglb5/igt@i915_selftest@live@requests.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-tglb5/igt@i915_selftest@live@requests.html

  * igt@i915_suspend@forcewake:
    - shard-kbl:          [DMESG-WARN][120] ([i915#180]) -> [PASS][121] +2 similar issues
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-kbl6/igt@i915_suspend@forcewake.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-kbl3/igt@i915_suspend@forcewake.html

  * igt@kms_big_fb@linear-8bpp-rotate-0:
    - {shard-rkl}:        [SKIP][122] ([i915#3638]) -> [PASS][123] +3 similar issues
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@kms_big_fb@linear-8bpp-rotate-0.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_big_fb@linear-8bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - {shard-rkl}:        [SKIP][124] ([i915#3721]) -> [PASS][125] +2 similar issues
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-90:
    - {shard-rkl}:        [SKIP][126] ([fdo#111614]) -> [PASS][127] +1 similar issue
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-2/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html

  * igt@kms_color@pipe-b-ctm-0-75:
    - shard-skl:          [DMESG-WARN][128] ([i915#1982]) -> [PASS][129] +1 similar issue
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-skl1/igt@kms_color@pipe-b-ctm-0-75.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl4/igt@kms_color@pipe-b-ctm-0-75.html

  * igt@kms_color@pipe-b-ctm-negative:
    - {shard-rkl}:        [SKIP][130] ([i915#1149] / [i915#1849]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@kms_color@pipe-b-ctm-negative.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_color@pipe-b-ctm-negative.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x21-random:
    - {shard-rkl}:        [SKIP][132] ([fdo#112022]) -> [PASS][133] +12 similar issues
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@kms_cursor_crc@pipe-b-cursor-64x21-random.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-64x21-random.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - {shard-rkl}:        [SKIP][134] ([fdo#111825]) -> [PASS][135] +6 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled:
    - {shard-rkl}:        [SKIP][136] ([fdo#111314]) -> [PASS][137] +9 similar issues
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled.html
    - shard-glk:          [FAIL][138] ([i915#1888]) -> [PASS][139]
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-glk7/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-glk6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-skl:          [FAIL][140] ([i915#79]) -> [PASS][141]
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc:
    - {shard-rkl}:        [SKIP][142] ([i915#1849]) -> [PASS][143] +41 similar issues
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10544/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-wc.html
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchw

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20938/index.html

[-- Attachment #2: Type: text/html, Size: 33481 bytes --]

Re: [Intel-gfx] [PATCH v2 0/7] drm/i915/bios: remove vbt ddi_port_info caching

[Jani Nikula]

On Wed, 01 Sep 2021, Jani Nikula <jani.nikula@intel.com> wrote:
> v2 of https://patchwork.freedesktop.org/series/93957/ with the CI issues
> fixed (fingers crossed!).

José, I'd like to get an ack from you on this before applying. I know
it's bound conflict with your in flight series. Thoughts?

BR,
Jani.

>
> BR,
> Jani.
>
> Jani Nikula (7):
>   drm/i915/bios: use hdmi level shift directly from child data
>   drm/i915/bios: use max tmds clock directly from child data
>   drm/i915/bios: use dp max link rate directly from child data
>   drm/i915/bios: use alternate aux channel directly from child data
>   drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize
>   drm/i915/bios: use ddc pin directly from child data
>   drm/i915/bios: get rid of vbt ddi_port_info
>
>  drivers/gpu/drm/i915/display/intel_bios.c | 372 +++++++++++-----------
>  drivers/gpu/drm/i915/i915_drv.h           |  18 +-
>  2 files changed, 187 insertions(+), 203 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 0/7] drm/i915/bios: remove vbt ddi_port_info caching

[Souza, Jose]

On Fri, 2021-09-03 at 14:04 +0300, Jani Nikula wrote:
> On Wed, 01 Sep 2021, Jani Nikula <jani.nikula@intel.com> wrote:
> > v2 of https://patchwork.freedesktop.org/series/93957/ with the CI issues
> > fixed (fingers crossed!).
> 
> José, I'd like to get an ack from you on this before applying. I know
> it's bound conflict with your in flight series. Thoughts?
> 

If you are okay in adding more data at the end of intel_bios_encoder_data we should be fine.
Information from other VBT blocks will need to be added to intel_bios_encoder_data.

It will badly conflict with series but any redundant byte saved is worthy.

> BR,
> Jani.
> 
> > 
> > BR,
> > Jani.
> > 
> > Jani Nikula (7):
> >   drm/i915/bios: use hdmi level shift directly from child data
> >   drm/i915/bios: use max tmds clock directly from child data
> >   drm/i915/bios: use dp max link rate directly from child data
> >   drm/i915/bios: use alternate aux channel directly from child data
> >   drm/i915/bios: move ddc pin mapping code next to ddc pin sanitize
> >   drm/i915/bios: use ddc pin directly from child data
> >   drm/i915/bios: get rid of vbt ddi_port_info
> > 
> >  drivers/gpu/drm/i915/display/intel_bios.c | 372 +++++++++++-----------
> >  drivers/gpu/drm/i915/i915_drv.h           |  18 +-
> >  2 files changed, 187 insertions(+), 203 deletions(-)
> 

Re: [Intel-gfx] [PATCH v2 0/7] drm/i915/bios: remove vbt ddi_port_info caching

[Jani Nikula]

On Fri, 03 Sep 2021, "Souza, Jose" <jose.souza@intel.com> wrote:
> On Fri, 2021-09-03 at 14:04 +0300, Jani Nikula wrote:
>> José, I'd like to get an ack from you on this before applying. I know
>> it's bound conflict with your in flight series. Thoughts?
>
> If you are okay in adding more data at the end of intel_bios_encoder_data we should be fine.
> Information from other VBT blocks will need to be added to intel_bios_encoder_data.
>
> It will badly conflict with series but any redundant byte saved is worthy.

Thanks for the review and ack, pushed.

Moving stuff from drm_i915_private to intel_bios_encoder_data will be a
nice improvement.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Graphics Center