[PATCH 0/4] postinst and clang fixes

[PATCH 0/4] postinst and clang fixes

[Khem Raj]

This pull fixes boost with clang
other fixes are needed for risc-v to enable offline
locale and postint generation, especially after
https://patchwork.openembedded.org/patch/154363/

Now we can boot qemuriscv64 quite fast

The following changes since commit 0d69f86e50e57afe893dade095c1dbd3d05c3b0f:

  libsdl2: Fix left rotated display for RaspPi/VC4/GLES2 (2018-08-29 15:43:18 +0100)

are available in the Git repository at:

  git://git.openembedded.org/openembedded-core-contrib kraj/pu-1
  http://cgit.openembedded.org/openembedded-core-contrib/log/?h=kraj/pu-1

Khem Raj (4):
  boost: Fix invalid const in atomic builtins
  libc-package: Add risc-v specific options to cross-localedef
    invocation
  sysklogd: Use update-alternatives
  glibc-locale: Enable riscv64 and riscv32 in BINARY_LOCALE_ARCHES
    supported architectures

 meta/classes/libc-package.bbclass             |  2 +
 meta/recipes-core/glibc/glibc-locale.inc      |  4 +-
 meta/recipes-extended/sysklogd/sysklogd.inc   |  8 +-
 ...ecific-branch-for-x86-DCAS-based-loa.patch | 76 +++++++++++++++++++
 meta/recipes-support/boost/boost_1.67.0.bb    | 15 ++--
 5 files changed, 95 insertions(+), 10 deletions(-)
 create mode 100644 meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch

-- 
2.18.0

[PATCH 1/4] boost: Fix invalid const in atomic builtins

[Khem Raj]

Fixes build with clang

Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
 ...ecific-branch-for-x86-DCAS-based-loa.patch | 76 +++++++++++++++++++
 meta/recipes-support/boost/boost_1.67.0.bb    | 15 ++--
 2 files changed, 84 insertions(+), 7 deletions(-)
 create mode 100644 meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch

diff --git a/meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch b/meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch
new file mode 100644
index 0000000000..182693079a
--- /dev/null
+++ b/meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch
@@ -0,0 +1,76 @@
+From 39b027171e0a619d49b9dd2e8471d10b6c41bc25 Mon Sep 17 00:00:00 2001
+From: Andrey Semashev <andrey.semashev@gmail.com>
+Date: Tue, 17 Jul 2018 12:37:29 +0300
+Subject: [PATCH] Removed clang-specific branch for x86 DCAS-based loads.
+
+The storage to load from is const-qualified and DCAS via compiler intrinsics
+require an unqualified pointer. Use asm implementation instead, which should be
+as efficient as intrinsics, if not better, in this case.
+
+Fixes https://github.com/boostorg/atomic/issues/15.
+
+Upstream-Status: Backport [https://github.com/boostorg/atomic/commit/6e14ca24dab50ad4c1fa8c27c7dd6f1cb791b534]
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ boost/atomic/detail/ops_gcc_x86_dcas.hpp | 23 ++++++++++++-----------
+ 1 file changed, 12 insertions(+), 11 deletions(-)
+
+diff --git a/boost/atomic/detail/ops_gcc_x86_dcas.hpp b/boost/atomic/detail/ops_gcc_x86_dcas.hpp
+index 4dacc66f..b43ef23a 100644
+--- a/boost/atomic/detail/ops_gcc_x86_dcas.hpp
++++ b/boost/atomic/detail/ops_gcc_x86_dcas.hpp
+@@ -158,11 +158,13 @@ struct gcc_dcas_x86
+         }
+         else
+         {
+-#if defined(__clang__)
+-            // Clang cannot allocate eax:edx register pairs but it has sync intrinsics
+-            value = __sync_val_compare_and_swap(&storage, (storage_type)0, (storage_type)0);
+-#elif defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
++            // Note that despite const qualification cmpxchg8b below may issue a store to the storage. The storage value
++            // will not change, but this prevents the storage to reside in read-only memory.
++
++#if defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
++
+             uint32_t value_bits[2];
++
+             // We don't care for comparison result here; the previous value will be stored into value anyway.
+             // Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b.
+             __asm__ __volatile__
+@@ -175,7 +177,9 @@ struct gcc_dcas_x86
+                 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+             );
+             BOOST_ATOMIC_DETAIL_MEMCPY(&value, value_bits, sizeof(value));
++
+ #else // defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
++
+             // We don't care for comparison result here; the previous value will be stored into value anyway.
+             // Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b.
+             __asm__ __volatile__
+@@ -187,6 +191,7 @@ struct gcc_dcas_x86
+                 : [storage] "m" (storage)
+                 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
+             );
++
+ #endif // defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
+         }
+ 
+@@ -401,15 +406,11 @@ struct gcc_dcas_x86_64
+ 
+     static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order) BOOST_NOEXCEPT
+     {
+-#if defined(__clang__)
++        // Note that despite const qualification cmpxchg16b below may issue a store to the storage. The storage value
++        // will not change, but this prevents the storage to reside in read-only memory.
+ 
+-        // Clang cannot allocate rax:rdx register pairs but it has sync intrinsics
+-        storage_type value = storage_type();
+-        return __sync_val_compare_and_swap(&storage, value, value);
+-
+-#elif defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
++#if defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
+ 
+-        // Some compilers can't allocate rax:rdx register pair either and also don't support 128-bit __sync_val_compare_and_swap
+         uint64_t value_bits[2];
+ 
+         // We don't care for comparison result here; the previous value will be stored into value anyway.
diff --git a/meta/recipes-support/boost/boost_1.67.0.bb b/meta/recipes-support/boost/boost_1.67.0.bb
index 7bb451166c..ef178edc0c 100644
--- a/meta/recipes-support/boost/boost_1.67.0.bb
+++ b/meta/recipes-support/boost/boost_1.67.0.bb
@@ -2,10 +2,11 @@ require boost-${PV}.inc
 require boost.inc
 
 SRC_URI += "\
-    file://arm-intrinsics.patch \
-    file://boost-CVE-2012-2677.patch \
-    file://boost-math-disable-pch-for-gcc.patch \
-    file://0001-Apply-boost-1.62.0-no-forced-flags.patch.patch \
-    file://0003-Don-t-set-up-arch-instruction-set-flags-we-do-that-o.patch \
-    file://0001-make_x86_64_sysv_elf_gas.S-set-.file-section.patch \
-"
+           file://arm-intrinsics.patch \
+           file://boost-CVE-2012-2677.patch \
+           file://boost-math-disable-pch-for-gcc.patch \
+           file://0001-Apply-boost-1.62.0-no-forced-flags.patch.patch \
+           file://0003-Don-t-set-up-arch-instruction-set-flags-we-do-that-o.patch \
+           file://0001-make_x86_64_sysv_elf_gas.S-set-.file-section.patch \
+           file://0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch \
+           "
-- 
2.18.0

[PATCH 2/4] libc-package: Add risc-v specific options to cross-localedef invocation

[Khem Raj]

It was otherwise being deferred until boot time

Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
 meta/classes/libc-package.bbclass | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/meta/classes/libc-package.bbclass b/meta/classes/libc-package.bbclass
index 2e7cd25297..9d09c7be6a 100644
--- a/meta/classes/libc-package.bbclass
+++ b/meta/classes/libc-package.bbclass
@@ -257,6 +257,8 @@ python package_do_split_gconvs () {
                 "mipsisa32r6el":  " --uint32-align=4 --little-endian ", \
                 "mips64el":" --uint32-align=4 --little-endian ", \
                 "mipsisa64r6el":" --uint32-align=4 --little-endian ", \
+                "riscv64": " --uint32-align=4 --little-endian ", \
+                "riscv32": " --uint32-align=4 --little-endian ", \
                 "i586":    " --uint32-align=4 --little-endian ", \
                 "i686":    " --uint32-align=4 --little-endian ", \
                 "x86_64":  " --uint32-align=4 --little-endian "  }
-- 
2.18.0

[PATCH 3/4] sysklogd: Use update-alternatives

[Khem Raj]

busybox also provides klogd and syslogd, this change makes it coexist
peacefully. Currently rootfs fails in situations where both of them are
providing these binaries and busybox postinsts fail

update-alternatives: Error: not linking
/mnt/a/oe/build/tmp/work/qemuriscv64-bec-linux/core-image-full-cmdline/1.0-r0/rootfs/sbin/klogd
to /bin/busybox.nosuid since
/mnt/a/oe/build/tmp/work/qemuriscv64-bec-linux/core-image-full-cmdline/1.0-r0/rootfs/sbin/klogd
exists and is not a link

Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
 meta/recipes-extended/sysklogd/sysklogd.inc | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/meta/recipes-extended/sysklogd/sysklogd.inc b/meta/recipes-extended/sysklogd/sysklogd.inc
index fc4e67c18e..2a8bed00f3 100644
--- a/meta/recipes-extended/sysklogd/sysklogd.inc
+++ b/meta/recipes-extended/sysklogd/sysklogd.inc
@@ -11,7 +11,7 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=8ca43cbc842c2336e835926c2166c28b \
                     file://klogd.c;beginline=2;endline=19;md5=7e87ed0ae6142de079bce738c10c899d \
                    "
 
-inherit update-rc.d systemd
+inherit update-rc.d systemd update-alternatives
 
 SRC_URI = "http://www.infodrom.org/projects/sysklogd/download/sysklogd-${PV}.tar.gz \
            file://no-strip-install.patch \
@@ -70,3 +70,9 @@ python () {
     if not bb.utils.contains('DISTRO_FEATURES', 'sysvinit', True, False, d):
         d.setVar("INHIBIT_UPDATERCD_BBCLASS", "1")
 }
+
+ALTERNATIVE_PRIORITY = "100"
+ALTERNATIVE_${PN} = "klogd syslogd"
+ALTERNATIVE_LINK_NAME[klogd] = "${base_sbindir}/klogd"
+ALTERNATIVE_LINK_NAME[syslogd] = "${base_sbindir}/syslogd"
+
-- 
2.18.0

[PATCH 4/4] glibc-locale: Enable riscv64 and riscv32 in BINARY_LOCALE_ARCHES supported architectures

[Khem Raj]

This support is there using cross-localedef but was not enabled, this
caused the post-install for locales to be emitted which delays the boot
significantly.

emitted postints for locales contain exit 1 which is flagged now and was
causing image generation to fail.

Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
 meta/recipes-core/glibc/glibc-locale.inc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/meta/recipes-core/glibc/glibc-locale.inc b/meta/recipes-core/glibc/glibc-locale.inc
index e50e5cf5e3..1b676dc26e 100644
--- a/meta/recipes-core/glibc/glibc-locale.inc
+++ b/meta/recipes-core/glibc/glibc-locale.inc
@@ -21,13 +21,13 @@ RDEPENDS_localedef += "glibc"
 # to decrease initial boot time and avoid localedef being killed by the OOM
 # killer which used to effectively break i18n on machines with < 128MB RAM.
 
-# default to disabled 
+# default to disabled
 ENABLE_BINARY_LOCALE_GENERATION ?= "0"
 ENABLE_BINARY_LOCALE_GENERATION_pn-nativesdk-glibc-locale = "1"
 
 #enable locale generation on these arches
 # BINARY_LOCALE_ARCHES is a space separated list of regular expressions
-BINARY_LOCALE_ARCHES ?= "arm.* aarch64 i[3-6]86 x86_64 powerpc mips mips64"
+BINARY_LOCALE_ARCHES ?= "arm.* aarch64 i[3-6]86 x86_64 powerpc mips mips64 riscv32 riscv64"
 
 # set "1" to use cross-localedef for locale generation
 # set "0" for qemu emulation of native localedef for locale generation
-- 
2.18.0