* Intrusion sensor problem on Lewisburg C621
@ 2022-07-27 12:28 Georgiy Matyukhin
2022-08-01 16:54 ` Bills, Jason M
0 siblings, 1 reply; 2+ messages in thread
From: Georgiy Matyukhin @ 2022-07-27 12:28 UTC (permalink / raw)
To: openbmc; +Cc: qiang.xu, jason.m.bills
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Hi guys.
I faced a problem with intrusion sensor on a Lewisburg C621 PCH.
In dbus-sensors there is intrusion sensor daemon which intended to work
with Lewisburg PCH, but there is only code to read intruder state (INTRD_DET) and
no any mention about intrusion sensor reset (ChassisIntrusionSensor.cpp).
We are looking for a way to reset INTRD_DET from BMC.
According to the C621 datasheet, this bit must be cleared by writing 1 to it.
But reading the documentation led to the conclusion that one set of registers is
available for reading via SMBUS (table 26-8 of the C621 datasheet),
and for writing - another (table 26-5). Probably the idea of the C621 developers
is that the INTRD_DET bit can both be read and cleared via PCIe, but only read via SMBUS?
If it isn't possibly to reset intruder from intrusion sensor, how it supposed to work in Intel BMC?
Or is there some way to clear this bit over SMBUS?
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* Re: Intrusion sensor problem on Lewisburg C621
2022-07-27 12:28 Intrusion sensor problem on Lewisburg C621 Georgiy Matyukhin
@ 2022-08-01 16:54 ` Bills, Jason M
0 siblings, 0 replies; 2+ messages in thread
From: Bills, Jason M @ 2022-08-01 16:54 UTC (permalink / raw)
To: Georgiy Matyukhin, openbmc
Hi Georgiy,
On 7/27/2022 6:28 AM, Georgiy Matyukhin wrote:
> Hi guys.
> I faced a problem with intrusion sensor on a Lewisburg C621 PCH.
> In dbus-sensors there is intrusion sensor daemon which intended to work
> with Lewisburg PCH, but there is only code to read intruder state
> (INTRD_DET) and
> no any mention about intrusion sensor reset (ChassisIntrusionSensor.cpp).
> We are looking for a way to reset INTRD_DET from BMC.
>
> According to the C621 datasheet, this bit must be cleared by writing 1
> to it.
> But reading the documentation led to the conclusion that one set of
> registers is
> available for reading via SMBUS (table 26-8 of the C621 datasheet),
> and for writing - another (table 26-5). Probably the idea of the C621
> developers
> is that the INTRD_DET bit can both be read and cleared via PCIe, but
> only read via SMBUS?
For details on the behavior of this feature and register in the PCH,
please contact your Intel support representative.
>
> If it isn't possibly to reset intruder from intrusion sensor, how it
> supposed to work in Intel BMC?
> Or is there some way to clear this bit over SMBUS?
I have asked internally, and it sounds like we didn't ever get the PCH
intrusion sensor fully working, so we don't currently support it on any
of our platforms.
Should we remove this code from dbus-sensors, or is there something
useful there even if it doesn't fully work?
>
>
>
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