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* [PATCH] arm64: dts: zynqmp: Add address-cells property to interrupt controllers
@ 2020-12-02 14:14 ` Michal Simek
  0 siblings, 0 replies; 4+ messages in thread
From: Michal Simek @ 2020-12-02 14:14 UTC (permalink / raw)
  To: linux-kernel, monstr, michal.simek, git
  Cc: Andre Przywara, Kalyani Akula, Krzysztof Kozlowski,
	Laurent Pinchart, Manish Narani, Rajan Vaja, Rob Herring,
	devicetree, linux-arm-kernel

The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version
v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC
commit
"81e0919a3e21 checks: Add interrupt provider test"
where reasons for this checking are mentioned as
"A missing #address-cells property is less critical, but creates
ambiguities when used in interrupt-map properties, so warn about this as
well now."

That's why add address-cells property to gic and gpio nodes to get rid of
this warning.

CC: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

I was grepping DTSes in the kernel and most of them list it as 0.
In gicv3 case where its node is added it needs to be filled property that's
why also non 0 values are there.
Definitely please let me know if 0 is not the right value here.

Based on https://lore.kernel.org/r/cover.1606917949.git.michal.simek@xilinx.com/

---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 14a2e69cf98b..5b2051ac6965 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -368,6 +368,7 @@ fpd_dma_chan8: dma@fd570000 {
 
 		gic: interrupt-controller@f9010000 {
 			compatible = "arm,gic-400";
+			#address-cells = <0>;
 			#interrupt-cells = <3>;
 			reg = <0x0 0xf9010000 0x0 0x10000>,
 			      <0x0 0xf9020000 0x0 0x20000>,
@@ -574,6 +575,7 @@ gem3: ethernet@ff0e0000 {
 		gpio: gpio@ff0a0000 {
 			compatible = "xlnx,zynqmp-gpio-1.0";
 			status = "disabled";
+			#address-cells = <0>;
 			#gpio-cells = <0x2>;
 			gpio-controller;
 			interrupt-parent = <&gic>;
-- 
2.29.2


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH] arm64: dts: zynqmp: Add address-cells property to interrupt controllers
@ 2020-12-02 14:14 ` Michal Simek
  0 siblings, 0 replies; 4+ messages in thread
From: Michal Simek @ 2020-12-02 14:14 UTC (permalink / raw)
  To: linux-kernel, monstr, michal.simek, git
  Cc: devicetree, Rajan Vaja, Andre Przywara, Krzysztof Kozlowski,
	Rob Herring, Manish Narani, Laurent Pinchart, Kalyani Akula,
	linux-arm-kernel

The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version
v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC
commit
"81e0919a3e21 checks: Add interrupt provider test"
where reasons for this checking are mentioned as
"A missing #address-cells property is less critical, but creates
ambiguities when used in interrupt-map properties, so warn about this as
well now."

That's why add address-cells property to gic and gpio nodes to get rid of
this warning.

CC: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

I was grepping DTSes in the kernel and most of them list it as 0.
In gicv3 case where its node is added it needs to be filled property that's
why also non 0 values are there.
Definitely please let me know if 0 is not the right value here.

Based on https://lore.kernel.org/r/cover.1606917949.git.michal.simek@xilinx.com/

---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 14a2e69cf98b..5b2051ac6965 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -368,6 +368,7 @@ fpd_dma_chan8: dma@fd570000 {
 
 		gic: interrupt-controller@f9010000 {
 			compatible = "arm,gic-400";
+			#address-cells = <0>;
 			#interrupt-cells = <3>;
 			reg = <0x0 0xf9010000 0x0 0x10000>,
 			      <0x0 0xf9020000 0x0 0x20000>,
@@ -574,6 +575,7 @@ gem3: ethernet@ff0e0000 {
 		gpio: gpio@ff0a0000 {
 			compatible = "xlnx,zynqmp-gpio-1.0";
 			status = "disabled";
+			#address-cells = <0>;
 			#gpio-cells = <0x2>;
 			gpio-controller;
 			interrupt-parent = <&gic>;
-- 
2.29.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] arm64: dts: zynqmp: Add address-cells property to interrupt controllers
  2020-12-02 14:14 ` Michal Simek
@ 2021-01-21 10:17   ` Michal Simek
  -1 siblings, 0 replies; 4+ messages in thread
From: Michal Simek @ 2021-01-21 10:17 UTC (permalink / raw)
  To: LKML, Michal Simek, git
  Cc: Andre Przywara, Kalyani Akula, Krzysztof Kozlowski,
	Laurent Pinchart, Manish Narani, Rajan Vaja, Rob Herring, DTML,
	linux-arm

st 2. 12. 2020 v 15:14 odesílatel Michal Simek <michal.simek@xilinx.com> napsal:
>
> The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version
> v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC
> commit
> "81e0919a3e21 checks: Add interrupt provider test"
> where reasons for this checking are mentioned as
> "A missing #address-cells property is less critical, but creates
> ambiguities when used in interrupt-map properties, so warn about this as
> well now."
>
> That's why add address-cells property to gic and gpio nodes to get rid of
> this warning.
>
> CC: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> I was grepping DTSes in the kernel and most of them list it as 0.
> In gicv3 case where its node is added it needs to be filled property that's
> why also non 0 values are there.
> Definitely please let me know if 0 is not the right value here.
>
> Based on https://lore.kernel.org/r/cover.1606917949.git.michal.simek@xilinx.com/
>
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 14a2e69cf98b..5b2051ac6965 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -368,6 +368,7 @@ fpd_dma_chan8: dma@fd570000 {
>
>                 gic: interrupt-controller@f9010000 {
>                         compatible = "arm,gic-400";
> +                       #address-cells = <0>;
>                         #interrupt-cells = <3>;
>                         reg = <0x0 0xf9010000 0x0 0x10000>,
>                               <0x0 0xf9020000 0x0 0x20000>,
> @@ -574,6 +575,7 @@ gem3: ethernet@ff0e0000 {
>                 gpio: gpio@ff0a0000 {
>                         compatible = "xlnx,zynqmp-gpio-1.0";
>                         status = "disabled";
> +                       #address-cells = <0>;
>                         #gpio-cells = <0x2>;
>                         gpio-controller;
>                         interrupt-parent = <&gic>;
> --
> 2.29.2
>

Applied.
M


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] arm64: dts: zynqmp: Add address-cells property to interrupt controllers
@ 2021-01-21 10:17   ` Michal Simek
  0 siblings, 0 replies; 4+ messages in thread
From: Michal Simek @ 2021-01-21 10:17 UTC (permalink / raw)
  To: LKML, Michal Simek, git
  Cc: DTML, Rajan Vaja, Andre Przywara, Krzysztof Kozlowski,
	Rob Herring, Manish Narani, Laurent Pinchart, Kalyani Akula,
	linux-arm

st 2. 12. 2020 v 15:14 odesílatel Michal Simek <michal.simek@xilinx.com> napsal:
>
> The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version
> v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC
> commit
> "81e0919a3e21 checks: Add interrupt provider test"
> where reasons for this checking are mentioned as
> "A missing #address-cells property is less critical, but creates
> ambiguities when used in interrupt-map properties, so warn about this as
> well now."
>
> That's why add address-cells property to gic and gpio nodes to get rid of
> this warning.
>
> CC: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> I was grepping DTSes in the kernel and most of them list it as 0.
> In gicv3 case where its node is added it needs to be filled property that's
> why also non 0 values are there.
> Definitely please let me know if 0 is not the right value here.
>
> Based on https://lore.kernel.org/r/cover.1606917949.git.michal.simek@xilinx.com/
>
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 14a2e69cf98b..5b2051ac6965 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -368,6 +368,7 @@ fpd_dma_chan8: dma@fd570000 {
>
>                 gic: interrupt-controller@f9010000 {
>                         compatible = "arm,gic-400";
> +                       #address-cells = <0>;
>                         #interrupt-cells = <3>;
>                         reg = <0x0 0xf9010000 0x0 0x10000>,
>                               <0x0 0xf9020000 0x0 0x20000>,
> @@ -574,6 +575,7 @@ gem3: ethernet@ff0e0000 {
>                 gpio: gpio@ff0a0000 {
>                         compatible = "xlnx,zynqmp-gpio-1.0";
>                         status = "disabled";
> +                       #address-cells = <0>;
>                         #gpio-cells = <0x2>;
>                         gpio-controller;
>                         interrupt-parent = <&gic>;
> --
> 2.29.2
>

Applied.
M


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2021-01-21 10:23 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2020-12-02 14:14 [PATCH] arm64: dts: zynqmp: Add address-cells property to interrupt controllers Michal Simek
2020-12-02 14:14 ` Michal Simek
2021-01-21 10:17 ` Michal Simek
2021-01-21 10:17   ` Michal Simek

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