* [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 8:07 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 8:07 UTC (permalink / raw) To: joro-zLv9SwRftAIdnm+yROfE0A, will.deacon-5wv7dgnIgG8, robin.murphy-5wv7dgnIgG8, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA Extract the SID and add the information to context fault log. This is specially useful in a distributed smmu architecture where multiple masters are connected to smmu. SID information helps to quickly identify the faulting master device. Signed-off-by: Vivek Gautam <vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> --- drivers/iommu/arm-smmu-regs.h | 4 ++++ drivers/iommu/arm-smmu.c | 14 ++++++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index a1226e4ab5f8..e5be0344b610 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { #define CBAR_IRPTNDX_SHIFT 24 #define CBAR_IRPTNDX_MASK 0xff +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) +#define CBFRSYNRA_V2_SID_MASK 0xffff +#define CBFRSYNRA_V1_SID_MASK 0x7fff + #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) #define CBA2R_RW64_32BIT (0 << 0) #define CBA2R_RW64_64BIT (1 << 0) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..aa3426dc68d0 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); void __iomem *cb_base; + u32 cbfrsynra; + u16 sid; cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + cbfrsynra = readl_relaxed(gr1_base + + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); + if (smmu->version > ARM_SMMU_V1) + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; + else + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; + dev_err_ratelimited(smmu->dev, - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", - fsr, iova, fsynr, cfg->cbndx); + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d sid = %u\n", + fsr, iova, fsynr, cfg->cbndx, sid); writel(fsr, cb_base + ARM_SMMU_CB_FSR); return IRQ_HANDLED; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 8:07 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 8:07 UTC (permalink / raw) To: joro, will.deacon, robin.murphy, iommu Cc: linux-arm-kernel, linux-arm-msm, linux-kernel, vivek.gautam Extract the SID and add the information to context fault log. This is specially useful in a distributed smmu architecture where multiple masters are connected to smmu. SID information helps to quickly identify the faulting master device. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> --- drivers/iommu/arm-smmu-regs.h | 4 ++++ drivers/iommu/arm-smmu.c | 14 ++++++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index a1226e4ab5f8..e5be0344b610 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { #define CBAR_IRPTNDX_SHIFT 24 #define CBAR_IRPTNDX_MASK 0xff +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) +#define CBFRSYNRA_V2_SID_MASK 0xffff +#define CBFRSYNRA_V1_SID_MASK 0x7fff + #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) #define CBA2R_RW64_32BIT (0 << 0) #define CBA2R_RW64_64BIT (1 << 0) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..aa3426dc68d0 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); void __iomem *cb_base; + u32 cbfrsynra; + u16 sid; cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + cbfrsynra = readl_relaxed(gr1_base + + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); + if (smmu->version > ARM_SMMU_V1) + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; + else + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; + dev_err_ratelimited(smmu->dev, - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", - fsr, iova, fsynr, cfg->cbndx); + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d sid = %u\n", + fsr, iova, fsynr, cfg->cbndx, sid); writel(fsr, cb_base + ARM_SMMU_CB_FSR); return IRQ_HANDLED; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 8:07 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 8:07 UTC (permalink / raw) To: joro, will.deacon, robin.murphy, iommu Cc: linux-arm-kernel, linux-arm-msm, linux-kernel Extract the SID and add the information to context fault log. This is specially useful in a distributed smmu architecture where multiple masters are connected to smmu. SID information helps to quickly identify the faulting master device. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> --- drivers/iommu/arm-smmu-regs.h | 4 ++++ drivers/iommu/arm-smmu.c | 14 ++++++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index a1226e4ab5f8..e5be0344b610 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { #define CBAR_IRPTNDX_SHIFT 24 #define CBAR_IRPTNDX_MASK 0xff +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) +#define CBFRSYNRA_V2_SID_MASK 0xffff +#define CBFRSYNRA_V1_SID_MASK 0x7fff + #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) #define CBA2R_RW64_32BIT (0 << 0) #define CBA2R_RW64_64BIT (1 << 0) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..aa3426dc68d0 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); void __iomem *cb_base; + u32 cbfrsynra; + u16 sid; cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + cbfrsynra = readl_relaxed(gr1_base + + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); + if (smmu->version > ARM_SMMU_V1) + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; + else + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; + dev_err_ratelimited(smmu->dev, - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", - fsr, iova, fsynr, cfg->cbndx); + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d sid = %u\n", + fsr, iova, fsynr, cfg->cbndx, sid); writel(fsr, cb_base + ARM_SMMU_CB_FSR); return IRQ_HANDLED; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 8:07 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 8:07 UTC (permalink / raw) To: joro, will.deacon, robin.murphy, iommu Cc: vivek.gautam, linux-kernel, linux-arm-kernel, linux-arm-msm Extract the SID and add the information to context fault log. This is specially useful in a distributed smmu architecture where multiple masters are connected to smmu. SID information helps to quickly identify the faulting master device. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> --- drivers/iommu/arm-smmu-regs.h | 4 ++++ drivers/iommu/arm-smmu.c | 14 ++++++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index a1226e4ab5f8..e5be0344b610 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { #define CBAR_IRPTNDX_SHIFT 24 #define CBAR_IRPTNDX_MASK 0xff +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) +#define CBFRSYNRA_V2_SID_MASK 0xffff +#define CBFRSYNRA_V1_SID_MASK 0x7fff + #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) #define CBA2R_RW64_32BIT (0 << 0) #define CBA2R_RW64_64BIT (1 << 0) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..aa3426dc68d0 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); void __iomem *cb_base; + u32 cbfrsynra; + u16 sid; cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + cbfrsynra = readl_relaxed(gr1_base + + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); + if (smmu->version > ARM_SMMU_V1) + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; + else + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; + dev_err_ratelimited(smmu->dev, - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", - fsr, iova, fsynr, cfg->cbndx); + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d sid = %u\n", + fsr, iova, fsynr, cfg->cbndx, sid); writel(fsr, cb_base + ARM_SMMU_CB_FSR); return IRQ_HANDLED; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log 2019-04-15 8:07 ` Vivek Gautam @ 2019-04-15 8:54 ` Marc Gonzalez -1 siblings, 0 replies; 27+ messages in thread From: Marc Gonzalez @ 2019-04-15 8:54 UTC (permalink / raw) To: Vivek Gautam; +Cc: MSM, Linux ARM Trimming CC list for very minor suggestions (feel free to ignore). On 15/04/2019 10:07, Vivek Gautam wrote: > Extract the SID and add the information to context fault log. > This is specially useful in a distributed smmu architecture > where multiple masters are connected to smmu. SID information > helps to quickly identify the faulting master device. I find it slightly clearer to keep acronyms capitalized, such as SMMU. > @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > + u16 sid; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); I find it slightly clearer to write void __iomem *reg; ... reg = ARM_SMMU_GR1(smmu) + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx); cbfrsynra = readl_relaxed(reg); Regards. ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 8:54 ` Marc Gonzalez 0 siblings, 0 replies; 27+ messages in thread From: Marc Gonzalez @ 2019-04-15 8:54 UTC (permalink / raw) To: Vivek Gautam; +Cc: MSM, Linux ARM Trimming CC list for very minor suggestions (feel free to ignore). On 15/04/2019 10:07, Vivek Gautam wrote: > Extract the SID and add the information to context fault log. > This is specially useful in a distributed smmu architecture > where multiple masters are connected to smmu. SID information > helps to quickly identify the faulting master device. I find it slightly clearer to keep acronyms capitalized, such as SMMU. > @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > + u16 sid; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); I find it slightly clearer to write void __iomem *reg; ... reg = ARM_SMMU_GR1(smmu) + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx); cbfrsynra = readl_relaxed(reg); Regards. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log 2019-04-15 8:54 ` Marc Gonzalez @ 2019-04-15 12:04 ` Vivek Gautam -1 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 12:04 UTC (permalink / raw) To: Marc Gonzalez; +Cc: MSM, Linux ARM Hi Marc, On 4/15/2019 2:24 PM, Marc Gonzalez wrote: > Trimming CC list for very minor suggestions (feel free to ignore) Thanks for the review. Please find my responses inline below. > > On 15/04/2019 10:07, Vivek Gautam wrote: > >> Extract the SID and add the information to context fault log. >> This is specially useful in a distributed smmu architecture >> where multiple masters are connected to smmu. SID information >> helps to quickly identify the faulting master device. > I find it slightly clearer to keep acronyms capitalized, such as SMMU. Sure, will change it. > > >> @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) >> struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); >> struct arm_smmu_cfg *cfg = &smmu_domain->cfg; >> struct arm_smmu_device *smmu = smmu_domain->smmu; >> + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); >> void __iomem *cb_base; >> + u32 cbfrsynra; >> + u16 sid; >> >> cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); >> fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); >> @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) >> fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); >> iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); >> >> + cbfrsynra = readl_relaxed(gr1_base + >> + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > I find it slightly clearer to write > > void __iomem *reg; > ... > reg = ARM_SMMU_GR1(smmu) + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx); > cbfrsynra = readl_relaxed(reg); I would actually argue here, to go with the flow of how this function declares the variables, for the simple case of symmetry. Let me know what do you think. Thanks & regards Vivek > > Regards. ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 12:04 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 12:04 UTC (permalink / raw) To: Marc Gonzalez; +Cc: MSM, Linux ARM Hi Marc, On 4/15/2019 2:24 PM, Marc Gonzalez wrote: > Trimming CC list for very minor suggestions (feel free to ignore) Thanks for the review. Please find my responses inline below. > > On 15/04/2019 10:07, Vivek Gautam wrote: > >> Extract the SID and add the information to context fault log. >> This is specially useful in a distributed smmu architecture >> where multiple masters are connected to smmu. SID information >> helps to quickly identify the faulting master device. > I find it slightly clearer to keep acronyms capitalized, such as SMMU. Sure, will change it. > > >> @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) >> struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); >> struct arm_smmu_cfg *cfg = &smmu_domain->cfg; >> struct arm_smmu_device *smmu = smmu_domain->smmu; >> + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); >> void __iomem *cb_base; >> + u32 cbfrsynra; >> + u16 sid; >> >> cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); >> fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); >> @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) >> fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); >> iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); >> >> + cbfrsynra = readl_relaxed(gr1_base + >> + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > I find it slightly clearer to write > > void __iomem *reg; > ... > reg = ARM_SMMU_GR1(smmu) + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx); > cbfrsynra = readl_relaxed(reg); I would actually argue here, to go with the flow of how this function declares the variables, for the simple case of symmetry. Let me know what do you think. Thanks & regards Vivek > > Regards. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 27+ messages in thread
[parent not found: <20190415080734.6843-1-vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>]
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 9:41 ` Robin Murphy 0 siblings, 0 replies; 27+ messages in thread From: Robin Murphy @ 2019-04-15 9:41 UTC (permalink / raw) To: Vivek Gautam, joro-zLv9SwRftAIdnm+yROfE0A, will.deacon-5wv7dgnIgG8, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r On 15/04/2019 09:07, Vivek Gautam wrote: > Extract the SID and add the information to context fault log. > This is specially useful in a distributed smmu architecture > where multiple masters are connected to smmu. SID information > helps to quickly identify the faulting master device. Hmm, given how it's UNKNOWN for translation faults, which are arguably the most likely context fault, I reckon it probably makes more sense to just dump the raw register value for the user to interpret, as we do for fsr/fsynr. Robin. > Signed-off-by: Vivek Gautam <vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> > --- > drivers/iommu/arm-smmu-regs.h | 4 ++++ > drivers/iommu/arm-smmu.c | 14 ++++++++++++-- > 2 files changed, 16 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > index a1226e4ab5f8..e5be0344b610 100644 > --- a/drivers/iommu/arm-smmu-regs.h > +++ b/drivers/iommu/arm-smmu-regs.h > @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { > #define CBAR_IRPTNDX_SHIFT 24 > #define CBAR_IRPTNDX_MASK 0xff > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > +#define CBFRSYNRA_V2_SID_MASK 0xffff > +#define CBFRSYNRA_V1_SID_MASK 0x7fff > + > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > #define CBA2R_RW64_32BIT (0 << 0) > #define CBA2R_RW64_64BIT (1 << 0) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 045d93884164..aa3426dc68d0 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > + u16 sid; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > + if (smmu->version > ARM_SMMU_V1) > + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; > + else > + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; > + > dev_err_ratelimited(smmu->dev, > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > - fsr, iova, fsynr, cfg->cbndx); > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d sid = %u\n", > + fsr, iova, fsynr, cfg->cbndx, sid); > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > return IRQ_HANDLED; > ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 9:41 ` Robin Murphy 0 siblings, 0 replies; 27+ messages in thread From: Robin Murphy @ 2019-04-15 9:41 UTC (permalink / raw) To: Vivek Gautam, joro, will.deacon, iommu Cc: linux-arm-msm, linux-kernel, linux-arm-kernel On 15/04/2019 09:07, Vivek Gautam wrote: > Extract the SID and add the information to context fault log. > This is specially useful in a distributed smmu architecture > where multiple masters are connected to smmu. SID information > helps to quickly identify the faulting master device. Hmm, given how it's UNKNOWN for translation faults, which are arguably the most likely context fault, I reckon it probably makes more sense to just dump the raw register value for the user to interpret, as we do for fsr/fsynr. Robin. > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > --- > drivers/iommu/arm-smmu-regs.h | 4 ++++ > drivers/iommu/arm-smmu.c | 14 ++++++++++++-- > 2 files changed, 16 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > index a1226e4ab5f8..e5be0344b610 100644 > --- a/drivers/iommu/arm-smmu-regs.h > +++ b/drivers/iommu/arm-smmu-regs.h > @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { > #define CBAR_IRPTNDX_SHIFT 24 > #define CBAR_IRPTNDX_MASK 0xff > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > +#define CBFRSYNRA_V2_SID_MASK 0xffff > +#define CBFRSYNRA_V1_SID_MASK 0x7fff > + > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > #define CBA2R_RW64_32BIT (0 << 0) > #define CBA2R_RW64_64BIT (1 << 0) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 045d93884164..aa3426dc68d0 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > + u16 sid; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > + if (smmu->version > ARM_SMMU_V1) > + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; > + else > + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; > + > dev_err_ratelimited(smmu->dev, > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > - fsr, iova, fsynr, cfg->cbndx); > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d sid = %u\n", > + fsr, iova, fsynr, cfg->cbndx, sid); > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > return IRQ_HANDLED; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 9:41 ` Robin Murphy 0 siblings, 0 replies; 27+ messages in thread From: Robin Murphy @ 2019-04-15 9:41 UTC (permalink / raw) To: Vivek Gautam, joro, will.deacon, iommu Cc: linux-arm-msm, linux-kernel, linux-arm-kernel On 15/04/2019 09:07, Vivek Gautam wrote: > Extract the SID and add the information to context fault log. > This is specially useful in a distributed smmu architecture > where multiple masters are connected to smmu. SID information > helps to quickly identify the faulting master device. Hmm, given how it's UNKNOWN for translation faults, which are arguably the most likely context fault, I reckon it probably makes more sense to just dump the raw register value for the user to interpret, as we do for fsr/fsynr. Robin. > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > --- > drivers/iommu/arm-smmu-regs.h | 4 ++++ > drivers/iommu/arm-smmu.c | 14 ++++++++++++-- > 2 files changed, 16 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > index a1226e4ab5f8..e5be0344b610 100644 > --- a/drivers/iommu/arm-smmu-regs.h > +++ b/drivers/iommu/arm-smmu-regs.h > @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { > #define CBAR_IRPTNDX_SHIFT 24 > #define CBAR_IRPTNDX_MASK 0xff > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > +#define CBFRSYNRA_V2_SID_MASK 0xffff > +#define CBFRSYNRA_V1_SID_MASK 0x7fff > + > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > #define CBA2R_RW64_32BIT (0 << 0) > #define CBA2R_RW64_64BIT (1 << 0) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 045d93884164..aa3426dc68d0 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > + u16 sid; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > + if (smmu->version > ARM_SMMU_V1) > + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; > + else > + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; > + > dev_err_ratelimited(smmu->dev, > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > - fsr, iova, fsynr, cfg->cbndx); > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d sid = %u\n", > + fsr, iova, fsynr, cfg->cbndx, sid); > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > return IRQ_HANDLED; > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 9:41 ` Robin Murphy 0 siblings, 0 replies; 27+ messages in thread From: Robin Murphy @ 2019-04-15 9:41 UTC (permalink / raw) To: Vivek Gautam, joro, will.deacon, iommu Cc: linux-kernel, linux-arm-kernel, linux-arm-msm On 15/04/2019 09:07, Vivek Gautam wrote: > Extract the SID and add the information to context fault log. > This is specially useful in a distributed smmu architecture > where multiple masters are connected to smmu. SID information > helps to quickly identify the faulting master device. Hmm, given how it's UNKNOWN for translation faults, which are arguably the most likely context fault, I reckon it probably makes more sense to just dump the raw register value for the user to interpret, as we do for fsr/fsynr. Robin. > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > --- > drivers/iommu/arm-smmu-regs.h | 4 ++++ > drivers/iommu/arm-smmu.c | 14 ++++++++++++-- > 2 files changed, 16 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > index a1226e4ab5f8..e5be0344b610 100644 > --- a/drivers/iommu/arm-smmu-regs.h > +++ b/drivers/iommu/arm-smmu-regs.h > @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { > #define CBAR_IRPTNDX_SHIFT 24 > #define CBAR_IRPTNDX_MASK 0xff > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > +#define CBFRSYNRA_V2_SID_MASK 0xffff > +#define CBFRSYNRA_V1_SID_MASK 0x7fff > + > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > #define CBA2R_RW64_32BIT (0 << 0) > #define CBA2R_RW64_64BIT (1 << 0) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 045d93884164..aa3426dc68d0 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > + u16 sid; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > + if (smmu->version > ARM_SMMU_V1) > + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; > + else > + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; > + > dev_err_ratelimited(smmu->dev, > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > - fsr, iova, fsynr, cfg->cbndx); > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d sid = %u\n", > + fsr, iova, fsynr, cfg->cbndx, sid); > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > return IRQ_HANDLED; > ^ permalink raw reply [flat|nested] 27+ messages in thread
[parent not found: <e5945adb-a1a3-1743-e671-39707276fad6-5wv7dgnIgG8@public.gmane.org>]
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 12:05 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 12:05 UTC (permalink / raw) To: Robin Murphy, joro-zLv9SwRftAIdnm+yROfE0A, will.deacon-5wv7dgnIgG8, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r On 4/15/2019 3:11 PM, Robin Murphy wrote: > On 15/04/2019 09:07, Vivek Gautam wrote: >> Extract the SID and add the information to context fault log. >> This is specially useful in a distributed smmu architecture >> where multiple masters are connected to smmu. SID information >> helps to quickly identify the faulting master device. > > Hmm, given how it's UNKNOWN for translation faults, which are arguably > the most likely context fault, I reckon it probably makes more sense > to just dump the raw register value for the user to interpret, as we > do for fsr/fsynr. Thanks Robin. Sure will update it to dump the raw register value. Regards Vivek > > Robin. > >> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> >> --- >> drivers/iommu/arm-smmu-regs.h | 4 ++++ >> drivers/iommu/arm-smmu.c | 14 ++++++++++++-- >> 2 files changed, 16 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/iommu/arm-smmu-regs.h >> b/drivers/iommu/arm-smmu-regs.h >> index a1226e4ab5f8..e5be0344b610 100644 >> --- a/drivers/iommu/arm-smmu-regs.h >> +++ b/drivers/iommu/arm-smmu-regs.h >> @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { >> #define CBAR_IRPTNDX_SHIFT 24 >> #define CBAR_IRPTNDX_MASK 0xff >> +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) >> +#define CBFRSYNRA_V2_SID_MASK 0xffff >> +#define CBFRSYNRA_V1_SID_MASK 0x7fff >> + >> #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) >> #define CBA2R_RW64_32BIT (0 << 0) >> #define CBA2R_RW64_64BIT (1 << 0) >> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >> index 045d93884164..aa3426dc68d0 100644 >> --- a/drivers/iommu/arm-smmu.c >> +++ b/drivers/iommu/arm-smmu.c >> @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int >> irq, void *dev) >> struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); >> struct arm_smmu_cfg *cfg = &smmu_domain->cfg; >> struct arm_smmu_device *smmu = smmu_domain->smmu; >> + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); >> void __iomem *cb_base; >> + u32 cbfrsynra; >> + u16 sid; >> cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); >> fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); >> @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int >> irq, void *dev) >> fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); >> iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); >> + cbfrsynra = readl_relaxed(gr1_base + >> + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); >> + if (smmu->version > ARM_SMMU_V1) >> + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; >> + else >> + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; >> + >> dev_err_ratelimited(smmu->dev, >> - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, >> cb=%d\n", >> - fsr, iova, fsynr, cfg->cbndx); >> + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, >> cb=%d sid = %u\n", >> + fsr, iova, fsynr, cfg->cbndx, sid); >> writel(fsr, cb_base + ARM_SMMU_CB_FSR); >> return IRQ_HANDLED; >> _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 12:05 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 12:05 UTC (permalink / raw) To: Robin Murphy, joro, will.deacon, iommu Cc: linux-arm-msm, linux-kernel, linux-arm-kernel On 4/15/2019 3:11 PM, Robin Murphy wrote: > On 15/04/2019 09:07, Vivek Gautam wrote: >> Extract the SID and add the information to context fault log. >> This is specially useful in a distributed smmu architecture >> where multiple masters are connected to smmu. SID information >> helps to quickly identify the faulting master device. > > Hmm, given how it's UNKNOWN for translation faults, which are arguably > the most likely context fault, I reckon it probably makes more sense > to just dump the raw register value for the user to interpret, as we > do for fsr/fsynr. Thanks Robin. Sure will update it to dump the raw register value. Regards Vivek > > Robin. > >> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> >> --- >> drivers/iommu/arm-smmu-regs.h | 4 ++++ >> drivers/iommu/arm-smmu.c | 14 ++++++++++++-- >> 2 files changed, 16 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/iommu/arm-smmu-regs.h >> b/drivers/iommu/arm-smmu-regs.h >> index a1226e4ab5f8..e5be0344b610 100644 >> --- a/drivers/iommu/arm-smmu-regs.h >> +++ b/drivers/iommu/arm-smmu-regs.h >> @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { >> #define CBAR_IRPTNDX_SHIFT 24 >> #define CBAR_IRPTNDX_MASK 0xff >> +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) >> +#define CBFRSYNRA_V2_SID_MASK 0xffff >> +#define CBFRSYNRA_V1_SID_MASK 0x7fff >> + >> #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) >> #define CBA2R_RW64_32BIT (0 << 0) >> #define CBA2R_RW64_64BIT (1 << 0) >> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >> index 045d93884164..aa3426dc68d0 100644 >> --- a/drivers/iommu/arm-smmu.c >> +++ b/drivers/iommu/arm-smmu.c >> @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int >> irq, void *dev) >> struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); >> struct arm_smmu_cfg *cfg = &smmu_domain->cfg; >> struct arm_smmu_device *smmu = smmu_domain->smmu; >> + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); >> void __iomem *cb_base; >> + u32 cbfrsynra; >> + u16 sid; >> cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); >> fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); >> @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int >> irq, void *dev) >> fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); >> iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); >> + cbfrsynra = readl_relaxed(gr1_base + >> + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); >> + if (smmu->version > ARM_SMMU_V1) >> + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; >> + else >> + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; >> + >> dev_err_ratelimited(smmu->dev, >> - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, >> cb=%d\n", >> - fsr, iova, fsynr, cfg->cbndx); >> + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, >> cb=%d sid = %u\n", >> + fsr, iova, fsynr, cfg->cbndx, sid); >> writel(fsr, cb_base + ARM_SMMU_CB_FSR); >> return IRQ_HANDLED; >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 12:05 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 12:05 UTC (permalink / raw) To: Robin Murphy, joro, will.deacon, iommu Cc: linux-arm-msm, linux-kernel, linux-arm-kernel On 4/15/2019 3:11 PM, Robin Murphy wrote: > On 15/04/2019 09:07, Vivek Gautam wrote: >> Extract the SID and add the information to context fault log. >> This is specially useful in a distributed smmu architecture >> where multiple masters are connected to smmu. SID information >> helps to quickly identify the faulting master device. > > Hmm, given how it's UNKNOWN for translation faults, which are arguably > the most likely context fault, I reckon it probably makes more sense > to just dump the raw register value for the user to interpret, as we > do for fsr/fsynr. Thanks Robin. Sure will update it to dump the raw register value. Regards Vivek > > Robin. > >> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> >> --- >> drivers/iommu/arm-smmu-regs.h | 4 ++++ >> drivers/iommu/arm-smmu.c | 14 ++++++++++++-- >> 2 files changed, 16 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/iommu/arm-smmu-regs.h >> b/drivers/iommu/arm-smmu-regs.h >> index a1226e4ab5f8..e5be0344b610 100644 >> --- a/drivers/iommu/arm-smmu-regs.h >> +++ b/drivers/iommu/arm-smmu-regs.h >> @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { >> #define CBAR_IRPTNDX_SHIFT 24 >> #define CBAR_IRPTNDX_MASK 0xff >> +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) >> +#define CBFRSYNRA_V2_SID_MASK 0xffff >> +#define CBFRSYNRA_V1_SID_MASK 0x7fff >> + >> #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) >> #define CBA2R_RW64_32BIT (0 << 0) >> #define CBA2R_RW64_64BIT (1 << 0) >> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >> index 045d93884164..aa3426dc68d0 100644 >> --- a/drivers/iommu/arm-smmu.c >> +++ b/drivers/iommu/arm-smmu.c >> @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int >> irq, void *dev) >> struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); >> struct arm_smmu_cfg *cfg = &smmu_domain->cfg; >> struct arm_smmu_device *smmu = smmu_domain->smmu; >> + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); >> void __iomem *cb_base; >> + u32 cbfrsynra; >> + u16 sid; >> cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); >> fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); >> @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int >> irq, void *dev) >> fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); >> iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); >> + cbfrsynra = readl_relaxed(gr1_base + >> + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); >> + if (smmu->version > ARM_SMMU_V1) >> + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; >> + else >> + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; >> + >> dev_err_ratelimited(smmu->dev, >> - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, >> cb=%d\n", >> - fsr, iova, fsynr, cfg->cbndx); >> + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, >> cb=%d sid = %u\n", >> + fsr, iova, fsynr, cfg->cbndx, sid); >> writel(fsr, cb_base + ARM_SMMU_CB_FSR); >> return IRQ_HANDLED; >> _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log @ 2019-04-15 12:05 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 12:05 UTC (permalink / raw) To: Robin Murphy, joro, will.deacon, iommu Cc: linux-kernel, linux-arm-kernel, linux-arm-msm On 4/15/2019 3:11 PM, Robin Murphy wrote: > On 15/04/2019 09:07, Vivek Gautam wrote: >> Extract the SID and add the information to context fault log. >> This is specially useful in a distributed smmu architecture >> where multiple masters are connected to smmu. SID information >> helps to quickly identify the faulting master device. > > Hmm, given how it's UNKNOWN for translation faults, which are arguably > the most likely context fault, I reckon it probably makes more sense > to just dump the raw register value for the user to interpret, as we > do for fsr/fsynr. Thanks Robin. Sure will update it to dump the raw register value. Regards Vivek > > Robin. > >> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> >> --- >> drivers/iommu/arm-smmu-regs.h | 4 ++++ >> drivers/iommu/arm-smmu.c | 14 ++++++++++++-- >> 2 files changed, 16 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/iommu/arm-smmu-regs.h >> b/drivers/iommu/arm-smmu-regs.h >> index a1226e4ab5f8..e5be0344b610 100644 >> --- a/drivers/iommu/arm-smmu-regs.h >> +++ b/drivers/iommu/arm-smmu-regs.h >> @@ -147,6 +147,10 @@ enum arm_smmu_s2cr_privcfg { >> #define CBAR_IRPTNDX_SHIFT 24 >> #define CBAR_IRPTNDX_MASK 0xff >> +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) >> +#define CBFRSYNRA_V2_SID_MASK 0xffff >> +#define CBFRSYNRA_V1_SID_MASK 0x7fff >> + >> #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) >> #define CBA2R_RW64_32BIT (0 << 0) >> #define CBA2R_RW64_64BIT (1 << 0) >> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c >> index 045d93884164..aa3426dc68d0 100644 >> --- a/drivers/iommu/arm-smmu.c >> +++ b/drivers/iommu/arm-smmu.c >> @@ -575,7 +575,10 @@ static irqreturn_t arm_smmu_context_fault(int >> irq, void *dev) >> struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); >> struct arm_smmu_cfg *cfg = &smmu_domain->cfg; >> struct arm_smmu_device *smmu = smmu_domain->smmu; >> + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); >> void __iomem *cb_base; >> + u32 cbfrsynra; >> + u16 sid; >> cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); >> fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); >> @@ -586,9 +589,16 @@ static irqreturn_t arm_smmu_context_fault(int >> irq, void *dev) >> fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); >> iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); >> + cbfrsynra = readl_relaxed(gr1_base + >> + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); >> + if (smmu->version > ARM_SMMU_V1) >> + sid = cbfrsynra & CBFRSYNRA_V2_SID_MASK; >> + else >> + sid = cbfrsynra & CBFRSYNRA_V1_SID_MASK; >> + >> dev_err_ratelimited(smmu->dev, >> - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, >> cb=%d\n", >> - fsr, iova, fsynr, cfg->cbndx); >> + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, >> cb=%d sid = %u\n", >> + fsr, iova, fsynr, cfg->cbndx, sid); >> writel(fsr, cb_base + ARM_SMMU_CB_FSR); >> return IRQ_HANDLED; >> ^ permalink raw reply [flat|nested] 27+ messages in thread
[parent not found: <4cfc7b3b-bc74-6b37-19f5-40b6394fa762-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>]
* [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-15 17:37 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 17:37 UTC (permalink / raw) To: joro-zLv9SwRftAIdnm+yROfE0A, will.deacon-5wv7dgnIgG8, robin.murphy-5wv7dgnIgG8, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA Bits[15:0] in CBFRSYNRA register contain information about StreamID of the incoming transaction that generated the fault. Dump CBFRSYNRA register to get this info. This is specially useful in a distributed SMMU architecture where multiple masters are connected to the SMMU. SID information helps to quickly identify the faulting master device. Signed-off-by: Vivek Gautam <vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> --- V1 of the patch available @ https://lore.kernel.org/patchwork/patch/1061615/ Changes from v1: - Dump the raw register value of CBFRSYNRA register in the context fault log rather than extracting the SID inforamtion and dumping that. drivers/iommu/arm-smmu-regs.h | 2 ++ drivers/iommu/arm-smmu.c | 8 ++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index a1226e4ab5f8..e9132a926761 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { #define CBAR_IRPTNDX_SHIFT 24 #define CBAR_IRPTNDX_MASK 0xff +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) + #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) #define CBA2R_RW64_32BIT (0 << 0) #define CBA2R_RW64_64BIT (1 << 0) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..a4773e8c6b0e 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); void __iomem *cb_base; + u32 cbfrsynra; cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + cbfrsynra = readl_relaxed(gr1_base + + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); dev_err_ratelimited(smmu->dev, - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", - fsr, iova, fsynr, cfg->cbndx); + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); writel(fsr, cb_base + ARM_SMMU_CB_FSR); return IRQ_HANDLED; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-15 17:37 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 17:37 UTC (permalink / raw) To: joro, will.deacon, robin.murphy, iommu Cc: linux-arm-kernel, linux-arm-msm, linux-kernel, vivek.gautam Bits[15:0] in CBFRSYNRA register contain information about StreamID of the incoming transaction that generated the fault. Dump CBFRSYNRA register to get this info. This is specially useful in a distributed SMMU architecture where multiple masters are connected to the SMMU. SID information helps to quickly identify the faulting master device. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> --- V1 of the patch available @ https://lore.kernel.org/patchwork/patch/1061615/ Changes from v1: - Dump the raw register value of CBFRSYNRA register in the context fault log rather than extracting the SID inforamtion and dumping that. drivers/iommu/arm-smmu-regs.h | 2 ++ drivers/iommu/arm-smmu.c | 8 ++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index a1226e4ab5f8..e9132a926761 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { #define CBAR_IRPTNDX_SHIFT 24 #define CBAR_IRPTNDX_MASK 0xff +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) + #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) #define CBA2R_RW64_32BIT (0 << 0) #define CBA2R_RW64_64BIT (1 << 0) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..a4773e8c6b0e 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); void __iomem *cb_base; + u32 cbfrsynra; cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + cbfrsynra = readl_relaxed(gr1_base + + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); dev_err_ratelimited(smmu->dev, - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", - fsr, iova, fsynr, cfg->cbndx); + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); writel(fsr, cb_base + ARM_SMMU_CB_FSR); return IRQ_HANDLED; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-15 17:37 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 17:37 UTC (permalink / raw) To: joro, will.deacon, robin.murphy, iommu Cc: linux-arm-kernel, linux-arm-msm, linux-kernel Bits[15:0] in CBFRSYNRA register contain information about StreamID of the incoming transaction that generated the fault. Dump CBFRSYNRA register to get this info. This is specially useful in a distributed SMMU architecture where multiple masters are connected to the SMMU. SID information helps to quickly identify the faulting master device. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> --- V1 of the patch available @ https://lore.kernel.org/patchwork/patch/1061615/ Changes from v1: - Dump the raw register value of CBFRSYNRA register in the context fault log rather than extracting the SID inforamtion and dumping that. drivers/iommu/arm-smmu-regs.h | 2 ++ drivers/iommu/arm-smmu.c | 8 ++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index a1226e4ab5f8..e9132a926761 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { #define CBAR_IRPTNDX_SHIFT 24 #define CBAR_IRPTNDX_MASK 0xff +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) + #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) #define CBA2R_RW64_32BIT (0 << 0) #define CBA2R_RW64_64BIT (1 << 0) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..a4773e8c6b0e 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); void __iomem *cb_base; + u32 cbfrsynra; cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + cbfrsynra = readl_relaxed(gr1_base + + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); dev_err_ratelimited(smmu->dev, - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", - fsr, iova, fsynr, cfg->cbndx); + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); writel(fsr, cb_base + ARM_SMMU_CB_FSR); return IRQ_HANDLED; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-15 17:37 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-15 17:37 UTC (permalink / raw) To: joro, will.deacon, robin.murphy, iommu Cc: vivek.gautam, linux-kernel, linux-arm-kernel, linux-arm-msm Bits[15:0] in CBFRSYNRA register contain information about StreamID of the incoming transaction that generated the fault. Dump CBFRSYNRA register to get this info. This is specially useful in a distributed SMMU architecture where multiple masters are connected to the SMMU. SID information helps to quickly identify the faulting master device. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> --- V1 of the patch available @ https://lore.kernel.org/patchwork/patch/1061615/ Changes from v1: - Dump the raw register value of CBFRSYNRA register in the context fault log rather than extracting the SID inforamtion and dumping that. drivers/iommu/arm-smmu-regs.h | 2 ++ drivers/iommu/arm-smmu.c | 8 ++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h index a1226e4ab5f8..e9132a926761 100644 --- a/drivers/iommu/arm-smmu-regs.h +++ b/drivers/iommu/arm-smmu-regs.h @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { #define CBAR_IRPTNDX_SHIFT 24 #define CBAR_IRPTNDX_MASK 0xff +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) + #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) #define CBA2R_RW64_32BIT (0 << 0) #define CBA2R_RW64_64BIT (1 << 0) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 045d93884164..a4773e8c6b0e 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu = smmu_domain->smmu; + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); void __iomem *cb_base; + u32 cbfrsynra; cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); + cbfrsynra = readl_relaxed(gr1_base + + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); dev_err_ratelimited(smmu->dev, - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", - fsr, iova, fsynr, cfg->cbndx); + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); writel(fsr, cb_base + ARM_SMMU_CB_FSR); return IRQ_HANDLED; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-19 0:24 ` Bjorn Andersson 0 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2019-04-19 0:24 UTC (permalink / raw) To: Vivek Gautam Cc: joro, will.deacon, robin.murphy, iommu, linux-kernel, linux-arm-kernel, linux-arm-msm On Mon 15 Apr 10:37 PDT 2019, Vivek Gautam wrote: > Bits[15:0] in CBFRSYNRA register contain information about > StreamID of the incoming transaction that generated the > fault. Dump CBFRSYNRA register to get this info. > This is specially useful in a distributed SMMU architecture > where multiple masters are connected to the SMMU. > SID information helps to quickly identify the faulting > master device. > > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > --- > > V1 of the patch available @ > https://lore.kernel.org/patchwork/patch/1061615/ > > Changes from v1: > - Dump the raw register value of CBFRSYNRA register in the > context fault log rather than extracting the SID inforamtion > and dumping that. > > drivers/iommu/arm-smmu-regs.h | 2 ++ > drivers/iommu/arm-smmu.c | 8 ++++++-- > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > index a1226e4ab5f8..e9132a926761 100644 > --- a/drivers/iommu/arm-smmu-regs.h > +++ b/drivers/iommu/arm-smmu-regs.h > @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { > #define CBAR_IRPTNDX_SHIFT 24 > #define CBAR_IRPTNDX_MASK 0xff > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > + > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > #define CBA2R_RW64_32BIT (0 << 0) > #define CBA2R_RW64_64BIT (1 << 0) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 045d93884164..a4773e8c6b0e 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); The 80 char limit is more like a guideline anyways...please don't wrap this. > > dev_err_ratelimited(smmu->dev, > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > - fsr, iova, fsynr, cfg->cbndx); > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", Drop the spaces around '='. With those addressed, you have my Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > return IRQ_HANDLED; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation > ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-19 0:24 ` Bjorn Andersson 0 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2019-04-19 0:24 UTC (permalink / raw) To: Vivek Gautam Cc: linux-arm-msm, joro, will.deacon, linux-kernel, iommu, robin.murphy, linux-arm-kernel On Mon 15 Apr 10:37 PDT 2019, Vivek Gautam wrote: > Bits[15:0] in CBFRSYNRA register contain information about > StreamID of the incoming transaction that generated the > fault. Dump CBFRSYNRA register to get this info. > This is specially useful in a distributed SMMU architecture > where multiple masters are connected to the SMMU. > SID information helps to quickly identify the faulting > master device. > > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > --- > > V1 of the patch available @ > https://lore.kernel.org/patchwork/patch/1061615/ > > Changes from v1: > - Dump the raw register value of CBFRSYNRA register in the > context fault log rather than extracting the SID inforamtion > and dumping that. > > drivers/iommu/arm-smmu-regs.h | 2 ++ > drivers/iommu/arm-smmu.c | 8 ++++++-- > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > index a1226e4ab5f8..e9132a926761 100644 > --- a/drivers/iommu/arm-smmu-regs.h > +++ b/drivers/iommu/arm-smmu-regs.h > @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { > #define CBAR_IRPTNDX_SHIFT 24 > #define CBAR_IRPTNDX_MASK 0xff > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > + > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > #define CBA2R_RW64_32BIT (0 << 0) > #define CBA2R_RW64_64BIT (1 << 0) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 045d93884164..a4773e8c6b0e 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); The 80 char limit is more like a guideline anyways...please don't wrap this. > > dev_err_ratelimited(smmu->dev, > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > - fsr, iova, fsynr, cfg->cbndx); > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", Drop the spaces around '='. With those addressed, you have my Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > return IRQ_HANDLED; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-19 0:24 ` Bjorn Andersson 0 siblings, 0 replies; 27+ messages in thread From: Bjorn Andersson @ 2019-04-19 0:24 UTC (permalink / raw) To: Vivek Gautam Cc: linux-arm-msm, will.deacon, linux-kernel, iommu, robin.murphy, linux-arm-kernel On Mon 15 Apr 10:37 PDT 2019, Vivek Gautam wrote: > Bits[15:0] in CBFRSYNRA register contain information about > StreamID of the incoming transaction that generated the > fault. Dump CBFRSYNRA register to get this info. > This is specially useful in a distributed SMMU architecture > where multiple masters are connected to the SMMU. > SID information helps to quickly identify the faulting > master device. > > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > --- > > V1 of the patch available @ > https://lore.kernel.org/patchwork/patch/1061615/ > > Changes from v1: > - Dump the raw register value of CBFRSYNRA register in the > context fault log rather than extracting the SID inforamtion > and dumping that. > > drivers/iommu/arm-smmu-regs.h | 2 ++ > drivers/iommu/arm-smmu.c | 8 ++++++-- > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > index a1226e4ab5f8..e9132a926761 100644 > --- a/drivers/iommu/arm-smmu-regs.h > +++ b/drivers/iommu/arm-smmu-regs.h > @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { > #define CBAR_IRPTNDX_SHIFT 24 > #define CBAR_IRPTNDX_MASK 0xff > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > + > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > #define CBA2R_RW64_32BIT (0 << 0) > #define CBA2R_RW64_64BIT (1 << 0) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 045d93884164..a4773e8c6b0e 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > struct arm_smmu_device *smmu = smmu_domain->smmu; > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > void __iomem *cb_base; > + u32 cbfrsynra; > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > + cbfrsynra = readl_relaxed(gr1_base + > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); The 80 char limit is more like a guideline anyways...please don't wrap this. > > dev_err_ratelimited(smmu->dev, > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > - fsr, iova, fsynr, cfg->cbndx); > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", Drop the spaces around '='. With those addressed, you have my Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > return IRQ_HANDLED; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-19 5:34 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-19 5:34 UTC (permalink / raw) To: Bjorn Andersson Cc: linux-arm-msm, Will Deacon, open list, list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>, , Robin Murphy, Linux ARM On Fri, Apr 19, 2019 at 5:55 AM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > On Mon 15 Apr 10:37 PDT 2019, Vivek Gautam wrote: > > > Bits[15:0] in CBFRSYNRA register contain information about > > StreamID of the incoming transaction that generated the > > fault. Dump CBFRSYNRA register to get this info. > > This is specially useful in a distributed SMMU architecture > > where multiple masters are connected to the SMMU. > > SID information helps to quickly identify the faulting > > master device. > > > > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > > --- > > > > V1 of the patch available @ > > https://lore.kernel.org/patchwork/patch/1061615/ > > > > Changes from v1: > > - Dump the raw register value of CBFRSYNRA register in the > > context fault log rather than extracting the SID inforamtion > > and dumping that. > > > > drivers/iommu/arm-smmu-regs.h | 2 ++ > > drivers/iommu/arm-smmu.c | 8 ++++++-- > > 2 files changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > > index a1226e4ab5f8..e9132a926761 100644 > > --- a/drivers/iommu/arm-smmu-regs.h > > +++ b/drivers/iommu/arm-smmu-regs.h > > @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { > > #define CBAR_IRPTNDX_SHIFT 24 > > #define CBAR_IRPTNDX_MASK 0xff > > > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > > + > > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > > #define CBA2R_RW64_32BIT (0 << 0) > > #define CBA2R_RW64_64BIT (1 << 0) > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > > index 045d93884164..a4773e8c6b0e 100644 > > --- a/drivers/iommu/arm-smmu.c > > +++ b/drivers/iommu/arm-smmu.c > > @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > > struct arm_smmu_device *smmu = smmu_domain->smmu; > > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > > void __iomem *cb_base; > > + u32 cbfrsynra; > > > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > > @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > > The 80 char limit is more like a guideline anyways...please don't wrap > this. > > > > > dev_err_ratelimited(smmu->dev, > > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > > - fsr, iova, fsynr, cfg->cbndx); > > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", > > Drop the spaces around '='. > > With those addressed, you have my > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Thanks for the review Bjorn. Will address above comments and respin. Best regards Vivek > > Regards, > Bjorn > > > + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); > > > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > > return IRQ_HANDLED; > > -- > > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > > of Code Aurora Forum, hosted by The Linux Foundation > > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-19 5:34 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-19 5:34 UTC (permalink / raw) To: Bjorn Andersson Cc: linux-arm-msm, Will Deacon, open list, list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>, , Robin Murphy, Linux ARM On Fri, Apr 19, 2019 at 5:55 AM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > On Mon 15 Apr 10:37 PDT 2019, Vivek Gautam wrote: > > > Bits[15:0] in CBFRSYNRA register contain information about > > StreamID of the incoming transaction that generated the > > fault. Dump CBFRSYNRA register to get this info. > > This is specially useful in a distributed SMMU architecture > > where multiple masters are connected to the SMMU. > > SID information helps to quickly identify the faulting > > master device. > > > > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > > --- > > > > V1 of the patch available @ > > https://lore.kernel.org/patchwork/patch/1061615/ > > > > Changes from v1: > > - Dump the raw register value of CBFRSYNRA register in the > > context fault log rather than extracting the SID inforamtion > > and dumping that. > > > > drivers/iommu/arm-smmu-regs.h | 2 ++ > > drivers/iommu/arm-smmu.c | 8 ++++++-- > > 2 files changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > > index a1226e4ab5f8..e9132a926761 100644 > > --- a/drivers/iommu/arm-smmu-regs.h > > +++ b/drivers/iommu/arm-smmu-regs.h > > @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { > > #define CBAR_IRPTNDX_SHIFT 24 > > #define CBAR_IRPTNDX_MASK 0xff > > > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > > + > > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > > #define CBA2R_RW64_32BIT (0 << 0) > > #define CBA2R_RW64_64BIT (1 << 0) > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > > index 045d93884164..a4773e8c6b0e 100644 > > --- a/drivers/iommu/arm-smmu.c > > +++ b/drivers/iommu/arm-smmu.c > > @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > > struct arm_smmu_device *smmu = smmu_domain->smmu; > > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > > void __iomem *cb_base; > > + u32 cbfrsynra; > > > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > > @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > > The 80 char limit is more like a guideline anyways...please don't wrap > this. > > > > > dev_err_ratelimited(smmu->dev, > > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > > - fsr, iova, fsynr, cfg->cbndx); > > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", > > Drop the spaces around '='. > > With those addressed, you have my > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Thanks for the review Bjorn. Will address above comments and respin. Best regards Vivek > > Regards, > Bjorn > > > + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); > > > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > > return IRQ_HANDLED; > > -- > > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > > of Code Aurora Forum, hosted by The Linux Foundation > > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-19 5:34 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-19 5:34 UTC (permalink / raw) To: Bjorn Andersson Cc: linux-arm-msm, Will Deacon, open list, list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>, , Robin Murphy, Linux ARM On Fri, Apr 19, 2019 at 5:55 AM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > On Mon 15 Apr 10:37 PDT 2019, Vivek Gautam wrote: > > > Bits[15:0] in CBFRSYNRA register contain information about > > StreamID of the incoming transaction that generated the > > fault. Dump CBFRSYNRA register to get this info. > > This is specially useful in a distributed SMMU architecture > > where multiple masters are connected to the SMMU. > > SID information helps to quickly identify the faulting > > master device. > > > > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > > --- > > > > V1 of the patch available @ > > https://lore.kernel.org/patchwork/patch/1061615/ > > > > Changes from v1: > > - Dump the raw register value of CBFRSYNRA register in the > > context fault log rather than extracting the SID inforamtion > > and dumping that. > > > > drivers/iommu/arm-smmu-regs.h | 2 ++ > > drivers/iommu/arm-smmu.c | 8 ++++++-- > > 2 files changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > > index a1226e4ab5f8..e9132a926761 100644 > > --- a/drivers/iommu/arm-smmu-regs.h > > +++ b/drivers/iommu/arm-smmu-regs.h > > @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { > > #define CBAR_IRPTNDX_SHIFT 24 > > #define CBAR_IRPTNDX_MASK 0xff > > > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > > + > > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > > #define CBA2R_RW64_32BIT (0 << 0) > > #define CBA2R_RW64_64BIT (1 << 0) > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > > index 045d93884164..a4773e8c6b0e 100644 > > --- a/drivers/iommu/arm-smmu.c > > +++ b/drivers/iommu/arm-smmu.c > > @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > > struct arm_smmu_device *smmu = smmu_domain->smmu; > > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > > void __iomem *cb_base; > > + u32 cbfrsynra; > > > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > > @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > > The 80 char limit is more like a guideline anyways...please don't wrap > this. > > > > > dev_err_ratelimited(smmu->dev, > > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > > - fsr, iova, fsynr, cfg->cbndx); > > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", > > Drop the spaces around '='. > > With those addressed, you have my > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Thanks for the review Bjorn. Will address above comments and respin. Best regards Vivek > > Regards, > Bjorn > > > + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); > > > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > > return IRQ_HANDLED; > > -- > > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > > of Code Aurora Forum, hosted by The Linux Foundation > > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault @ 2019-04-19 5:34 ` Vivek Gautam 0 siblings, 0 replies; 27+ messages in thread From: Vivek Gautam @ 2019-04-19 5:34 UTC (permalink / raw) To: Bjorn Andersson Cc: linux-arm-msm, Will Deacon, open list, list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>,, Robin Murphy, Linux ARM On Fri, Apr 19, 2019 at 5:55 AM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > > On Mon 15 Apr 10:37 PDT 2019, Vivek Gautam wrote: > > > Bits[15:0] in CBFRSYNRA register contain information about > > StreamID of the incoming transaction that generated the > > fault. Dump CBFRSYNRA register to get this info. > > This is specially useful in a distributed SMMU architecture > > where multiple masters are connected to the SMMU. > > SID information helps to quickly identify the faulting > > master device. > > > > Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> > > --- > > > > V1 of the patch available @ > > https://lore.kernel.org/patchwork/patch/1061615/ > > > > Changes from v1: > > - Dump the raw register value of CBFRSYNRA register in the > > context fault log rather than extracting the SID inforamtion > > and dumping that. > > > > drivers/iommu/arm-smmu-regs.h | 2 ++ > > drivers/iommu/arm-smmu.c | 8 ++++++-- > > 2 files changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/iommu/arm-smmu-regs.h b/drivers/iommu/arm-smmu-regs.h > > index a1226e4ab5f8..e9132a926761 100644 > > --- a/drivers/iommu/arm-smmu-regs.h > > +++ b/drivers/iommu/arm-smmu-regs.h > > @@ -147,6 +147,8 @@ enum arm_smmu_s2cr_privcfg { > > #define CBAR_IRPTNDX_SHIFT 24 > > #define CBAR_IRPTNDX_MASK 0xff > > > > +#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2)) > > + > > #define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2)) > > #define CBA2R_RW64_32BIT (0 << 0) > > #define CBA2R_RW64_64BIT (1 << 0) > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > > index 045d93884164..a4773e8c6b0e 100644 > > --- a/drivers/iommu/arm-smmu.c > > +++ b/drivers/iommu/arm-smmu.c > > @@ -575,7 +575,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > > struct arm_smmu_cfg *cfg = &smmu_domain->cfg; > > struct arm_smmu_device *smmu = smmu_domain->smmu; > > + void __iomem *gr1_base = ARM_SMMU_GR1(smmu); > > void __iomem *cb_base; > > + u32 cbfrsynra; > > > > cb_base = ARM_SMMU_CB(smmu, cfg->cbndx); > > fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); > > @@ -585,10 +587,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev) > > > > fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); > > iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR); > > + cbfrsynra = readl_relaxed(gr1_base + > > + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx)); > > The 80 char limit is more like a guideline anyways...please don't wrap > this. > > > > > dev_err_ratelimited(smmu->dev, > > - "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cb=%d\n", > > - fsr, iova, fsynr, cfg->cbndx); > > + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra = 0x%x, cb=%d\n", > > Drop the spaces around '='. > > With those addressed, you have my > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Thanks for the review Bjorn. Will address above comments and respin. Best regards Vivek > > Regards, > Bjorn > > > + fsr, iova, fsynr, cbfrsynra, cfg->cbndx); > > > > writel(fsr, cb_base + ARM_SMMU_CB_FSR); > > return IRQ_HANDLED; > > -- > > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > > of Code Aurora Forum, hosted by The Linux Foundation > > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2019-04-19 18:30 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed)
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2019-04-15 8:07 [PATCH 1/1] iommu/arm-smmu: Add SID information to context fault log Vivek Gautam
2019-04-15 8:07 ` Vivek Gautam
2019-04-15 8:07 ` Vivek Gautam
2019-04-15 8:07 ` Vivek Gautam
2019-04-15 8:54 ` Marc Gonzalez
2019-04-15 8:54 ` Marc Gonzalez
2019-04-15 12:04 ` Vivek Gautam
2019-04-15 12:04 ` Vivek Gautam
[not found] ` <20190415080734.6843-1-vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2019-04-15 9:41 ` Robin Murphy
2019-04-15 9:41 ` Robin Murphy
2019-04-15 9:41 ` Robin Murphy
2019-04-15 9:41 ` Robin Murphy
[not found] ` <e5945adb-a1a3-1743-e671-39707276fad6-5wv7dgnIgG8@public.gmane.org>
2019-04-15 12:05 ` Vivek Gautam
2019-04-15 12:05 ` Vivek Gautam
2019-04-15 12:05 ` Vivek Gautam
2019-04-15 12:05 ` Vivek Gautam
[not found] ` <4cfc7b3b-bc74-6b37-19f5-40b6394fa762-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2019-04-15 17:37 ` [PATCH 1/1] iommu/arm-smmu: Log CBFRSYNRA register on context fault Vivek Gautam
2019-04-15 17:37 ` Vivek Gautam
2019-04-15 17:37 ` Vivek Gautam
2019-04-15 17:37 ` Vivek Gautam
2019-04-19 0:24 ` Bjorn Andersson
2019-04-19 0:24 ` Bjorn Andersson
2019-04-19 0:24 ` Bjorn Andersson
2019-04-19 5:34 ` Vivek Gautam
2019-04-19 5:34 ` Vivek Gautam
2019-04-19 5:34 ` Vivek Gautam
2019-04-19 5:34 ` Vivek Gautam
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