* [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block
@ 2022-09-14 14:36 Heiko Stuebner
2022-09-14 14:46 ` Anup Patel
2022-09-14 19:32 ` Conor.Dooley
0 siblings, 2 replies; 8+ messages in thread
From: Heiko Stuebner @ 2022-09-14 14:36 UTC (permalink / raw)
To: palmer
Cc: linux-riscv, nathan, mail, atishp, ajones, anup, conor.dooley,
Heiko Stuebner, kernel test robot
riscv_cbom_block_size is used by all current non-coherent dma operations,
not only the zicbom variant. So move it over the block also containing
the riscv_noncoherent_supported() prototype.
Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/riscv/include/asm/cacheflush.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index a89c005b4bbf..5c16d901d3da 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
#endif /* CONFIG_SMP */
#ifdef CONFIG_RISCV_ISA_ZICBOM
-extern unsigned int riscv_cbom_block_size;
void riscv_init_cbom_blocksize(void);
#else
static inline void riscv_init_cbom_blocksize(void) { }
#endif
#ifdef CONFIG_RISCV_DMA_NONCOHERENT
+extern unsigned int riscv_cbom_block_size;
void riscv_noncoherent_supported(void);
#endif
--
2.35.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block
2022-09-14 14:36 [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block Heiko Stuebner
@ 2022-09-14 14:46 ` Anup Patel
2022-09-14 14:54 ` Conor.Dooley
2022-09-14 19:32 ` Conor.Dooley
1 sibling, 1 reply; 8+ messages in thread
From: Anup Patel @ 2022-09-14 14:46 UTC (permalink / raw)
To: Heiko Stuebner
Cc: palmer, linux-riscv, nathan, mail, atishp, ajones, anup,
conor.dooley, kernel test robot
On Wed, Sep 14, 2022 at 8:07 PM Heiko Stuebner <heiko@sntech.de> wrote:
>
> riscv_cbom_block_size is used by all current non-coherent dma operations,
> not only the zicbom variant. So move it over the block also containing
> the riscv_noncoherent_supported() prototype.
At the moment, only non-coherent DMA operations use riscv_cbom_block_size
but soon we have other parties using it as well. For example, the RISC-V PMEM
support and KVM RISC-V Zicbom support.
I am not sure if this is the right thing to do.
Regards,
Anup
>
> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> arch/riscv/include/asm/cacheflush.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> index a89c005b4bbf..5c16d901d3da 100644
> --- a/arch/riscv/include/asm/cacheflush.h
> +++ b/arch/riscv/include/asm/cacheflush.h
> @@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
> #endif /* CONFIG_SMP */
>
> #ifdef CONFIG_RISCV_ISA_ZICBOM
> -extern unsigned int riscv_cbom_block_size;
> void riscv_init_cbom_blocksize(void);
> #else
> static inline void riscv_init_cbom_blocksize(void) { }
> #endif
>
> #ifdef CONFIG_RISCV_DMA_NONCOHERENT
> +extern unsigned int riscv_cbom_block_size;
> void riscv_noncoherent_supported(void);
> #endif
>
> --
> 2.35.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block
2022-09-14 14:46 ` Anup Patel
@ 2022-09-14 14:54 ` Conor.Dooley
2022-09-14 14:56 ` Anup Patel
0 siblings, 1 reply; 8+ messages in thread
From: Conor.Dooley @ 2022-09-14 14:54 UTC (permalink / raw)
To: apatel, heiko
Cc: palmer, linux-riscv, nathan, mail, atishp, ajones, anup, lkp
On 14/09/2022 15:46, Anup Patel wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Wed, Sep 14, 2022 at 8:07 PM Heiko Stuebner <heiko@sntech.de> wrote:
>>
>> riscv_cbom_block_size is used by all current non-coherent dma operations,
>> not only the zicbom variant. So move it over the block also containing
>> the riscv_noncoherent_supported() prototype.
>
> At the moment, only non-coherent DMA operations use riscv_cbom_block_size
> but soon we have other parties using it as well. For example, the RISC-V PMEM
> support and KVM RISC-V Zicbom support.
>
> I am not sure if this is the right thing to do.
This is a fix for a current error reported by LKP.
When said future users need to use it - they can move it to a better location
IMO.
Thanks,
Conor.
>
> Regards,
> Anup
>
>>
>> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>> arch/riscv/include/asm/cacheflush.h | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
>> index a89c005b4bbf..5c16d901d3da 100644
>> --- a/arch/riscv/include/asm/cacheflush.h
>> +++ b/arch/riscv/include/asm/cacheflush.h
>> @@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
>> #endif /* CONFIG_SMP */
>>
>> #ifdef CONFIG_RISCV_ISA_ZICBOM
>> -extern unsigned int riscv_cbom_block_size;
>> void riscv_init_cbom_blocksize(void);
>> #else
>> static inline void riscv_init_cbom_blocksize(void) { }
>> #endif
>>
>> #ifdef CONFIG_RISCV_DMA_NONCOHERENT
>> +extern unsigned int riscv_cbom_block_size;
>> void riscv_noncoherent_supported(void);
>> #endif
>>
>> --
>> 2.35.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block
2022-09-14 14:54 ` Conor.Dooley
@ 2022-09-14 14:56 ` Anup Patel
2022-09-14 14:58 ` Heiko Stuebner
0 siblings, 1 reply; 8+ messages in thread
From: Anup Patel @ 2022-09-14 14:56 UTC (permalink / raw)
To: Conor.Dooley
Cc: heiko, palmer, linux-riscv, nathan, mail, atishp, ajones, anup, lkp
On Wed, Sep 14, 2022 at 8:24 PM <Conor.Dooley@microchip.com> wrote:
>
> On 14/09/2022 15:46, Anup Patel wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > On Wed, Sep 14, 2022 at 8:07 PM Heiko Stuebner <heiko@sntech.de> wrote:
> >>
> >> riscv_cbom_block_size is used by all current non-coherent dma operations,
> >> not only the zicbom variant. So move it over the block also containing
> >> the riscv_noncoherent_supported() prototype.
> >
> > At the moment, only non-coherent DMA operations use riscv_cbom_block_size
> > but soon we have other parties using it as well. For example, the RISC-V PMEM
> > support and KVM RISC-V Zicbom support.
> >
> > I am not sure if this is the right thing to do.
>
> This is a fix for a current error reported by LKP.
> When said future users need to use it - they can move it to a better location
> IMO.
Why don't we move it to a better location now itself ?
Regards,
Anup
>
> Thanks,
> Conor.
>
> >
> > Regards,
> > Anup
> >
> >>
> >> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> >> Reported-by: kernel test robot <lkp@intel.com>
> >> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> >> ---
> >> arch/riscv/include/asm/cacheflush.h | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> >> index a89c005b4bbf..5c16d901d3da 100644
> >> --- a/arch/riscv/include/asm/cacheflush.h
> >> +++ b/arch/riscv/include/asm/cacheflush.h
> >> @@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
> >> #endif /* CONFIG_SMP */
> >>
> >> #ifdef CONFIG_RISCV_ISA_ZICBOM
> >> -extern unsigned int riscv_cbom_block_size;
> >> void riscv_init_cbom_blocksize(void);
> >> #else
> >> static inline void riscv_init_cbom_blocksize(void) { }
> >> #endif
> >>
> >> #ifdef CONFIG_RISCV_DMA_NONCOHERENT
> >> +extern unsigned int riscv_cbom_block_size;
> >> void riscv_noncoherent_supported(void);
> >> #endif
> >>
> >> --
> >> 2.35.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block
2022-09-14 14:56 ` Anup Patel
@ 2022-09-14 14:58 ` Heiko Stuebner
0 siblings, 0 replies; 8+ messages in thread
From: Heiko Stuebner @ 2022-09-14 14:58 UTC (permalink / raw)
To: Conor.Dooley, Anup Patel
Cc: palmer, linux-riscv, nathan, mail, atishp, ajones, anup, lkp
Am Mittwoch, 14. September 2022, 16:56:07 CEST schrieb Anup Patel:
> On Wed, Sep 14, 2022 at 8:24 PM <Conor.Dooley@microchip.com> wrote:
> >
> > On 14/09/2022 15:46, Anup Patel wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > >
> > > On Wed, Sep 14, 2022 at 8:07 PM Heiko Stuebner <heiko@sntech.de> wrote:
> > >>
> > >> riscv_cbom_block_size is used by all current non-coherent dma operations,
> > >> not only the zicbom variant. So move it over the block also containing
> > >> the riscv_noncoherent_supported() prototype.
> > >
> > > At the moment, only non-coherent DMA operations use riscv_cbom_block_size
> > > but soon we have other parties using it as well. For example, the RISC-V PMEM
> > > support and KVM RISC-V Zicbom support.
> > >
> > > I am not sure if this is the right thing to do.
> >
> > This is a fix for a current error reported by LKP.
> > When said future users need to use it - they can move it to a better location
> > IMO.
>
> Why don't we move it to a better location now itself ?
Probably because a fix should be a minimal set of changes,
the breakage already exist and we're shortly before 6.0-rc6 ;-)
If we start discussing now where to put it, we might end up
releasing 6.0 with bugs.
>
> Regards,
> Anup
>
> >
> > Thanks,
> > Conor.
> >
> > >
> > > Regards,
> > > Anup
> > >
> > >>
> > >> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> > >> Reported-by: kernel test robot <lkp@intel.com>
> > >> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > >> ---
> > >> arch/riscv/include/asm/cacheflush.h | 2 +-
> > >> 1 file changed, 1 insertion(+), 1 deletion(-)
> > >>
> > >> diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> > >> index a89c005b4bbf..5c16d901d3da 100644
> > >> --- a/arch/riscv/include/asm/cacheflush.h
> > >> +++ b/arch/riscv/include/asm/cacheflush.h
> > >> @@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
> > >> #endif /* CONFIG_SMP */
> > >>
> > >> #ifdef CONFIG_RISCV_ISA_ZICBOM
> > >> -extern unsigned int riscv_cbom_block_size;
> > >> void riscv_init_cbom_blocksize(void);
> > >> #else
> > >> static inline void riscv_init_cbom_blocksize(void) { }
> > >> #endif
> > >>
> > >> #ifdef CONFIG_RISCV_DMA_NONCOHERENT
> > >> +extern unsigned int riscv_cbom_block_size;
> > >> void riscv_noncoherent_supported(void);
> > >> #endif
> > >>
> > >> --
> > >> 2.35.1
> > >>
> > >>
> > >> _______________________________________________
> > >> linux-riscv mailing list
> > >> linux-riscv@lists.infradead.org
> > >> http://lists.infradead.org/mailman/listinfo/linux-riscv
> > >
> > > _______________________________________________
> > > linux-riscv mailing list
> > > linux-riscv@lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-riscv
> >
>
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block
2022-09-14 14:36 [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block Heiko Stuebner
2022-09-14 14:46 ` Anup Patel
@ 2022-09-14 19:32 ` Conor.Dooley
2022-09-14 22:19 ` Heiko Stuebner
1 sibling, 1 reply; 8+ messages in thread
From: Conor.Dooley @ 2022-09-14 19:32 UTC (permalink / raw)
To: heiko, palmer; +Cc: linux-riscv, nathan, mail, atishp, ajones, anup, lkp
On 14/09/2022 15:36, Heiko Stuebner wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> riscv_cbom_block_size is used by all current non-coherent dma operations,
> not only the zicbom variant. So move it over the block also containing
> the riscv_noncoherent_supported() prototype.
>
> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
I accidentally fetched palmers repo rather than riscv & noticed he
pushed a fix there for this too:
https://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git/commit/?h=zicbom-fix
I think Palmer's solution is slightly nicer, but to me either makes
little difference, just getting things squared away for 6.0 is all
I care about at this point.
Either this or the one on Palmer's branch is:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> arch/riscv/include/asm/cacheflush.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> index a89c005b4bbf..5c16d901d3da 100644
> --- a/arch/riscv/include/asm/cacheflush.h
> +++ b/arch/riscv/include/asm/cacheflush.h
> @@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
> #endif /* CONFIG_SMP */
>
> #ifdef CONFIG_RISCV_ISA_ZICBOM
> -extern unsigned int riscv_cbom_block_size;
> void riscv_init_cbom_blocksize(void);
> #else
> static inline void riscv_init_cbom_blocksize(void) { }
> #endif
>
> #ifdef CONFIG_RISCV_DMA_NONCOHERENT
> +extern unsigned int riscv_cbom_block_size;
> void riscv_noncoherent_supported(void);
> #endif
>
> --
> 2.35.1
>
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block
2022-09-14 19:32 ` Conor.Dooley
@ 2022-09-14 22:19 ` Heiko Stuebner
2022-09-15 17:09 ` Palmer Dabbelt
0 siblings, 1 reply; 8+ messages in thread
From: Heiko Stuebner @ 2022-09-14 22:19 UTC (permalink / raw)
To: palmer, Conor.Dooley; +Cc: linux-riscv, nathan, mail, atishp, ajones, anup, lkp
Hi,
Am Mittwoch, 14. September 2022, 21:32:01 CEST schrieb Conor.Dooley@microchip.com:
> On 14/09/2022 15:36, Heiko Stuebner wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > riscv_cbom_block_size is used by all current non-coherent dma operations,
> > not only the zicbom variant. So move it over the block also containing
> > the riscv_noncoherent_supported() prototype.
> >
> > Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> > Reported-by: kernel test robot <lkp@intel.com>
> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>
> I accidentally fetched palmers repo rather than riscv & noticed he
> pushed a fix there for this too:
> https://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git/commit/?h=zicbom-fix
>
> I think Palmer's solution is slightly nicer, but to me either makes
> little difference, just getting things squared away for 6.0 is all
> I care about at this point.
yeah, Palmer's solution is nice and incidentially should also
not only make LKP happier but maybe also Anup in one go :-) .
So I'd guess disregard this patch and move Palmer's patch over?
Heiko
>
> Either this or the one on Palmer's branch is:
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>
> > ---
> > arch/riscv/include/asm/cacheflush.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> > index a89c005b4bbf..5c16d901d3da 100644
> > --- a/arch/riscv/include/asm/cacheflush.h
> > +++ b/arch/riscv/include/asm/cacheflush.h
> > @@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
> > #endif /* CONFIG_SMP */
> >
> > #ifdef CONFIG_RISCV_ISA_ZICBOM
> > -extern unsigned int riscv_cbom_block_size;
> > void riscv_init_cbom_blocksize(void);
> > #else
> > static inline void riscv_init_cbom_blocksize(void) { }
> > #endif
> >
> > #ifdef CONFIG_RISCV_DMA_NONCOHERENT
> > +extern unsigned int riscv_cbom_block_size;
> > void riscv_noncoherent_supported(void);
> > #endif
> >
> > --
> > 2.35.1
> >
>
>
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block
2022-09-14 22:19 ` Heiko Stuebner
@ 2022-09-15 17:09 ` Palmer Dabbelt
0 siblings, 0 replies; 8+ messages in thread
From: Palmer Dabbelt @ 2022-09-15 17:09 UTC (permalink / raw)
To: heiko; +Cc: Conor.Dooley, linux-riscv, nathan, mail, atishp, ajones, anup, lkp
On Wed, 14 Sep 2022 15:19:51 PDT (-0700), heiko@sntech.de wrote:
> Hi,
>
> Am Mittwoch, 14. September 2022, 21:32:01 CEST schrieb Conor.Dooley@microchip.com:
>> On 14/09/2022 15:36, Heiko Stuebner wrote:
>> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>> >
>> > riscv_cbom_block_size is used by all current non-coherent dma operations,
>> > not only the zicbom variant. So move it over the block also containing
>> > the riscv_noncoherent_supported() prototype.
>> >
>> > Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
>> > Reported-by: kernel test robot <lkp@intel.com>
>> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>>
>> I accidentally fetched palmers repo rather than riscv & noticed he
>> pushed a fix there for this too:
>> https://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git/commit/?h=zicbom-fix
>>
>> I think Palmer's solution is slightly nicer, but to me either makes
>> little difference, just getting things squared away for 6.0 is all
>> I care about at this point.
>
> yeah, Palmer's solution is nice and incidentially should also
> not only make LKP happier but maybe also Anup in one go :-) .
>
> So I'd guess disregard this patch and move Palmer's patch over?
OK, I'll go post mine and then merge it -- I was writing it at Plumbers,
I guess I forgot to send it.
>
>
> Heiko
>
>>
>> Either this or the one on Palmer's branch is:
>> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>>
>> > ---
>> > arch/riscv/include/asm/cacheflush.h | 2 +-
>> > 1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
>> > index a89c005b4bbf..5c16d901d3da 100644
>> > --- a/arch/riscv/include/asm/cacheflush.h
>> > +++ b/arch/riscv/include/asm/cacheflush.h
>> > @@ -43,13 +43,13 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
>> > #endif /* CONFIG_SMP */
>> >
>> > #ifdef CONFIG_RISCV_ISA_ZICBOM
>> > -extern unsigned int riscv_cbom_block_size;
>> > void riscv_init_cbom_blocksize(void);
>> > #else
>> > static inline void riscv_init_cbom_blocksize(void) { }
>> > #endif
>> >
>> > #ifdef CONFIG_RISCV_DMA_NONCOHERENT
>> > +extern unsigned int riscv_cbom_block_size;
>> > void riscv_noncoherent_supported(void);
>> > #endif
>> >
>> > --
>> > 2.35.1
>> >
>>
>>
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^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-09-15 17:09 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-14 14:36 [PATCH] RISC-V: move riscv_cbom_block_size to the correct #ifdef block Heiko Stuebner
2022-09-14 14:46 ` Anup Patel
2022-09-14 14:54 ` Conor.Dooley
2022-09-14 14:56 ` Anup Patel
2022-09-14 14:58 ` Heiko Stuebner
2022-09-14 19:32 ` Conor.Dooley
2022-09-14 22:19 ` Heiko Stuebner
2022-09-15 17:09 ` Palmer Dabbelt
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