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From: "Saarinen, Jani" <jani.saarinen@intel.com>
To: "Jani Nikula" <jani.nikula@linux.intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "daniel.vetter@ffwll.ch" <daniel.vetter@ffwll.ch>,
	"linux-fbdev@vger.kernel.org" <linux-fbdev@vger.kernel.org>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"laurent.pinchart@ideasonboard.com"
	<laurent.pinchart@ideasonboard.com>
Subject: RE: [Intel-gfx] [PATCH v12 00/14] In order to readout DP SDPs, refactors the handling of DP SDPs
Date: Fri, 15 May 2020 14:25:41 +0000	[thread overview]
Message-ID: <e82f172de7a04c0589f4f7c551475535@intel.com> (raw)
In-Reply-To: <87zha92vf5.fsf@intel.com>

SGksDQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogSW50ZWwtZ2Z4IDxp
bnRlbC1nZngtYm91bmNlc0BsaXN0cy5mcmVlZGVza3RvcC5vcmc+IE9uIEJlaGFsZiBPZiBKYW5p
IE5pa3VsYQ0KPiBTZW50OiBwZXJqYW50YWkgMTUuIHRvdWtva3V1dGEgMjAyMCAxNi4xMw0KPiBU
bzogVmlsbGUgU3lyasOkbMOkIDx2aWxsZS5zeXJqYWxhQGxpbnV4LmludGVsLmNvbT4NCj4gQ2M6
IGxpbnV4LWZiZGV2QHZnZXIua2VybmVsLm9yZzsgZGFuaWVsLnZldHRlckBmZndsbC5jaDsgaW50
ZWwtDQo+IGdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmc7IGRyaS1kZXZlbEBsaXN0cy5mcmVlZGVz
a3RvcC5vcmc7DQo+IGxhdXJlbnQucGluY2hhcnRAaWRlYXNvbmJvYXJkLmNvbQ0KPiBTdWJqZWN0
OiBSZTogW0ludGVsLWdmeF0gW1BBVENIIHYxMiAwMC8xNF0gSW4gb3JkZXIgdG8gcmVhZG91dCBE
UCBTRFBzLCByZWZhY3RvcnMgdGhlDQo+IGhhbmRsaW5nIG9mIERQIFNEUHMNCj4gDQo+IE9uIEZy
aSwgMTUgTWF5IDIwMjAsIFZpbGxlIFN5cmrDpGzDpCA8dmlsbGUuc3lyamFsYUBsaW51eC5pbnRl
bC5jb20+IHdyb3RlOg0KPiA+IE9uIFRodSwgTWF5IDE0LCAyMDIwIGF0IDAyOjE5OjIzUE0gKzAz
MDAsIEphbmkgTmlrdWxhIHdyb3RlOg0KPiA+PiBPbiBUaHUsIDE0IE1heSAyMDIwLCBHd2FuLWd5
ZW9uZyBNdW4gPGd3YW4tZ3llb25nLm11bkBpbnRlbC5jb20+DQo+IHdyb3RlOg0KPiA+PiA+IElu
IG9yZGVyIHRvIHJlYWRvdXQgRFAgU0RQcyAoU2Vjb25kYXJ5IERhdGEgUGFja2V0OiBEUCBIRFIg
TWV0YWRhdGENCj4gPj4gPiBJbmZvZnJhbWUgU0RQLCBEUCBWU0MgU0RQKSwgaXQgcmVmYWN0b3Jz
IGhhbmRsaW5nIERQIFNEUHMgY29kZXMuDQo+ID4+ID4gSXQgYWRkcyBuZXcgY29tcHV0ZSByb3V0
aW5lcyBmb3IgRFAgSERSIE1ldGFkYXRhIEluZm9mcmFtZSBTRFAgYW5kDQo+ID4+ID4gRFAgVlND
IFNEUC4NCj4gPj4gPiBBbmQgbmV3IHdyaXRpbmcgcm91dGluZXMgb2YgRFAgU0RQcyAoU2Vjb25k
YXJ5IERhdGEgUGFja2V0KSB0aGF0DQo+ID4+ID4gdXNlcyBjb21wdXRlZCBjb25maWdzLg0KPiA+
PiA+IE5ldyByZWFkaW5nIHJvdXRpbmVzIG9mIERQIFNEUHMgYXJlIGFkZGVkIGZvciByZWFkb3V0
Lg0KPiA+PiA+IEl0IGFkZHMgYSBsb2dnaW5nIGZ1bmN0aW9uIGZvciBEUCBWU0MgU0RQLg0KPiA+
PiA+IFdoZW4gcmVjZWl2aW5nIHZpZGVvIGl0IGlzIHZlcnkgdXNlZnVsIHRvIGJlIGFibGUgdG8g
bG9nIERQIFZTQyBTRFAuDQo+ID4+ID4gVGhpcyBncmVhdGx5IHNpbXBsaWZpZXMgZGVidWdnaW5n
Lg0KPiA+PiA+IEluIG9yZGVyIHRvIHVzZSBhIGNvbW1vbiBWU0MgU0RQIENvbG9yaW1ldHJ5IGNh
bGN1bGF0aW5nIGNvZGUgb24NCj4gPj4gPiBQU1IsIGl0IHVzZXMgYSBuZXcgcHNyIHZzYyBzZHAg
Y29tcHV0ZSByb3V0aW5lLg0KPiA+Pg0KPiA+PiBQdXNoZWQgdGhlIHNlcmllcyB0byBkcm0taW50
ZWwtbmV4dC1xdWV1ZWQgd2l0aCBEYW5pZWwncyBpcmMgYWNrIGZvcg0KPiA+PiBtZXJnaW5nIHRo
ZSB0d28gbm9uLWk5MTUgcGF0Y2hlcyB0aGF0IHJvdXRlIHRvby4NCj4gPg0KPiA+IGZpLWhzdy00
NzcwIG5vdyBvb3BzZXMgYXQgYm9vdDoNCj4gDQo+IC9vXA0KPiANCj4gV2hhdCBkaWQgSSBtaXNz
PyBXaGF0IHBhcnQgYWJvdXQgdGhlIENJIHJlcG9ydCBkaWQgSSBvdmVybG9vaz8NCkRhbW4sIGlu
ZGVlZDoNCmh0dHBzOi8vcGF0Y2h3b3JrLmZyZWVkZXNrdG9wLm9yZy9zZXJpZXMvNzI4NTMvDQpD
aSByZXN1bHRzIGlzIHN1Y2Nlc3MgYnV0IGl0IGhhczoNCktub3duIGlzc3Vlcw0KLS0tLS0tLS0t
LS0tDQoNCiAgSGVyZSBhcmUgdGhlIGNoYW5nZXMgZm91bmQgaW4gUGF0Y2h3b3JrXzE3NjU0IHRo
YXQgY29tZSBmcm9tIGtub3duIGlzc3VlczoNCg0KIyMjIENJIGNoYW5nZXMgIyMjDQoNCiMjIyMg
SXNzdWVzIGhpdCAjIyMjDQoNCiAgKiBib290Og0KICAgIC0gZmktaHN3LTQ3NzA6ICAgICAgICBb
UEFTU11bMV0gLT4gW0ZBSUxdWzJdIChbQ0kjODBdKQ0KICAgWzFdOiBodHRwczovL2ludGVsLWdm
eC1jaS4wMS5vcmcvdHJlZS9kcm0tdGlwL0NJX0RSTV84NDgxL2ZpLWhzdy00NzcwL2Jvb3QuaHRt
bA0KICAgWzJdOiBodHRwczovL2ludGVsLWdmeC1jaS4wMS5vcmcvdHJlZS9kcm0tdGlwL1BhdGNo
d29ya18xNzY1NC9maS1oc3ctNDc3MC9ib290Lmh0bWwNCg0KPiANCj4gQlIsDQo+IEphbmkuDQo+
IA0KPiANCj4gPg0KPiA+IDwxPlsgICAgMy43MzY5MDNdIEJVRzoga2VybmVsIE5VTEwgcG9pbnRl
ciBkZXJlZmVyZW5jZSwgYWRkcmVzczoNCj4gMDAwMDAwMDAwMDAwMDAwMA0KPiA+IDwxPlsgICAg
My43MzY5MTZdICNQRjogc3VwZXJ2aXNvciByZWFkIGFjY2VzcyBpbiBrZXJuZWwgbW9kZQ0KPiA+
IDwxPlsgICAgMy43MzY5MTZdICNQRjogZXJyb3JfY29kZSgweDAwMDApIC0gbm90LXByZXNlbnQg
cGFnZQ0KPiA+IDw2PlsgICAgMy43MzY5MTddIFBHRCAwIFA0RCAwDQo+ID4gPDQ+WyAgICAzLjcz
NjkxOV0gT29wczogMDAwMCBbIzFdIFBSRUVNUFQgU01QIFBUSQ0KPiA+IDw0PlsgICAgMy43MzY5
MjFdIENQVTogMCBQSUQ6IDM2MyBDb21tOiBzeXN0ZW1kLXVkZXZkIE5vdCB0YWludGVkIDUuNy4w
LXJjNS1DSS0NCj4gQ0lfRFJNXzg0ODUrICMxDQo+ID4gPDQ+WyAgICAzLjczNjkyMl0gSGFyZHdh
cmUgbmFtZTogTEVOT1ZPIDEwQUdTMDA2MDEvU0hBUktCQVksIEJJT1MNCj4gRkJLVDM0QVVTIDA0
LzI0LzIwMTMNCj4gPiA8ND5bICAgIDMuNzM2OTg2XSBSSVA6IDAwMTA6aW50ZWxfcHNyX2VuYWJs
ZWQrMHg4LzB4NzAgW2k5MTVdDQo+ID4gPDQ+WyAgICAzLjczNjk4OF0gQ29kZTogMTggNDggYzcg
YzYgNDAgMDkgNzkgYTAgZTggZTMgZTIgMDQgZTEgMGYgYjYgNDQgMjQgMDMgZTkgZjQNCj4gZmQg
ZmYgZmYgOTAgNjYgMmUgMGYgMWYgODQgMDAgMDAgMDAgMDAgMDAgNDEgNTQgNTUgNTMgNDggODMg
ZWMgMDggPDQ4PiA4YiA5ZiBkOCBmZSBmZiBmZg0KPiBmNiA4MyA1ZSAwZCAwMCAwMCAyMCA3NCAw
OSA4MCBiYiA2YyBiNiAwMCAwMA0KPiA+IDw0PlsgICAgMy43MzcwMzZdIFJTUDogMDAxODpmZmZm
YzkwMDAwNDdmOGEwIEVGTEFHUzogMDAwMTAyODYNCj4gPiA8ND5bICAgIDMuNzM3MDQyXSBSQVg6
IDAwMDAwMDAwMDAwMDAwMDIgUkJYOiBmZmZmODg4M2ZmZDA0MDAwIFJDWDoNCj4gMDAwMDAwMDAw
MDAwMDAwMQ0KPiA+IDw0PlsgICAgMy43MzcwNDhdIFJEWDogMDAwMDAwMDAwMDAwMDAwNyBSU0k6
IGZmZmY4ODgzZmZkMDQwMDAgUkRJOg0KPiAwMDAwMDAwMDAwMDAwMTI4DQo+ID4gPDQ+WyAgICAz
LjczNzA1NV0gUkJQOiBmZmZmODg4NDA2YWZlMjAwIFIwODogMDAwMDAwMDAwMDAwMDAwZiBSMDk6
DQo+IDAwMDAwMDAwMDAwMDAwMDENCj4gPiA8ND5bICAgIDMuNzM3MDYxXSBSMTA6IDAwMDAwMDAw
MDAwMDAwMDAgUjExOiAwMDAwMDAwMDAwMDAwMDAwIFIxMjoNCj4gMDAwMDAwMDAwMDAwMDAwMA0K
PiA+IDw0PlsgICAgMy43MzcwNjhdIFIxMzogZmZmZjg4ODNmNzVkMDAwMCBSMTQ6IGZmZmY4ODg0
MDZhZmUyMDAgUjE1Og0KPiBmZmZmODg4M2Y3NWQwODcwDQo+ID4gPDQ+WyAgICAzLjczNzA3NV0g
RlM6ICAwMDAwN2Y3MTYxOGY5NjgwKDAwMDApIEdTOmZmZmY4ODg0MGVjMDAwMDAoMDAwMCkNCj4g
a25sR1M6MDAwMDAwMDAwMDAwMDAwMA0KPiA+IDw0PlsgICAgMy43MzcwODJdIENTOiAgMDAxMCBE
UzogMDAwMCBFUzogMDAwMCBDUjA6IDAwMDAwMDAwODAwNTAwMzMNCj4gPiA8ND5bICAgIDMuNzM3
MDg4XSBDUjI6IDAwMDAwMDAwMDAwMDAwMDAgQ1IzOiAwMDAwMDAwNDAyNTEwMDAyIENSNDoNCj4g
MDAwMDAwMDAwMDE2MDZmMA0KPiA+IDw0PlsgICAgMy43MzcwOTRdIERSMDogMDAwMDAwMDAwMDAw
MDAwMCBEUjE6IDAwMDAwMDAwMDAwMDAwMDAgRFIyOg0KPiAwMDAwMDAwMDAwMDAwMDAwDQo+ID4g
PDQ+WyAgICAzLjczNzEwMV0gRFIzOiAwMDAwMDAwMDAwMDAwMDAwIERSNjogMDAwMDAwMDBmZmZl
MGZmMCBEUjc6DQo+IDAwMDAwMDAwMDAwMDA0MDANCj4gPiA8ND5bICAgIDMuNzM3MTA3XSBDYWxs
IFRyYWNlOg0KPiA+IDw0PlsgICAgMy43MzcxNzVdICBpbnRlbF9yZWFkX2RwX3NkcCsweDFhNC8w
eDM4MCBbaTkxNV0NCj4gPiA8ND5bICAgIDMuNzM3MjQ2XSAgaHN3X2NydF9nZXRfY29uZmlnKzB4
MTIvMHg0MCBbaTkxNV0NCj4gPiA8ND5bICAgIDMuNzM3MzE3XSAgaW50ZWxfbW9kZXNldF9zZXR1
cF9od19zdGF0ZSsweDNiMy8weDE2YTAgW2k5MTVdDQo+ID4gLi4uDQo+IA0KPiAtLQ0KPiBKYW5p
IE5pa3VsYSwgSW50ZWwgT3BlbiBTb3VyY2UgR3JhcGhpY3MgQ2VudGVyDQo+IF9fX19fX19fX19f
X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fDQo+IEludGVsLWdmeCBtYWlsaW5n
IGxpc3QNCj4gSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZw0KPiBodHRwczovL2xpc3Rz
LmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeA0K

WARNING: multiple messages have this Message-ID (diff)
From: "Saarinen, Jani" <jani.saarinen@intel.com>
To: "Jani Nikula" <jani.nikula@linux.intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "daniel.vetter@ffwll.ch" <daniel.vetter@ffwll.ch>,
	"linux-fbdev@vger.kernel.org" <linux-fbdev@vger.kernel.org>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"laurent.pinchart@ideasonboard.com"
	<laurent.pinchart@ideasonboard.com>
Subject: RE: [Intel-gfx] [PATCH v12 00/14] In order to readout DP SDPs, refactors the handling of DP SDPs
Date: Fri, 15 May 2020 14:25:41 +0000	[thread overview]
Message-ID: <e82f172de7a04c0589f4f7c551475535@intel.com> (raw)
In-Reply-To: <87zha92vf5.fsf@intel.com>

Hi,

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: perjantai 15. toukokuuta 2020 16.13
> To: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: linux-fbdev@vger.kernel.org; daniel.vetter@ffwll.ch; intel-
> gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> laurent.pinchart@ideasonboard.com
> Subject: Re: [Intel-gfx] [PATCH v12 00/14] In order to readout DP SDPs, refactors the
> handling of DP SDPs
> 
> On Fri, 15 May 2020, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Thu, May 14, 2020 at 02:19:23PM +0300, Jani Nikula wrote:
> >> On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> wrote:
> >> > In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
> >> > Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
> >> > It adds new compute routines for DP HDR Metadata Infoframe SDP and
> >> > DP VSC SDP.
> >> > And new writing routines of DP SDPs (Secondary Data Packet) that
> >> > uses computed configs.
> >> > New reading routines of DP SDPs are added for readout.
> >> > It adds a logging function for DP VSC SDP.
> >> > When receiving video it is very useful to be able to log DP VSC SDP.
> >> > This greatly simplifies debugging.
> >> > In order to use a common VSC SDP Colorimetry calculating code on
> >> > PSR, it uses a new psr vsc sdp compute routine.
> >>
> >> Pushed the series to drm-intel-next-queued with Daniel's irc ack for
> >> merging the two non-i915 patches that route too.
> >
> > fi-hsw-4770 now oopses at boot:
> 
> /o\
> 
> What did I miss? What part about the CI report did I overlook?
Damn, indeed:
https://patchwork.freedesktop.org/series/72853/
Ci results is success but it has:
Known issues
------------

  Here are the changes found in Patchwork_17654 that come from known issues:

### CI changes ###

#### Issues hit ####

  * boot:
    - fi-hsw-4770:        [PASS][1] -> [FAIL][2] ([CI#80])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8481/fi-hsw-4770/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17654/fi-hsw-4770/boot.html

> 
> BR,
> Jani.
> 
> 
> >
> > <1>[    3.736903] BUG: kernel NULL pointer dereference, address:
> 0000000000000000
> > <1>[    3.736916] #PF: supervisor read access in kernel mode
> > <1>[    3.736916] #PF: error_code(0x0000) - not-present page
> > <6>[    3.736917] PGD 0 P4D 0
> > <4>[    3.736919] Oops: 0000 [#1] PREEMPT SMP PTI
> > <4>[    3.736921] CPU: 0 PID: 363 Comm: systemd-udevd Not tainted 5.7.0-rc5-CI-
> CI_DRM_8485+ #1
> > <4>[    3.736922] Hardware name: LENOVO 10AGS00601/SHARKBAY, BIOS
> FBKT34AUS 04/24/2013
> > <4>[    3.736986] RIP: 0010:intel_psr_enabled+0x8/0x70 [i915]
> > <4>[    3.736988] Code: 18 48 c7 c6 40 09 79 a0 e8 e3 e2 04 e1 0f b6 44 24 03 e9 f4
> fd ff ff 90 66 2e 0f 1f 84 00 00 00 00 00 41 54 55 53 48 83 ec 08 <48> 8b 9f d8 fe ff ff
> f6 83 5e 0d 00 00 20 74 09 80 bb 6c b6 00 00
> > <4>[    3.737036] RSP: 0018:ffffc9000047f8a0 EFLAGS: 00010286
> > <4>[    3.737042] RAX: 0000000000000002 RBX: ffff8883ffd04000 RCX:
> 0000000000000001
> > <4>[    3.737048] RDX: 0000000000000007 RSI: ffff8883ffd04000 RDI:
> 0000000000000128
> > <4>[    3.737055] RBP: ffff888406afe200 R08: 000000000000000f R09:
> 0000000000000001
> > <4>[    3.737061] R10: 0000000000000000 R11: 0000000000000000 R12:
> 0000000000000000
> > <4>[    3.737068] R13: ffff8883f75d0000 R14: ffff888406afe200 R15:
> ffff8883f75d0870
> > <4>[    3.737075] FS:  00007f71618f9680(0000) GS:ffff88840ec00000(0000)
> knlGS:0000000000000000
> > <4>[    3.737082] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> > <4>[    3.737088] CR2: 0000000000000000 CR3: 0000000402510002 CR4:
> 00000000001606f0
> > <4>[    3.737094] DR0: 0000000000000000 DR1: 0000000000000000 DR2:
> 0000000000000000
> > <4>[    3.737101] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7:
> 0000000000000400
> > <4>[    3.737107] Call Trace:
> > <4>[    3.737175]  intel_read_dp_sdp+0x1a4/0x380 [i915]
> > <4>[    3.737246]  hsw_crt_get_config+0x12/0x40 [i915]
> > <4>[    3.737317]  intel_modeset_setup_hw_state+0x3b3/0x16a0 [i915]
> > ...
> 
> --
> Jani Nikula, Intel Open Source Graphics Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Saarinen, Jani" <jani.saarinen@intel.com>
To: "Jani Nikula" <jani.nikula@linux.intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "daniel.vetter@ffwll.ch" <daniel.vetter@ffwll.ch>,
	"linux-fbdev@vger.kernel.org" <linux-fbdev@vger.kernel.org>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"laurent.pinchart@ideasonboard.com"
	<laurent.pinchart@ideasonboard.com>
Subject: Re: [Intel-gfx] [PATCH v12 00/14] In order to readout DP SDPs, refactors the handling of DP SDPs
Date: Fri, 15 May 2020 14:25:41 +0000	[thread overview]
Message-ID: <e82f172de7a04c0589f4f7c551475535@intel.com> (raw)
In-Reply-To: <87zha92vf5.fsf@intel.com>

Hi,

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: perjantai 15. toukokuuta 2020 16.13
> To: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: linux-fbdev@vger.kernel.org; daniel.vetter@ffwll.ch; intel-
> gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> laurent.pinchart@ideasonboard.com
> Subject: Re: [Intel-gfx] [PATCH v12 00/14] In order to readout DP SDPs, refactors the
> handling of DP SDPs
> 
> On Fri, 15 May 2020, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Thu, May 14, 2020 at 02:19:23PM +0300, Jani Nikula wrote:
> >> On Thu, 14 May 2020, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> wrote:
> >> > In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
> >> > Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
> >> > It adds new compute routines for DP HDR Metadata Infoframe SDP and
> >> > DP VSC SDP.
> >> > And new writing routines of DP SDPs (Secondary Data Packet) that
> >> > uses computed configs.
> >> > New reading routines of DP SDPs are added for readout.
> >> > It adds a logging function for DP VSC SDP.
> >> > When receiving video it is very useful to be able to log DP VSC SDP.
> >> > This greatly simplifies debugging.
> >> > In order to use a common VSC SDP Colorimetry calculating code on
> >> > PSR, it uses a new psr vsc sdp compute routine.
> >>
> >> Pushed the series to drm-intel-next-queued with Daniel's irc ack for
> >> merging the two non-i915 patches that route too.
> >
> > fi-hsw-4770 now oopses at boot:
> 
> /o\
> 
> What did I miss? What part about the CI report did I overlook?
Damn, indeed:
https://patchwork.freedesktop.org/series/72853/
Ci results is success but it has:
Known issues
------------

  Here are the changes found in Patchwork_17654 that come from known issues:

### CI changes ###

#### Issues hit ####

  * boot:
    - fi-hsw-4770:        [PASS][1] -> [FAIL][2] ([CI#80])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8481/fi-hsw-4770/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17654/fi-hsw-4770/boot.html

> 
> BR,
> Jani.
> 
> 
> >
> > <1>[    3.736903] BUG: kernel NULL pointer dereference, address:
> 0000000000000000
> > <1>[    3.736916] #PF: supervisor read access in kernel mode
> > <1>[    3.736916] #PF: error_code(0x0000) - not-present page
> > <6>[    3.736917] PGD 0 P4D 0
> > <4>[    3.736919] Oops: 0000 [#1] PREEMPT SMP PTI
> > <4>[    3.736921] CPU: 0 PID: 363 Comm: systemd-udevd Not tainted 5.7.0-rc5-CI-
> CI_DRM_8485+ #1
> > <4>[    3.736922] Hardware name: LENOVO 10AGS00601/SHARKBAY, BIOS
> FBKT34AUS 04/24/2013
> > <4>[    3.736986] RIP: 0010:intel_psr_enabled+0x8/0x70 [i915]
> > <4>[    3.736988] Code: 18 48 c7 c6 40 09 79 a0 e8 e3 e2 04 e1 0f b6 44 24 03 e9 f4
> fd ff ff 90 66 2e 0f 1f 84 00 00 00 00 00 41 54 55 53 48 83 ec 08 <48> 8b 9f d8 fe ff ff
> f6 83 5e 0d 00 00 20 74 09 80 bb 6c b6 00 00
> > <4>[    3.737036] RSP: 0018:ffffc9000047f8a0 EFLAGS: 00010286
> > <4>[    3.737042] RAX: 0000000000000002 RBX: ffff8883ffd04000 RCX:
> 0000000000000001
> > <4>[    3.737048] RDX: 0000000000000007 RSI: ffff8883ffd04000 RDI:
> 0000000000000128
> > <4>[    3.737055] RBP: ffff888406afe200 R08: 000000000000000f R09:
> 0000000000000001
> > <4>[    3.737061] R10: 0000000000000000 R11: 0000000000000000 R12:
> 0000000000000000
> > <4>[    3.737068] R13: ffff8883f75d0000 R14: ffff888406afe200 R15:
> ffff8883f75d0870
> > <4>[    3.737075] FS:  00007f71618f9680(0000) GS:ffff88840ec00000(0000)
> knlGS:0000000000000000
> > <4>[    3.737082] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
> > <4>[    3.737088] CR2: 0000000000000000 CR3: 0000000402510002 CR4:
> 00000000001606f0
> > <4>[    3.737094] DR0: 0000000000000000 DR1: 0000000000000000 DR2:
> 0000000000000000
> > <4>[    3.737101] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7:
> 0000000000000400
> > <4>[    3.737107] Call Trace:
> > <4>[    3.737175]  intel_read_dp_sdp+0x1a4/0x380 [i915]
> > <4>[    3.737246]  hsw_crt_get_config+0x12/0x40 [i915]
> > <4>[    3.737317]  intel_modeset_setup_hw_state+0x3b3/0x16a0 [i915]
> > ...
> 
> --
> Jani Nikula, Intel Open Source Graphics Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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  parent reply	other threads:[~2020-05-15 14:25 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-14  6:07 [PATCH v12 00/14] In order to readout DP SDPs, refactors the handling of DP SDPs Gwan-gyeong Mun
2020-05-14  6:07 ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07 ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 01/14] video/hdmi: Add Unpack only function for DRM infoframe Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:23   ` [Intel-gfx] " Mun, Gwan-gyeong
2020-05-14  6:23     ` Mun, Gwan-gyeong
2020-05-14  6:23     ` Mun, Gwan-gyeong
2020-05-14  6:07 ` [PATCH v12 02/14] drm/i915/dp: Read out DP SDPs Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 03/14] drm: Add logging function for DP VSC SDP Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 04/14] drm/i915: Include HDMI DRM infoframe in the crtc state dump Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 05/14] drm/i915: Include DP HDR Metadata Infoframe SDP " Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 06/14] drm/i915: Include DP VSC " Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 07/14] drm/i915: Program DP SDPs with computed configs Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 08/14] drm/i915: Add state readout for DP HDR Metadata Infoframe SDP Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 09/14] drm/i915: Add state readout for DP VSC SDP Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 10/14] drm/i915: Fix enabled infoframe states of lspcon Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 11/14] drm/i915: Program DP SDPs on pipe updates Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 12/14] drm/i915: Stop sending DP SDPs on ddi disable Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 13/14] drm/i915/dp: Add compute routine for DP PSR VSC SDP Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:07 ` [PATCH v12 14/14] drm/i915/psr: Use new DP VSC SDP compute routine on PSR Gwan-gyeong Mun
2020-05-14  6:07   ` [Intel-gfx] " Gwan-gyeong Mun
2020-05-14  6:07   ` Gwan-gyeong Mun
2020-05-14  6:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for In order to readout DP SDPs, refactors the handling of DP SDPs (rev14) Patchwork
2020-05-14  6:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-05-14  9:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-14 11:19 ` [PATCH v12 00/14] In order to readout DP SDPs, refactors the handling of DP SDPs Jani Nikula
2020-05-14 11:19   ` [Intel-gfx] " Jani Nikula
2020-05-14 11:19   ` Jani Nikula
2020-05-15 13:06   ` Ville Syrjälä
2020-05-15 13:06     ` [Intel-gfx] " Ville Syrjälä
2020-05-15 13:06     ` Ville Syrjälä
2020-05-15 13:13     ` Jani Nikula
2020-05-15 13:13       ` [Intel-gfx] " Jani Nikula
2020-05-15 13:13       ` Jani Nikula
2020-05-15 14:14       ` Daniel Vetter
2020-05-15 14:14         ` [Intel-gfx] " Daniel Vetter
2020-05-15 14:14         ` Daniel Vetter
2020-05-15 17:22         ` Mun, Gwan-gyeong
2020-05-15 17:22           ` [Intel-gfx] " Mun, Gwan-gyeong
2020-05-15 17:22           ` Mun, Gwan-gyeong
2020-05-18  9:43           ` Jani Nikula
2020-05-18  9:43             ` [Intel-gfx] " Jani Nikula
2020-05-18  9:43             ` Jani Nikula
2020-05-15 14:25       ` Saarinen, Jani [this message]
2020-05-15 14:25         ` [Intel-gfx] " Saarinen, Jani
2020-05-15 14:25         ` Saarinen, Jani
2020-05-15 14:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success for In order to readout DP SDPs, refactors the handling of DP SDPs (rev14) Patchwork

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