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From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Rolnik <mrolnik@gmail.com>
Cc: Sarah Harris <S.E.Harris@kent.ac.uk>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH RFC v20 5/8] target/avr: Add instruction translation
Date: Mon, 3 Jun 2019 10:31:14 -0500	[thread overview]
Message-ID: <e9abf7a7-24df-d85d-1108-a635c9588553@linaro.org> (raw)
In-Reply-To: <CAK4993hWDHMPR7Oq6ROoAU_N-=iiXqEP2BG-T-MgT1g6UdESJw@mail.gmail.com>

On 6/1/19 10:44 PM, Michael Rolnik wrote:
> Hi Richard.
> 
> these instructions are not branches or jumps they all do skip.

Of course they're not all branches.  I used the example of a branch to show a
situation in which your translation is wrong.

> however, if you think it's important I change it, I will, just show me an
> example or explain.

Ok, let's take HPPA as a very similar example.

Many HPPA instructions may "nullify" the next instruction.  The language is
different, but it's the same thing as the AVR "skip".

Now, I spent quite a bit of effort in target/hppa using conditional move
instructions to implement this.  But you need not go that far.

Now, AVR is differs from HPPA in that there is a nullify bit as part of the
process state.  Since AVR does not have this, we will need to keep the "skip"
state entirely internal to the qemu implementation.

I suggest:

(1) Add "bool skipping;" to CPUAVRState.

Because TranslationBlocks can be ended at any instruction boundary, we need
some way to preserve the skipping state across TB's.

(2) Include "skipping" into the flags for cpu_get_tb_cpu_state, TB_FLAGS_SKIPPING.

(3) Include "skipping" into the computation of cpu_interrupts_enabled.

Because "skipping" is not part of the architectural state of the CPU, we cannot
allow an interrupt to come between the two instructions.  Therefore, while
"skipping" is true, disable interrupts.

(4) Within the instructions that skip the next, issue the branch but record the
label as DisasContext->skip_label.  This will allow the main loop (and other
instructions) know that skipping is active.

(5a) In gen_intermediate_code, if TB_FLAGS_SKIPPING, decode but do not
translate the insn, then clear TB_FLAGS_SKIPPING and store 0 into env->skipping.

(5b) In gen_intermediate_code, if !TB_FLAGS_SKIPPING, copy
DisasContext->skip_label into a local variable, this_skip_label and zero.

We need to prepare for skip of skip, so do not allow the label of the first
skip to be clobbered by the label of the second skip.

(5c) After translate(), if this_skip_label is non-null, emit the label.

(6) Reverse the sense of your conditional branches.

Currently you generate

  brcond(xxx, yyy, zzz, true_label);
  goto npc
true_label:
  goto true_pc

which is fine until we have skip labels.  We now want to emit

  brcond(!xxx, yyy, zzz, false_label);
  goto true_pc
false_label:
skip_label:
  goto npc

which you can do by issuing only the branch, goto, label, and then setting
ctx->bstate to BS_STOP, so that the skip_label is emitted by the main loop, and
the goto npc is also issued by the main loop.

(7) At the end of the loop in gen_intermedite_code, if DisasContext->skip_label
is non-null, then we ended the TB with a skipping instruction and we need to
preserve that within env.

    TCGLabel *finish = NULL;

    if (ctx.skip_label) {
        finish = gen_new_label();
    }

    if (tb->cflags & CF_LAST_IO) {
    ...


    if (ctx.skip_label) {
        TCGv_i32 one;

        gen_set_label(ctx.skip_label);
        one = tcg_const_i32(1);
        tcg_gen_st8_i32(one, cpu_env, offsetof(CPUAVRState, skipping));
        tcg_temp_free_i32(one);
        tcg_gen_br(finish);
    }

 done_generating:
   gen_tb_end(tb, num_insns);


r~


  reply	other threads:[~2019-06-03 15:33 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-30 19:07 [Qemu-devel] [PATCH RFC v20 0/8] QEMU AVR 8 bit cores Michael Rolnik
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 1/8] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-05-31  8:02   ` Igor Mammedov
2019-05-31  8:15     ` Michael Rolnik
2019-05-31  9:56       ` Igor Mammedov
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 2/8] target/avr: Add instruction helpers Michael Rolnik
2019-05-31 13:50   ` Richard Henderson
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 3/8] target/avr: Add mechanism to check for active debugger connection Michael Rolnik
2019-05-31 13:54   ` Richard Henderson
2019-06-01 21:12     ` Michael Rolnik
2019-06-03 15:44       ` Richard Henderson
2019-06-03 16:29         ` Michael Rolnik
2019-06-03 16:36           ` Richard Henderson
2019-06-03 17:04             ` Michael Rolnik
2019-06-05  7:20               ` Michael Rolnik
2019-06-05 14:36                 ` Richard Henderson
2019-06-05 15:19                   ` Michael Rolnik
2019-06-05 16:06                     ` Richard Henderson
2019-06-05 16:10                     ` Alex Bennée
2019-06-05 17:57                       ` Michael Rolnik
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 4/8] target-avr: Add instruction decoding Michael Rolnik
2019-05-31 14:45   ` Richard Henderson
2019-06-03 20:13     ` Michael Rolnik
2019-06-03 21:48       ` Richard Henderson
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 5/8] target/avr: Add instruction translation Michael Rolnik
2019-05-31 15:31   ` Richard Henderson
2019-06-02  3:44     ` Michael Rolnik
2019-06-03 15:31       ` Richard Henderson [this message]
2019-06-03 15:34         ` Michael Rolnik
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 6/8] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 7/8] target/avr: Add example board configuration Michael Rolnik
2019-05-31  8:06   ` Igor Mammedov
2019-05-30 19:07 ` [Qemu-devel] [PATCH RFC v20 8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file Michael Rolnik
2019-05-31 14:50   ` Eric Blake
2019-06-01 21:20     ` Michael Rolnik
2019-06-03 19:47       ` Eric Blake
2019-06-03 19:53         ` Michael Rolnik
2019-05-30 20:16 ` [Qemu-devel] [PATCH RFC v20 0/8] QEMU AVR 8 bit cores no-reply

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