* arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-22 23:51 ` kernel test robot
0 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2021-11-22 23:51 UTC (permalink / raw)
To: Gustavo A. R. Silva
Cc: llvm, kbuild-all, linux-kernel, Kees Cook, Nathan Chancellor
[-- Attachment #1: Type: text/plain, Size: 19676 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 136057256686de39cc3a07c2e39ef6bc43003ff6
commit: dee2b702bcf067d7b6b62c18bdd060ff0810a800 kconfig: Add support for -Wimplicit-fallthrough
date: 8 days ago
config: mips-randconfig-r016-20211116 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project fbe72e41b99dc7994daac300d208a955be3e4a0a)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install mips cross compiling tool for clang build
# apt-get install binutils-mips-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=dee2b702bcf067d7b6b62c18bdd060ff0810a800
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout dee2b702bcf067d7b6b62c18bdd060ff0810a800
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
case CPU_CAVIUM_OCTEON:
^
arch/mips/mm/tlbex.c:2243:3: note: insert 'break;' to avoid fall-through
case CPU_CAVIUM_OCTEON:
^
break;
arch/mips/mm/tlbex.c:2602:6: warning: no previous prototype for function 'build_tlb_refill_handler' [-Wmissing-prototypes]
void build_tlb_refill_handler(void)
^
arch/mips/mm/tlbex.c:2602:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void build_tlb_refill_handler(void)
^
static
arch/mips/mm/tlbex.c:185:1: warning: unused function 'uasm_l_second_part' [-Wunused-function]
UASM_L_LA(_second_part)
^
arch/mips/include/asm/uasm.h:205:20: note: expanded from macro 'UASM_L_LA'
static inline void uasm_l##lb(struct uasm_label **lab, u32 *addr) \
^
<scratch space>:164:1: note: expanded from here
uasm_l_second_part
^
arch/mips/mm/tlbex.c:197:1: warning: unused function 'uasm_l_r3000_write_probe_fail' [-Wunused-function]
UASM_L_LA(_r3000_write_probe_fail)
^
arch/mips/include/asm/uasm.h:205:20: note: expanded from macro 'UASM_L_LA'
static inline void uasm_l##lb(struct uasm_label **lab, u32 *addr) \
^
<scratch space>:186:1: note: expanded from here
uasm_l_r3000_write_probe_fail
^
4 warnings generated.
vim +2243 arch/mips/mm/tlbex.c
^1da177e4c3f41 Linus Torvalds 2005-04-16 2107
078a55fc824c16 Paul Gortmaker 2013-06-18 2108 static void build_r4000_tlb_load_handler(void)
^1da177e4c3f41 Linus Torvalds 2005-04-16 2109 {
2c0e57eaef3c2b Paul Burton 2016-11-07 2110 u32 *p = (u32 *)msk_isa16_mode((ulong)handle_tlbl);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2111 struct uasm_label *l = labels;
e30ec4525d4731 Thiemo Seufer 2008-01-28 2112 struct uasm_reloc *r = relocs;
bf28607fbe529e David Daney 2011-07-05 2113 struct work_registers wr;
^1da177e4c3f41 Linus Torvalds 2005-04-16 2114
4bcb4ad6634ea1 Paul Burton 2018-08-10 2115 memset(p, 0, handle_tlbl_end - (char *)p);
^1da177e4c3f41 Linus Torvalds 2005-04-16 2116 memset(labels, 0, sizeof(labels));
^1da177e4c3f41 Linus Torvalds 2005-04-16 2117 memset(relocs, 0, sizeof(relocs));
^1da177e4c3f41 Linus Torvalds 2005-04-16 2118
^1da177e4c3f41 Linus Torvalds 2005-04-16 2119 if (bcm1250_m3_war()) {
3d45285dd1ff4d Ralf Baechle 2010-03-23 2120 unsigned int segbits = 44;
3d45285dd1ff4d Ralf Baechle 2010-03-23 2121
3d45285dd1ff4d Ralf Baechle 2010-03-23 2122 uasm_i_dmfc0(&p, K0, C0_BADVADDR);
3d45285dd1ff4d Ralf Baechle 2010-03-23 2123 uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2124 uasm_i_xor(&p, K0, K0, K1);
3be6022c27ace1 David Daney 2010-04-28 2125 uasm_i_dsrl_safe(&p, K1, K0, 62);
3be6022c27ace1 David Daney 2010-04-28 2126 uasm_i_dsrl_safe(&p, K0, K0, 12 + 1);
3be6022c27ace1 David Daney 2010-04-28 2127 uasm_i_dsll_safe(&p, K0, K0, 64 + 12 + 1 - segbits);
3d45285dd1ff4d Ralf Baechle 2010-03-23 2128 uasm_i_or(&p, K0, K0, K1);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2129 uasm_il_bnez(&p, &r, K0, label_leave);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2130 /* No need for uasm_i_nop */
^1da177e4c3f41 Linus Torvalds 2005-04-16 2131 }
^1da177e4c3f41 Linus Torvalds 2005-04-16 2132
bf28607fbe529e David Daney 2011-07-05 2133 wr = build_r4000_tlbchange_handler_head(&p, &l, &r);
bf28607fbe529e David Daney 2011-07-05 2134 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
8df5beac2aa15b Maciej W. Rozycki 2006-08-23 2135 if (m4kc_tlbp_war())
8df5beac2aa15b Maciej W. Rozycki 2006-08-23 2136 build_tlb_probe_entry(&p);
6dd9344cfc41bc David Daney 2010-02-10 2137
5890f70f15c52d Leonid Yegoshin 2014-07-15 2138 if (cpu_has_rixi && !cpu_has_rixiex) {
6dd9344cfc41bc David Daney 2010-02-10 2139 /*
6dd9344cfc41bc David Daney 2010-02-10 2140 * If the page is not _PAGE_VALID, RI or XI could not
6dd9344cfc41bc David Daney 2010-02-10 2141 * have triggered it. Skip the expensive test..
6dd9344cfc41bc David Daney 2010-02-10 2142 */
cc33ae43797541 David Daney 2010-12-20 2143 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2144 uasm_il_bbit0(&p, &r, wr.r1, ilog2(_PAGE_VALID),
cc33ae43797541 David Daney 2010-12-20 2145 label_tlbl_goaround1);
cc33ae43797541 David Daney 2010-12-20 2146 } else {
bf28607fbe529e David Daney 2011-07-05 2147 uasm_i_andi(&p, wr.r3, wr.r1, _PAGE_VALID);
bf28607fbe529e David Daney 2011-07-05 2148 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround1);
cc33ae43797541 David Daney 2010-12-20 2149 }
6dd9344cfc41bc David Daney 2010-02-10 2150 uasm_i_nop(&p);
6dd9344cfc41bc David Daney 2010-02-10 2151
f39878cc5b09c7 Paul Burton 2017-06-02 2152 /*
f39878cc5b09c7 Paul Burton 2017-06-02 2153 * Warn if something may race with us & replace the TLB entry
f39878cc5b09c7 Paul Burton 2017-06-02 2154 * before we read it here. Everything with such races should
f39878cc5b09c7 Paul Burton 2017-06-02 2155 * also have dedicated RiXi exception handlers, so this
f39878cc5b09c7 Paul Burton 2017-06-02 2156 * shouldn't be hit.
f39878cc5b09c7 Paul Burton 2017-06-02 2157 */
f39878cc5b09c7 Paul Burton 2017-06-02 2158 WARN(cpu_has_tlbex_tlbp_race(), "Unhandled race in RiXi path");
f39878cc5b09c7 Paul Burton 2017-06-02 2159
6dd9344cfc41bc David Daney 2010-02-10 2160 uasm_i_tlbr(&p);
73acc7df534ff4 Ralf Baechle 2013-06-20 2161
73acc7df534ff4 Ralf Baechle 2013-06-20 2162 switch (current_cpu_type()) {
73acc7df534ff4 Ralf Baechle 2013-06-20 2163 default:
77f3ee59ee7cfe Leonid Yegoshin 2014-11-24 2164 if (cpu_has_mips_r2_exec_hazard) {
73acc7df534ff4 Ralf Baechle 2013-06-20 2165 uasm_i_ehb(&p);
bc431d2153cc29 Gustavo A. R. Silva 2021-07-13 2166 fallthrough;
73acc7df534ff4 Ralf Baechle 2013-06-20 2167
73acc7df534ff4 Ralf Baechle 2013-06-20 2168 case CPU_CAVIUM_OCTEON:
73acc7df534ff4 Ralf Baechle 2013-06-20 2169 case CPU_CAVIUM_OCTEON_PLUS:
73acc7df534ff4 Ralf Baechle 2013-06-20 2170 case CPU_CAVIUM_OCTEON2:
73acc7df534ff4 Ralf Baechle 2013-06-20 2171 break;
73acc7df534ff4 Ralf Baechle 2013-06-20 2172 }
73acc7df534ff4 Ralf Baechle 2013-06-20 2173 }
73acc7df534ff4 Ralf Baechle 2013-06-20 2174
6dd9344cfc41bc David Daney 2010-02-10 2175 /* Examine entrylo 0 or 1 based on ptr. */
cc33ae43797541 David Daney 2010-12-20 2176 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2177 uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
cc33ae43797541 David Daney 2010-12-20 2178 } else {
bf28607fbe529e David Daney 2011-07-05 2179 uasm_i_andi(&p, wr.r3, wr.r2, sizeof(pte_t));
bf28607fbe529e David Daney 2011-07-05 2180 uasm_i_beqz(&p, wr.r3, 8);
cc33ae43797541 David Daney 2010-12-20 2181 }
bf28607fbe529e David Daney 2011-07-05 2182 /* load it in the delay slot*/
bf28607fbe529e David Daney 2011-07-05 2183 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO0);
bf28607fbe529e David Daney 2011-07-05 2184 /* load it if ptr is odd */
bf28607fbe529e David Daney 2011-07-05 2185 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO1);
6dd9344cfc41bc David Daney 2010-02-10 2186 /*
bf28607fbe529e David Daney 2011-07-05 2187 * If the entryLo (now in wr.r3) is valid (bit 1), RI or
6dd9344cfc41bc David Daney 2010-02-10 2188 * XI must have triggered it.
6dd9344cfc41bc David Daney 2010-02-10 2189 */
cc33ae43797541 David Daney 2010-12-20 2190 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2191 uasm_il_bbit1(&p, &r, wr.r3, 1, label_nopage_tlbl);
bf28607fbe529e David Daney 2011-07-05 2192 uasm_i_nop(&p);
cc33ae43797541 David Daney 2010-12-20 2193 uasm_l_tlbl_goaround1(&l, p);
cc33ae43797541 David Daney 2010-12-20 2194 } else {
bf28607fbe529e David Daney 2011-07-05 2195 uasm_i_andi(&p, wr.r3, wr.r3, 2);
bf28607fbe529e David Daney 2011-07-05 2196 uasm_il_bnez(&p, &r, wr.r3, label_nopage_tlbl);
bf28607fbe529e David Daney 2011-07-05 2197 uasm_i_nop(&p);
6dd9344cfc41bc David Daney 2010-02-10 2198 }
bf28607fbe529e David Daney 2011-07-05 2199 uasm_l_tlbl_goaround1(&l, p);
cc33ae43797541 David Daney 2010-12-20 2200 }
bbeeffec6f14a0 Paul Burton 2016-04-19 2201 build_make_valid(&p, &r, wr.r1, wr.r2, wr.r3);
bf28607fbe529e David Daney 2011-07-05 2202 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
^1da177e4c3f41 Linus Torvalds 2005-04-16 2203
aa1762f49c81a1 David Daney 2012-10-17 2204 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
fd062c847a8cea David Daney 2009-05-27 2205 /*
fd062c847a8cea David Daney 2009-05-27 2206 * This is the entry point when build_r4000_tlbchange_handler_head
fd062c847a8cea David Daney 2009-05-27 2207 * spots a huge page.
fd062c847a8cea David Daney 2009-05-27 2208 */
fd062c847a8cea David Daney 2009-05-27 2209 uasm_l_tlb_huge_update(&l, p);
bf28607fbe529e David Daney 2011-07-05 2210 iPTE_LW(&p, wr.r1, wr.r2);
bf28607fbe529e David Daney 2011-07-05 2211 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
fd062c847a8cea David Daney 2009-05-27 2212 build_tlb_probe_entry(&p);
6dd9344cfc41bc David Daney 2010-02-10 2213
5890f70f15c52d Leonid Yegoshin 2014-07-15 2214 if (cpu_has_rixi && !cpu_has_rixiex) {
6dd9344cfc41bc David Daney 2010-02-10 2215 /*
6dd9344cfc41bc David Daney 2010-02-10 2216 * If the page is not _PAGE_VALID, RI or XI could not
6dd9344cfc41bc David Daney 2010-02-10 2217 * have triggered it. Skip the expensive test..
6dd9344cfc41bc David Daney 2010-02-10 2218 */
cc33ae43797541 David Daney 2010-12-20 2219 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2220 uasm_il_bbit0(&p, &r, wr.r1, ilog2(_PAGE_VALID),
cc33ae43797541 David Daney 2010-12-20 2221 label_tlbl_goaround2);
cc33ae43797541 David Daney 2010-12-20 2222 } else {
bf28607fbe529e David Daney 2011-07-05 2223 uasm_i_andi(&p, wr.r3, wr.r1, _PAGE_VALID);
bf28607fbe529e David Daney 2011-07-05 2224 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2);
cc33ae43797541 David Daney 2010-12-20 2225 }
6dd9344cfc41bc David Daney 2010-02-10 2226 uasm_i_nop(&p);
6dd9344cfc41bc David Daney 2010-02-10 2227
f39878cc5b09c7 Paul Burton 2017-06-02 2228 /*
f39878cc5b09c7 Paul Burton 2017-06-02 2229 * Warn if something may race with us & replace the TLB entry
f39878cc5b09c7 Paul Burton 2017-06-02 2230 * before we read it here. Everything with such races should
f39878cc5b09c7 Paul Burton 2017-06-02 2231 * also have dedicated RiXi exception handlers, so this
f39878cc5b09c7 Paul Burton 2017-06-02 2232 * shouldn't be hit.
f39878cc5b09c7 Paul Burton 2017-06-02 2233 */
f39878cc5b09c7 Paul Burton 2017-06-02 2234 WARN(cpu_has_tlbex_tlbp_race(), "Unhandled race in RiXi path");
f39878cc5b09c7 Paul Burton 2017-06-02 2235
6dd9344cfc41bc David Daney 2010-02-10 2236 uasm_i_tlbr(&p);
73acc7df534ff4 Ralf Baechle 2013-06-20 2237
73acc7df534ff4 Ralf Baechle 2013-06-20 2238 switch (current_cpu_type()) {
73acc7df534ff4 Ralf Baechle 2013-06-20 2239 default:
77f3ee59ee7cfe Leonid Yegoshin 2014-11-24 2240 if (cpu_has_mips_r2_exec_hazard) {
73acc7df534ff4 Ralf Baechle 2013-06-20 2241 uasm_i_ehb(&p);
73acc7df534ff4 Ralf Baechle 2013-06-20 2242
73acc7df534ff4 Ralf Baechle 2013-06-20 @2243 case CPU_CAVIUM_OCTEON:
73acc7df534ff4 Ralf Baechle 2013-06-20 2244 case CPU_CAVIUM_OCTEON_PLUS:
73acc7df534ff4 Ralf Baechle 2013-06-20 2245 case CPU_CAVIUM_OCTEON2:
73acc7df534ff4 Ralf Baechle 2013-06-20 2246 break;
73acc7df534ff4 Ralf Baechle 2013-06-20 2247 }
73acc7df534ff4 Ralf Baechle 2013-06-20 2248 }
73acc7df534ff4 Ralf Baechle 2013-06-20 2249
6dd9344cfc41bc David Daney 2010-02-10 2250 /* Examine entrylo 0 or 1 based on ptr. */
cc33ae43797541 David Daney 2010-12-20 2251 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2252 uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
cc33ae43797541 David Daney 2010-12-20 2253 } else {
bf28607fbe529e David Daney 2011-07-05 2254 uasm_i_andi(&p, wr.r3, wr.r2, sizeof(pte_t));
bf28607fbe529e David Daney 2011-07-05 2255 uasm_i_beqz(&p, wr.r3, 8);
cc33ae43797541 David Daney 2010-12-20 2256 }
bf28607fbe529e David Daney 2011-07-05 2257 /* load it in the delay slot*/
bf28607fbe529e David Daney 2011-07-05 2258 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO0);
bf28607fbe529e David Daney 2011-07-05 2259 /* load it if ptr is odd */
bf28607fbe529e David Daney 2011-07-05 2260 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO1);
6dd9344cfc41bc David Daney 2010-02-10 2261 /*
bf28607fbe529e David Daney 2011-07-05 2262 * If the entryLo (now in wr.r3) is valid (bit 1), RI or
6dd9344cfc41bc David Daney 2010-02-10 2263 * XI must have triggered it.
6dd9344cfc41bc David Daney 2010-02-10 2264 */
cc33ae43797541 David Daney 2010-12-20 2265 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2266 uasm_il_bbit0(&p, &r, wr.r3, 1, label_tlbl_goaround2);
cc33ae43797541 David Daney 2010-12-20 2267 } else {
bf28607fbe529e David Daney 2011-07-05 2268 uasm_i_andi(&p, wr.r3, wr.r3, 2);
bf28607fbe529e David Daney 2011-07-05 2269 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2);
cc33ae43797541 David Daney 2010-12-20 2270 }
0f4ccbc835036c David Daney 2011-09-16 2271 if (PM_DEFAULT_MASK == 0)
0f4ccbc835036c David Daney 2011-09-16 2272 uasm_i_nop(&p);
6dd9344cfc41bc David Daney 2010-02-10 2273 /*
6dd9344cfc41bc David Daney 2010-02-10 2274 * We clobbered C0_PAGEMASK, restore it. On the other branch
6dd9344cfc41bc David Daney 2010-02-10 2275 * it is restored in build_huge_tlb_write_entry.
6dd9344cfc41bc David Daney 2010-02-10 2276 */
bf28607fbe529e David Daney 2011-07-05 2277 build_restore_pagemask(&p, &r, wr.r3, label_nopage_tlbl, 0);
6dd9344cfc41bc David Daney 2010-02-10 2278
6dd9344cfc41bc David Daney 2010-02-10 2279 uasm_l_tlbl_goaround2(&l, p);
6dd9344cfc41bc David Daney 2010-02-10 2280 }
bf28607fbe529e David Daney 2011-07-05 2281 uasm_i_ori(&p, wr.r1, wr.r1, (_PAGE_ACCESSED | _PAGE_VALID));
0115f6cbf26663 Huacai Chen 2017-03-16 2282 build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2, 1);
fd062c847a8cea David Daney 2009-05-27 2283 #endif
fd062c847a8cea David Daney 2009-05-27 2284
e30ec4525d4731 Thiemo Seufer 2008-01-28 2285 uasm_l_nopage_tlbl(&l, p);
e02e07e3127d8a Huacai Chen 2019-01-15 2286 if (IS_ENABLED(CONFIG_CPU_LOONGSON3_WORKAROUNDS))
e02e07e3127d8a Huacai Chen 2019-01-15 2287 uasm_i_sync(&p, 0);
bf28607fbe529e David Daney 2011-07-05 2288 build_restore_work_registers(&p);
2a0b24f56c2492 Steven J. Hill 2013-03-25 2289 #ifdef CONFIG_CPU_MICROMIPS
2a0b24f56c2492 Steven J. Hill 2013-03-25 2290 if ((unsigned long)tlb_do_page_fault_0 & 1) {
2a0b24f56c2492 Steven J. Hill 2013-03-25 2291 uasm_i_lui(&p, K0, uasm_rel_hi((long)tlb_do_page_fault_0));
2a0b24f56c2492 Steven J. Hill 2013-03-25 2292 uasm_i_addiu(&p, K0, K0, uasm_rel_lo((long)tlb_do_page_fault_0));
2a0b24f56c2492 Steven J. Hill 2013-03-25 2293 uasm_i_jr(&p, K0);
2a0b24f56c2492 Steven J. Hill 2013-03-25 2294 } else
2a0b24f56c2492 Steven J. Hill 2013-03-25 2295 #endif
e30ec4525d4731 Thiemo Seufer 2008-01-28 2296 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2297 uasm_i_nop(&p);
^1da177e4c3f41 Linus Torvalds 2005-04-16 2298
4bcb4ad6634ea1 Paul Burton 2018-08-10 2299 if (p >= (u32 *)handle_tlbl_end)
^1da177e4c3f41 Linus Torvalds 2005-04-16 2300 panic("TLB load handler fastpath space exceeded");
^1da177e4c3f41 Linus Torvalds 2005-04-16 2301
e30ec4525d4731 Thiemo Seufer 2008-01-28 2302 uasm_resolve_relocs(relocs, labels);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2303 pr_debug("Wrote TLB load handler fastpath (%u instructions).\n",
4bcb4ad6634ea1 Paul Burton 2018-08-10 2304 (unsigned int)(p - (u32 *)handle_tlbl));
^1da177e4c3f41 Linus Torvalds 2005-04-16 2305
4bcb4ad6634ea1 Paul Burton 2018-08-10 2306 dump_handler("r4000_tlb_load", handle_tlbl, handle_tlbl_end);
^1da177e4c3f41 Linus Torvalds 2005-04-16 2307 }
^1da177e4c3f41 Linus Torvalds 2005-04-16 2308
:::::: The code at line 2243 was first introduced by commit
:::::: 73acc7df534ff458a81435178dab3ea037ed6d78 MIPS: Fix TLBR-use hazards for R2 cores in the TLB reload handlers
:::::: TO: Ralf Baechle <ralf@linux-mips.org>
:::::: CC: Ralf Baechle <ralf@linux-mips.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 39224 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-22 23:51 ` kernel test robot
0 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2021-11-22 23:51 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 19950 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 136057256686de39cc3a07c2e39ef6bc43003ff6
commit: dee2b702bcf067d7b6b62c18bdd060ff0810a800 kconfig: Add support for -Wimplicit-fallthrough
date: 8 days ago
config: mips-randconfig-r016-20211116 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project fbe72e41b99dc7994daac300d208a955be3e4a0a)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install mips cross compiling tool for clang build
# apt-get install binutils-mips-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=dee2b702bcf067d7b6b62c18bdd060ff0810a800
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout dee2b702bcf067d7b6b62c18bdd060ff0810a800
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
case CPU_CAVIUM_OCTEON:
^
arch/mips/mm/tlbex.c:2243:3: note: insert 'break;' to avoid fall-through
case CPU_CAVIUM_OCTEON:
^
break;
arch/mips/mm/tlbex.c:2602:6: warning: no previous prototype for function 'build_tlb_refill_handler' [-Wmissing-prototypes]
void build_tlb_refill_handler(void)
^
arch/mips/mm/tlbex.c:2602:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void build_tlb_refill_handler(void)
^
static
arch/mips/mm/tlbex.c:185:1: warning: unused function 'uasm_l_second_part' [-Wunused-function]
UASM_L_LA(_second_part)
^
arch/mips/include/asm/uasm.h:205:20: note: expanded from macro 'UASM_L_LA'
static inline void uasm_l##lb(struct uasm_label **lab, u32 *addr) \
^
<scratch space>:164:1: note: expanded from here
uasm_l_second_part
^
arch/mips/mm/tlbex.c:197:1: warning: unused function 'uasm_l_r3000_write_probe_fail' [-Wunused-function]
UASM_L_LA(_r3000_write_probe_fail)
^
arch/mips/include/asm/uasm.h:205:20: note: expanded from macro 'UASM_L_LA'
static inline void uasm_l##lb(struct uasm_label **lab, u32 *addr) \
^
<scratch space>:186:1: note: expanded from here
uasm_l_r3000_write_probe_fail
^
4 warnings generated.
vim +2243 arch/mips/mm/tlbex.c
^1da177e4c3f41 Linus Torvalds 2005-04-16 2107
078a55fc824c16 Paul Gortmaker 2013-06-18 2108 static void build_r4000_tlb_load_handler(void)
^1da177e4c3f41 Linus Torvalds 2005-04-16 2109 {
2c0e57eaef3c2b Paul Burton 2016-11-07 2110 u32 *p = (u32 *)msk_isa16_mode((ulong)handle_tlbl);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2111 struct uasm_label *l = labels;
e30ec4525d4731 Thiemo Seufer 2008-01-28 2112 struct uasm_reloc *r = relocs;
bf28607fbe529e David Daney 2011-07-05 2113 struct work_registers wr;
^1da177e4c3f41 Linus Torvalds 2005-04-16 2114
4bcb4ad6634ea1 Paul Burton 2018-08-10 2115 memset(p, 0, handle_tlbl_end - (char *)p);
^1da177e4c3f41 Linus Torvalds 2005-04-16 2116 memset(labels, 0, sizeof(labels));
^1da177e4c3f41 Linus Torvalds 2005-04-16 2117 memset(relocs, 0, sizeof(relocs));
^1da177e4c3f41 Linus Torvalds 2005-04-16 2118
^1da177e4c3f41 Linus Torvalds 2005-04-16 2119 if (bcm1250_m3_war()) {
3d45285dd1ff4d Ralf Baechle 2010-03-23 2120 unsigned int segbits = 44;
3d45285dd1ff4d Ralf Baechle 2010-03-23 2121
3d45285dd1ff4d Ralf Baechle 2010-03-23 2122 uasm_i_dmfc0(&p, K0, C0_BADVADDR);
3d45285dd1ff4d Ralf Baechle 2010-03-23 2123 uasm_i_dmfc0(&p, K1, C0_ENTRYHI);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2124 uasm_i_xor(&p, K0, K0, K1);
3be6022c27ace1 David Daney 2010-04-28 2125 uasm_i_dsrl_safe(&p, K1, K0, 62);
3be6022c27ace1 David Daney 2010-04-28 2126 uasm_i_dsrl_safe(&p, K0, K0, 12 + 1);
3be6022c27ace1 David Daney 2010-04-28 2127 uasm_i_dsll_safe(&p, K0, K0, 64 + 12 + 1 - segbits);
3d45285dd1ff4d Ralf Baechle 2010-03-23 2128 uasm_i_or(&p, K0, K0, K1);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2129 uasm_il_bnez(&p, &r, K0, label_leave);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2130 /* No need for uasm_i_nop */
^1da177e4c3f41 Linus Torvalds 2005-04-16 2131 }
^1da177e4c3f41 Linus Torvalds 2005-04-16 2132
bf28607fbe529e David Daney 2011-07-05 2133 wr = build_r4000_tlbchange_handler_head(&p, &l, &r);
bf28607fbe529e David Daney 2011-07-05 2134 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
8df5beac2aa15b Maciej W. Rozycki 2006-08-23 2135 if (m4kc_tlbp_war())
8df5beac2aa15b Maciej W. Rozycki 2006-08-23 2136 build_tlb_probe_entry(&p);
6dd9344cfc41bc David Daney 2010-02-10 2137
5890f70f15c52d Leonid Yegoshin 2014-07-15 2138 if (cpu_has_rixi && !cpu_has_rixiex) {
6dd9344cfc41bc David Daney 2010-02-10 2139 /*
6dd9344cfc41bc David Daney 2010-02-10 2140 * If the page is not _PAGE_VALID, RI or XI could not
6dd9344cfc41bc David Daney 2010-02-10 2141 * have triggered it. Skip the expensive test..
6dd9344cfc41bc David Daney 2010-02-10 2142 */
cc33ae43797541 David Daney 2010-12-20 2143 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2144 uasm_il_bbit0(&p, &r, wr.r1, ilog2(_PAGE_VALID),
cc33ae43797541 David Daney 2010-12-20 2145 label_tlbl_goaround1);
cc33ae43797541 David Daney 2010-12-20 2146 } else {
bf28607fbe529e David Daney 2011-07-05 2147 uasm_i_andi(&p, wr.r3, wr.r1, _PAGE_VALID);
bf28607fbe529e David Daney 2011-07-05 2148 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround1);
cc33ae43797541 David Daney 2010-12-20 2149 }
6dd9344cfc41bc David Daney 2010-02-10 2150 uasm_i_nop(&p);
6dd9344cfc41bc David Daney 2010-02-10 2151
f39878cc5b09c7 Paul Burton 2017-06-02 2152 /*
f39878cc5b09c7 Paul Burton 2017-06-02 2153 * Warn if something may race with us & replace the TLB entry
f39878cc5b09c7 Paul Burton 2017-06-02 2154 * before we read it here. Everything with such races should
f39878cc5b09c7 Paul Burton 2017-06-02 2155 * also have dedicated RiXi exception handlers, so this
f39878cc5b09c7 Paul Burton 2017-06-02 2156 * shouldn't be hit.
f39878cc5b09c7 Paul Burton 2017-06-02 2157 */
f39878cc5b09c7 Paul Burton 2017-06-02 2158 WARN(cpu_has_tlbex_tlbp_race(), "Unhandled race in RiXi path");
f39878cc5b09c7 Paul Burton 2017-06-02 2159
6dd9344cfc41bc David Daney 2010-02-10 2160 uasm_i_tlbr(&p);
73acc7df534ff4 Ralf Baechle 2013-06-20 2161
73acc7df534ff4 Ralf Baechle 2013-06-20 2162 switch (current_cpu_type()) {
73acc7df534ff4 Ralf Baechle 2013-06-20 2163 default:
77f3ee59ee7cfe Leonid Yegoshin 2014-11-24 2164 if (cpu_has_mips_r2_exec_hazard) {
73acc7df534ff4 Ralf Baechle 2013-06-20 2165 uasm_i_ehb(&p);
bc431d2153cc29 Gustavo A. R. Silva 2021-07-13 2166 fallthrough;
73acc7df534ff4 Ralf Baechle 2013-06-20 2167
73acc7df534ff4 Ralf Baechle 2013-06-20 2168 case CPU_CAVIUM_OCTEON:
73acc7df534ff4 Ralf Baechle 2013-06-20 2169 case CPU_CAVIUM_OCTEON_PLUS:
73acc7df534ff4 Ralf Baechle 2013-06-20 2170 case CPU_CAVIUM_OCTEON2:
73acc7df534ff4 Ralf Baechle 2013-06-20 2171 break;
73acc7df534ff4 Ralf Baechle 2013-06-20 2172 }
73acc7df534ff4 Ralf Baechle 2013-06-20 2173 }
73acc7df534ff4 Ralf Baechle 2013-06-20 2174
6dd9344cfc41bc David Daney 2010-02-10 2175 /* Examine entrylo 0 or 1 based on ptr. */
cc33ae43797541 David Daney 2010-12-20 2176 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2177 uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
cc33ae43797541 David Daney 2010-12-20 2178 } else {
bf28607fbe529e David Daney 2011-07-05 2179 uasm_i_andi(&p, wr.r3, wr.r2, sizeof(pte_t));
bf28607fbe529e David Daney 2011-07-05 2180 uasm_i_beqz(&p, wr.r3, 8);
cc33ae43797541 David Daney 2010-12-20 2181 }
bf28607fbe529e David Daney 2011-07-05 2182 /* load it in the delay slot*/
bf28607fbe529e David Daney 2011-07-05 2183 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO0);
bf28607fbe529e David Daney 2011-07-05 2184 /* load it if ptr is odd */
bf28607fbe529e David Daney 2011-07-05 2185 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO1);
6dd9344cfc41bc David Daney 2010-02-10 2186 /*
bf28607fbe529e David Daney 2011-07-05 2187 * If the entryLo (now in wr.r3) is valid (bit 1), RI or
6dd9344cfc41bc David Daney 2010-02-10 2188 * XI must have triggered it.
6dd9344cfc41bc David Daney 2010-02-10 2189 */
cc33ae43797541 David Daney 2010-12-20 2190 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2191 uasm_il_bbit1(&p, &r, wr.r3, 1, label_nopage_tlbl);
bf28607fbe529e David Daney 2011-07-05 2192 uasm_i_nop(&p);
cc33ae43797541 David Daney 2010-12-20 2193 uasm_l_tlbl_goaround1(&l, p);
cc33ae43797541 David Daney 2010-12-20 2194 } else {
bf28607fbe529e David Daney 2011-07-05 2195 uasm_i_andi(&p, wr.r3, wr.r3, 2);
bf28607fbe529e David Daney 2011-07-05 2196 uasm_il_bnez(&p, &r, wr.r3, label_nopage_tlbl);
bf28607fbe529e David Daney 2011-07-05 2197 uasm_i_nop(&p);
6dd9344cfc41bc David Daney 2010-02-10 2198 }
bf28607fbe529e David Daney 2011-07-05 2199 uasm_l_tlbl_goaround1(&l, p);
cc33ae43797541 David Daney 2010-12-20 2200 }
bbeeffec6f14a0 Paul Burton 2016-04-19 2201 build_make_valid(&p, &r, wr.r1, wr.r2, wr.r3);
bf28607fbe529e David Daney 2011-07-05 2202 build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
^1da177e4c3f41 Linus Torvalds 2005-04-16 2203
aa1762f49c81a1 David Daney 2012-10-17 2204 #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
fd062c847a8cea David Daney 2009-05-27 2205 /*
fd062c847a8cea David Daney 2009-05-27 2206 * This is the entry point when build_r4000_tlbchange_handler_head
fd062c847a8cea David Daney 2009-05-27 2207 * spots a huge page.
fd062c847a8cea David Daney 2009-05-27 2208 */
fd062c847a8cea David Daney 2009-05-27 2209 uasm_l_tlb_huge_update(&l, p);
bf28607fbe529e David Daney 2011-07-05 2210 iPTE_LW(&p, wr.r1, wr.r2);
bf28607fbe529e David Daney 2011-07-05 2211 build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
fd062c847a8cea David Daney 2009-05-27 2212 build_tlb_probe_entry(&p);
6dd9344cfc41bc David Daney 2010-02-10 2213
5890f70f15c52d Leonid Yegoshin 2014-07-15 2214 if (cpu_has_rixi && !cpu_has_rixiex) {
6dd9344cfc41bc David Daney 2010-02-10 2215 /*
6dd9344cfc41bc David Daney 2010-02-10 2216 * If the page is not _PAGE_VALID, RI or XI could not
6dd9344cfc41bc David Daney 2010-02-10 2217 * have triggered it. Skip the expensive test..
6dd9344cfc41bc David Daney 2010-02-10 2218 */
cc33ae43797541 David Daney 2010-12-20 2219 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2220 uasm_il_bbit0(&p, &r, wr.r1, ilog2(_PAGE_VALID),
cc33ae43797541 David Daney 2010-12-20 2221 label_tlbl_goaround2);
cc33ae43797541 David Daney 2010-12-20 2222 } else {
bf28607fbe529e David Daney 2011-07-05 2223 uasm_i_andi(&p, wr.r3, wr.r1, _PAGE_VALID);
bf28607fbe529e David Daney 2011-07-05 2224 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2);
cc33ae43797541 David Daney 2010-12-20 2225 }
6dd9344cfc41bc David Daney 2010-02-10 2226 uasm_i_nop(&p);
6dd9344cfc41bc David Daney 2010-02-10 2227
f39878cc5b09c7 Paul Burton 2017-06-02 2228 /*
f39878cc5b09c7 Paul Burton 2017-06-02 2229 * Warn if something may race with us & replace the TLB entry
f39878cc5b09c7 Paul Burton 2017-06-02 2230 * before we read it here. Everything with such races should
f39878cc5b09c7 Paul Burton 2017-06-02 2231 * also have dedicated RiXi exception handlers, so this
f39878cc5b09c7 Paul Burton 2017-06-02 2232 * shouldn't be hit.
f39878cc5b09c7 Paul Burton 2017-06-02 2233 */
f39878cc5b09c7 Paul Burton 2017-06-02 2234 WARN(cpu_has_tlbex_tlbp_race(), "Unhandled race in RiXi path");
f39878cc5b09c7 Paul Burton 2017-06-02 2235
6dd9344cfc41bc David Daney 2010-02-10 2236 uasm_i_tlbr(&p);
73acc7df534ff4 Ralf Baechle 2013-06-20 2237
73acc7df534ff4 Ralf Baechle 2013-06-20 2238 switch (current_cpu_type()) {
73acc7df534ff4 Ralf Baechle 2013-06-20 2239 default:
77f3ee59ee7cfe Leonid Yegoshin 2014-11-24 2240 if (cpu_has_mips_r2_exec_hazard) {
73acc7df534ff4 Ralf Baechle 2013-06-20 2241 uasm_i_ehb(&p);
73acc7df534ff4 Ralf Baechle 2013-06-20 2242
73acc7df534ff4 Ralf Baechle 2013-06-20 @2243 case CPU_CAVIUM_OCTEON:
73acc7df534ff4 Ralf Baechle 2013-06-20 2244 case CPU_CAVIUM_OCTEON_PLUS:
73acc7df534ff4 Ralf Baechle 2013-06-20 2245 case CPU_CAVIUM_OCTEON2:
73acc7df534ff4 Ralf Baechle 2013-06-20 2246 break;
73acc7df534ff4 Ralf Baechle 2013-06-20 2247 }
73acc7df534ff4 Ralf Baechle 2013-06-20 2248 }
73acc7df534ff4 Ralf Baechle 2013-06-20 2249
6dd9344cfc41bc David Daney 2010-02-10 2250 /* Examine entrylo 0 or 1 based on ptr. */
cc33ae43797541 David Daney 2010-12-20 2251 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2252 uasm_i_bbit0(&p, wr.r2, ilog2(sizeof(pte_t)), 8);
cc33ae43797541 David Daney 2010-12-20 2253 } else {
bf28607fbe529e David Daney 2011-07-05 2254 uasm_i_andi(&p, wr.r3, wr.r2, sizeof(pte_t));
bf28607fbe529e David Daney 2011-07-05 2255 uasm_i_beqz(&p, wr.r3, 8);
cc33ae43797541 David Daney 2010-12-20 2256 }
bf28607fbe529e David Daney 2011-07-05 2257 /* load it in the delay slot*/
bf28607fbe529e David Daney 2011-07-05 2258 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO0);
bf28607fbe529e David Daney 2011-07-05 2259 /* load it if ptr is odd */
bf28607fbe529e David Daney 2011-07-05 2260 UASM_i_MFC0(&p, wr.r3, C0_ENTRYLO1);
6dd9344cfc41bc David Daney 2010-02-10 2261 /*
bf28607fbe529e David Daney 2011-07-05 2262 * If the entryLo (now in wr.r3) is valid (bit 1), RI or
6dd9344cfc41bc David Daney 2010-02-10 2263 * XI must have triggered it.
6dd9344cfc41bc David Daney 2010-02-10 2264 */
cc33ae43797541 David Daney 2010-12-20 2265 if (use_bbit_insns()) {
bf28607fbe529e David Daney 2011-07-05 2266 uasm_il_bbit0(&p, &r, wr.r3, 1, label_tlbl_goaround2);
cc33ae43797541 David Daney 2010-12-20 2267 } else {
bf28607fbe529e David Daney 2011-07-05 2268 uasm_i_andi(&p, wr.r3, wr.r3, 2);
bf28607fbe529e David Daney 2011-07-05 2269 uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2);
cc33ae43797541 David Daney 2010-12-20 2270 }
0f4ccbc835036c David Daney 2011-09-16 2271 if (PM_DEFAULT_MASK == 0)
0f4ccbc835036c David Daney 2011-09-16 2272 uasm_i_nop(&p);
6dd9344cfc41bc David Daney 2010-02-10 2273 /*
6dd9344cfc41bc David Daney 2010-02-10 2274 * We clobbered C0_PAGEMASK, restore it. On the other branch
6dd9344cfc41bc David Daney 2010-02-10 2275 * it is restored in build_huge_tlb_write_entry.
6dd9344cfc41bc David Daney 2010-02-10 2276 */
bf28607fbe529e David Daney 2011-07-05 2277 build_restore_pagemask(&p, &r, wr.r3, label_nopage_tlbl, 0);
6dd9344cfc41bc David Daney 2010-02-10 2278
6dd9344cfc41bc David Daney 2010-02-10 2279 uasm_l_tlbl_goaround2(&l, p);
6dd9344cfc41bc David Daney 2010-02-10 2280 }
bf28607fbe529e David Daney 2011-07-05 2281 uasm_i_ori(&p, wr.r1, wr.r1, (_PAGE_ACCESSED | _PAGE_VALID));
0115f6cbf26663 Huacai Chen 2017-03-16 2282 build_huge_handler_tail(&p, &r, &l, wr.r1, wr.r2, 1);
fd062c847a8cea David Daney 2009-05-27 2283 #endif
fd062c847a8cea David Daney 2009-05-27 2284
e30ec4525d4731 Thiemo Seufer 2008-01-28 2285 uasm_l_nopage_tlbl(&l, p);
e02e07e3127d8a Huacai Chen 2019-01-15 2286 if (IS_ENABLED(CONFIG_CPU_LOONGSON3_WORKAROUNDS))
e02e07e3127d8a Huacai Chen 2019-01-15 2287 uasm_i_sync(&p, 0);
bf28607fbe529e David Daney 2011-07-05 2288 build_restore_work_registers(&p);
2a0b24f56c2492 Steven J. Hill 2013-03-25 2289 #ifdef CONFIG_CPU_MICROMIPS
2a0b24f56c2492 Steven J. Hill 2013-03-25 2290 if ((unsigned long)tlb_do_page_fault_0 & 1) {
2a0b24f56c2492 Steven J. Hill 2013-03-25 2291 uasm_i_lui(&p, K0, uasm_rel_hi((long)tlb_do_page_fault_0));
2a0b24f56c2492 Steven J. Hill 2013-03-25 2292 uasm_i_addiu(&p, K0, K0, uasm_rel_lo((long)tlb_do_page_fault_0));
2a0b24f56c2492 Steven J. Hill 2013-03-25 2293 uasm_i_jr(&p, K0);
2a0b24f56c2492 Steven J. Hill 2013-03-25 2294 } else
2a0b24f56c2492 Steven J. Hill 2013-03-25 2295 #endif
e30ec4525d4731 Thiemo Seufer 2008-01-28 2296 uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2297 uasm_i_nop(&p);
^1da177e4c3f41 Linus Torvalds 2005-04-16 2298
4bcb4ad6634ea1 Paul Burton 2018-08-10 2299 if (p >= (u32 *)handle_tlbl_end)
^1da177e4c3f41 Linus Torvalds 2005-04-16 2300 panic("TLB load handler fastpath space exceeded");
^1da177e4c3f41 Linus Torvalds 2005-04-16 2301
e30ec4525d4731 Thiemo Seufer 2008-01-28 2302 uasm_resolve_relocs(relocs, labels);
e30ec4525d4731 Thiemo Seufer 2008-01-28 2303 pr_debug("Wrote TLB load handler fastpath (%u instructions).\n",
4bcb4ad6634ea1 Paul Burton 2018-08-10 2304 (unsigned int)(p - (u32 *)handle_tlbl));
^1da177e4c3f41 Linus Torvalds 2005-04-16 2305
4bcb4ad6634ea1 Paul Burton 2018-08-10 2306 dump_handler("r4000_tlb_load", handle_tlbl, handle_tlbl_end);
^1da177e4c3f41 Linus Torvalds 2005-04-16 2307 }
^1da177e4c3f41 Linus Torvalds 2005-04-16 2308
:::::: The code at line 2243 was first introduced by commit
:::::: 73acc7df534ff458a81435178dab3ea037ed6d78 MIPS: Fix TLBR-use hazards for R2 cores in the TLB reload handlers
:::::: TO: Ralf Baechle <ralf@linux-mips.org>
:::::: CC: Ralf Baechle <ralf@linux-mips.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 39224 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
2021-11-22 23:51 ` kernel test robot
@ 2021-11-23 0:55 ` Gustavo A. R. Silva
-1 siblings, 0 replies; 18+ messages in thread
From: Gustavo A. R. Silva @ 2021-11-23 0:55 UTC (permalink / raw)
To: kernel test robot
Cc: llvm, kbuild-all, linux-kernel, Kees Cook, Nathan Chancellor
On Tue, Nov 23, 2021 at 07:51:33AM +0800, kernel test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head: 136057256686de39cc3a07c2e39ef6bc43003ff6
> commit: dee2b702bcf067d7b6b62c18bdd060ff0810a800 kconfig: Add support for -Wimplicit-fallthrough
> date: 8 days ago
> config: mips-randconfig-r016-20211116 (attached as .config)
> compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project fbe72e41b99dc7994daac300d208a955be3e4a0a)
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install mips cross compiling tool for clang build
> # apt-get install binutils-mips-linux-gnu
> # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=dee2b702bcf067d7b6b62c18bdd060ff0810a800
> git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> git fetch --no-tags linus master
> git checkout dee2b702bcf067d7b6b62c18bdd060ff0810a800
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=mips
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All warnings (new ones prefixed by >>):
>
> >> arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
> case CPU_CAVIUM_OCTEON:
> ^
> arch/mips/mm/tlbex.c:2243:3: note: insert 'break;' to avoid fall-through
> case CPU_CAVIUM_OCTEON:
> ^
> break;
I already have a patch for this here:
https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?h=for-linus/kspp&id=cd3ed04e7fc365e4e581333c3ff69c8da6ca0e8b
Thanks
--
Gustavo
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-23 0:55 ` Gustavo A. R. Silva
0 siblings, 0 replies; 18+ messages in thread
From: Gustavo A. R. Silva @ 2021-11-23 0:55 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 2024 bytes --]
On Tue, Nov 23, 2021 at 07:51:33AM +0800, kernel test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head: 136057256686de39cc3a07c2e39ef6bc43003ff6
> commit: dee2b702bcf067d7b6b62c18bdd060ff0810a800 kconfig: Add support for -Wimplicit-fallthrough
> date: 8 days ago
> config: mips-randconfig-r016-20211116 (attached as .config)
> compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project fbe72e41b99dc7994daac300d208a955be3e4a0a)
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install mips cross compiling tool for clang build
> # apt-get install binutils-mips-linux-gnu
> # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=dee2b702bcf067d7b6b62c18bdd060ff0810a800
> git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> git fetch --no-tags linus master
> git checkout dee2b702bcf067d7b6b62c18bdd060ff0810a800
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=mips
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All warnings (new ones prefixed by >>):
>
> >> arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
> case CPU_CAVIUM_OCTEON:
> ^
> arch/mips/mm/tlbex.c:2243:3: note: insert 'break;' to avoid fall-through
> case CPU_CAVIUM_OCTEON:
> ^
> break;
I already have a patch for this here:
https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?h=for-linus/kspp&id=cd3ed04e7fc365e4e581333c3ff69c8da6ca0e8b
Thanks
--
Gustavo
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
2021-11-23 0:55 ` Gustavo A. R. Silva
@ 2021-11-23 8:52 ` Joe Perches
-1 siblings, 0 replies; 18+ messages in thread
From: Joe Perches @ 2021-11-23 8:52 UTC (permalink / raw)
To: Gustavo A. R. Silva, kernel test robot
Cc: llvm, kbuild-all, linux-kernel, Kees Cook, Nathan Chancellor
On Mon, 2021-11-22 at 18:55 -0600, Gustavo A. R. Silva wrote:
> On Tue, Nov 23, 2021 at 07:51:33AM +0800, kernel test robot wrote:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> > head: 136057256686de39cc3a07c2e39ef6bc43003ff6
> > commit: dee2b702bcf067d7b6b62c18bdd060ff0810a800 kconfig: Add support for -Wimplicit-fallthrough
> > date: 8 days ago
> > config: mips-randconfig-r016-20211116 (attached as .config)
> > compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project fbe72e41b99dc7994daac300d208a955be3e4a0a)
> > reproduce (this is a W=1 build):
> > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # install mips cross compiling tool for clang build
> > # apt-get install binutils-mips-linux-gnu
> > # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=dee2b702bcf067d7b6b62c18bdd060ff0810a800
> > git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> > git fetch --no-tags linus master
> > git checkout dee2b702bcf067d7b6b62c18bdd060ff0810a800
> > # save the attached .config to linux build tree
> > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=mips
> >
> > If you fix the issue, kindly add following tag as appropriate
> > Reported-by: kernel test robot <lkp@intel.com>
> >
> > All warnings (new ones prefixed by >>):
> >
> > > > arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
> > case CPU_CAVIUM_OCTEON:
> > ^
> > arch/mips/mm/tlbex.c:2243:3: note: insert 'break;' to avoid fall-through
> > case CPU_CAVIUM_OCTEON:
> > ^
> > break;
>
> I already have a patch for this here:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?h=for-linus/kspp&id=cd3ed04e7fc365e4e581333c3ff69c8da6ca0e8b
I think that's very odd looking code because of the braces.
And the fallthrough that you propose is odd as well.
Perhaps this would be better:
---
arch/mips/mm/tlbex.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index b131e6a773832..a873e343d3dc9 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -2236,15 +2236,14 @@ static void build_r4000_tlb_load_handler(void)
uasm_i_tlbr(&p);
switch (current_cpu_type()) {
- default:
- if (cpu_has_mips_r2_exec_hazard) {
- uasm_i_ehb(&p);
-
case CPU_CAVIUM_OCTEON:
case CPU_CAVIUM_OCTEON_PLUS:
case CPU_CAVIUM_OCTEON2:
- break;
- }
+ break;
+ default:
+ if (cpu_has_mips_r2_exec_hazard)
+ uasm_i_ehb(&p);
+ break;
}
/* Examine entrylo 0 or 1 based on ptr. */
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-23 8:52 ` Joe Perches
0 siblings, 0 replies; 18+ messages in thread
From: Joe Perches @ 2021-11-23 8:52 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 3013 bytes --]
On Mon, 2021-11-22 at 18:55 -0600, Gustavo A. R. Silva wrote:
> On Tue, Nov 23, 2021 at 07:51:33AM +0800, kernel test robot wrote:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> > head: 136057256686de39cc3a07c2e39ef6bc43003ff6
> > commit: dee2b702bcf067d7b6b62c18bdd060ff0810a800 kconfig: Add support for -Wimplicit-fallthrough
> > date: 8 days ago
> > config: mips-randconfig-r016-20211116 (attached as .config)
> > compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project fbe72e41b99dc7994daac300d208a955be3e4a0a)
> > reproduce (this is a W=1 build):
> > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # install mips cross compiling tool for clang build
> > # apt-get install binutils-mips-linux-gnu
> > # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=dee2b702bcf067d7b6b62c18bdd060ff0810a800
> > git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> > git fetch --no-tags linus master
> > git checkout dee2b702bcf067d7b6b62c18bdd060ff0810a800
> > # save the attached .config to linux build tree
> > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=mips
> >
> > If you fix the issue, kindly add following tag as appropriate
> > Reported-by: kernel test robot <lkp@intel.com>
> >
> > All warnings (new ones prefixed by >>):
> >
> > > > arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
> > case CPU_CAVIUM_OCTEON:
> > ^
> > arch/mips/mm/tlbex.c:2243:3: note: insert 'break;' to avoid fall-through
> > case CPU_CAVIUM_OCTEON:
> > ^
> > break;
>
> I already have a patch for this here:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?h=for-linus/kspp&id=cd3ed04e7fc365e4e581333c3ff69c8da6ca0e8b
I think that's very odd looking code because of the braces.
And the fallthrough that you propose is odd as well.
Perhaps this would be better:
---
arch/mips/mm/tlbex.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index b131e6a773832..a873e343d3dc9 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -2236,15 +2236,14 @@ static void build_r4000_tlb_load_handler(void)
uasm_i_tlbr(&p);
switch (current_cpu_type()) {
- default:
- if (cpu_has_mips_r2_exec_hazard) {
- uasm_i_ehb(&p);
-
case CPU_CAVIUM_OCTEON:
case CPU_CAVIUM_OCTEON_PLUS:
case CPU_CAVIUM_OCTEON2:
- break;
- }
+ break;
+ default:
+ if (cpu_has_mips_r2_exec_hazard)
+ uasm_i_ehb(&p);
+ break;
}
/* Examine entrylo 0 or 1 based on ptr. */
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
2021-11-23 8:52 ` Joe Perches
@ 2021-11-23 16:50 ` Gustavo A. R. Silva
-1 siblings, 0 replies; 18+ messages in thread
From: Gustavo A. R. Silva @ 2021-11-23 16:50 UTC (permalink / raw)
To: Joe Perches
Cc: kernel test robot, llvm, kbuild-all, linux-kernel, Kees Cook,
Nathan Chancellor
On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
>
> Perhaps this would be better:
Feel free to send a proper patch.
Thanks for the feedback.
--
Gustavo
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-23 16:50 ` Gustavo A. R. Silva
0 siblings, 0 replies; 18+ messages in thread
From: Gustavo A. R. Silva @ 2021-11-23 16:50 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 175 bytes --]
On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
>
> Perhaps this would be better:
Feel free to send a proper patch.
Thanks for the feedback.
--
Gustavo
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
2021-11-23 16:50 ` Gustavo A. R. Silva
@ 2021-11-23 17:25 ` Joe Perches
-1 siblings, 0 replies; 18+ messages in thread
From: Joe Perches @ 2021-11-23 17:25 UTC (permalink / raw)
To: Gustavo A. R. Silva
Cc: kernel test robot, llvm, kbuild-all, linux-kernel, Kees Cook,
Nathan Chancellor
On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> >
> > Perhaps this would be better:
>
> Feel free to send a proper patch.
I commented on your proposed patch.
And I'd prefer you actually look at and improve the code instead
of merely silencing warnings.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-23 17:25 ` Joe Perches
0 siblings, 0 replies; 18+ messages in thread
From: Joe Perches @ 2021-11-23 17:25 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 347 bytes --]
On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> >
> > Perhaps this would be better:
>
> Feel free to send a proper patch.
I commented on your proposed patch.
And I'd prefer you actually look at and improve the code instead
of merely silencing warnings.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
2021-11-23 17:25 ` Joe Perches
@ 2021-11-23 17:56 ` Gustavo A. R. Silva
-1 siblings, 0 replies; 18+ messages in thread
From: Gustavo A. R. Silva @ 2021-11-23 17:56 UTC (permalink / raw)
To: Joe Perches
Cc: kernel test robot, llvm, kbuild-all, linux-kernel, Kees Cook,
Nathan Chancellor
On Tue, Nov 23, 2021 at 09:25:17AM -0800, Joe Perches wrote:
> On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> > On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> > >
> > > Perhaps this would be better:
> >
> > Feel free to send a proper patch.
>
> I commented on your proposed patch.
And I reply giving you an option if you want to proceed.
> And I'd prefer you actually look at and improve the code instead
> of merely silencing warnings.
If this is a matter of preference then I should express my preferences, too.
So, I prefer to give you the opportunity of improving the code and not being
pedantic at the same time. :)
Thanks
--
Gustavo
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-23 17:56 ` Gustavo A. R. Silva
0 siblings, 0 replies; 18+ messages in thread
From: Gustavo A. R. Silva @ 2021-11-23 17:56 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 703 bytes --]
On Tue, Nov 23, 2021 at 09:25:17AM -0800, Joe Perches wrote:
> On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> > On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> > >
> > > Perhaps this would be better:
> >
> > Feel free to send a proper patch.
>
> I commented on your proposed patch.
And I reply giving you an option if you want to proceed.
> And I'd prefer you actually look at and improve the code instead
> of merely silencing warnings.
If this is a matter of preference then I should express my preferences, too.
So, I prefer to give you the opportunity of improving the code and not being
pedantic at the same time. :)
Thanks
--
Gustavo
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
2021-11-23 17:56 ` Gustavo A. R. Silva
@ 2021-11-23 17:59 ` Joe Perches
-1 siblings, 0 replies; 18+ messages in thread
From: Joe Perches @ 2021-11-23 17:59 UTC (permalink / raw)
To: Gustavo A. R. Silva
Cc: kernel test robot, llvm, kbuild-all, linux-kernel, Kees Cook,
Nathan Chancellor
On Tue, 2021-11-23 at 11:56 -0600, Gustavo A. R. Silva wrote:
> On Tue, Nov 23, 2021 at 09:25:17AM -0800, Joe Perches wrote:
> > On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> > > On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> > > >
> > > > Perhaps this would be better:
> > >
> > > Feel free to send a proper patch.
> >
> > I commented on your proposed patch.
>
> And I reply giving you an option if you want to proceed.
>
> > And I'd prefer you actually look at and improve the code instead
> > of merely silencing warnings.
>
> If this is a matter of preference then I should express my preferences, too.
> So, I prefer to give you the opportunity of improving the code and not being
> pedantic at the same time. :)
It appears to be difficult to give you suggestions on how to improve
what you do.
cheers, Joe
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-23 17:59 ` Joe Perches
0 siblings, 0 replies; 18+ messages in thread
From: Joe Perches @ 2021-11-23 17:59 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 878 bytes --]
On Tue, 2021-11-23 at 11:56 -0600, Gustavo A. R. Silva wrote:
> On Tue, Nov 23, 2021 at 09:25:17AM -0800, Joe Perches wrote:
> > On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> > > On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> > > >
> > > > Perhaps this would be better:
> > >
> > > Feel free to send a proper patch.
> >
> > I commented on your proposed patch.
>
> And I reply giving you an option if you want to proceed.
>
> > And I'd prefer you actually look at and improve the code instead
> > of merely silencing warnings.
>
> If this is a matter of preference then I should express my preferences, too.
> So, I prefer to give you the opportunity of improving the code and not being
> pedantic at the same time. :)
It appears to be difficult to give you suggestions on how to improve
what you do.
cheers, Joe
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
2021-11-23 17:59 ` Joe Perches
@ 2021-11-23 18:16 ` Gustavo A. R. Silva
-1 siblings, 0 replies; 18+ messages in thread
From: Gustavo A. R. Silva @ 2021-11-23 18:16 UTC (permalink / raw)
To: Joe Perches
Cc: kernel test robot, llvm, kbuild-all, linux-kernel, Kees Cook,
Nathan Chancellor
On Tue, Nov 23, 2021 at 09:59:58AM -0800, Joe Perches wrote:
> On Tue, 2021-11-23 at 11:56 -0600, Gustavo A. R. Silva wrote:
> > On Tue, Nov 23, 2021 at 09:25:17AM -0800, Joe Perches wrote:
> > > On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> > > > On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> > > > >
> > > > > Perhaps this would be better:
> > > >
> > > > Feel free to send a proper patch.
> > >
> > > I commented on your proposed patch.
> >
> > And I reply giving you an option if you want to proceed.
> >
> > > And I'd prefer you actually look at and improve the code instead
> > > of merely silencing warnings.
> >
> > If this is a matter of preference then I should express my preferences, too.
> > So, I prefer to give you the opportunity of improving the code and not being
> > pedantic at the same time. :)
>
> It appears to be difficult to give you suggestions on how to improve
> what you do.
No; that's appreciated.
What I suggest you to improve is how you communicate it, and to take
into account a "Feel free to send a proper patch."
Thanks
--
Gustavo
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-23 18:16 ` Gustavo A. R. Silva
0 siblings, 0 replies; 18+ messages in thread
From: Gustavo A. R. Silva @ 2021-11-23 18:16 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1139 bytes --]
On Tue, Nov 23, 2021 at 09:59:58AM -0800, Joe Perches wrote:
> On Tue, 2021-11-23 at 11:56 -0600, Gustavo A. R. Silva wrote:
> > On Tue, Nov 23, 2021 at 09:25:17AM -0800, Joe Perches wrote:
> > > On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> > > > On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> > > > >
> > > > > Perhaps this would be better:
> > > >
> > > > Feel free to send a proper patch.
> > >
> > > I commented on your proposed patch.
> >
> > And I reply giving you an option if you want to proceed.
> >
> > > And I'd prefer you actually look at and improve the code instead
> > > of merely silencing warnings.
> >
> > If this is a matter of preference then I should express my preferences, too.
> > So, I prefer to give you the opportunity of improving the code and not being
> > pedantic at the same time. :)
>
> It appears to be difficult to give you suggestions on how to improve
> what you do.
No; that's appreciated.
What I suggest you to improve is how you communicate it, and to take
into account a "Feel free to send a proper patch."
Thanks
--
Gustavo
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
2021-11-23 18:16 ` Gustavo A. R. Silva
@ 2021-11-23 18:21 ` Joe Perches
-1 siblings, 0 replies; 18+ messages in thread
From: Joe Perches @ 2021-11-23 18:21 UTC (permalink / raw)
To: Gustavo A. R. Silva
Cc: kernel test robot, llvm, kbuild-all, linux-kernel, Kees Cook,
Nathan Chancellor
On Tue, 2021-11-23 at 12:16 -0600, Gustavo A. R. Silva wrote:
> On Tue, Nov 23, 2021 at 09:59:58AM -0800, Joe Perches wrote:
> > On Tue, 2021-11-23 at 11:56 -0600, Gustavo A. R. Silva wrote:
> > > On Tue, Nov 23, 2021 at 09:25:17AM -0800, Joe Perches wrote:
> > > > On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> > > > > On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> > > > > >
> > > > > > Perhaps this would be better:
> > > > >
> > > > > Feel free to send a proper patch.
> > > >
> > > > I commented on your proposed patch.
> > >
> > > And I reply giving you an option if you want to proceed.
> > >
> > > > And I'd prefer you actually look at and improve the code instead
> > > > of merely silencing warnings.
> > >
> > > If this is a matter of preference then I should express my preferences, too.
> > > So, I prefer to give you the opportunity of improving the code and not being
> > > pedantic at the same time. :)
> >
> > It appears to be difficult to give you suggestions on how to improve
> > what you do.
>
> No; that's appreciated.
> What I suggest you to improve is how you communicate it,
:) Thanks. I'll try.
> and to take into account a "Feel free to send a proper patch."
I'm not much for sending actual patches as when I do I get accusations
of being an excessively trivial patch submitter.
And I prefer to communicate in code where feasible rather than
expand all the code into words. But if you prefer:
The indentation used for the fallthrough addition in your patch is
incorrect.
In addition, the brace location in this code is poor.
There is an unnecessary open and close brace around the default case.
Please remove the unnecessary braces and move the default case to the
more typical end-of-block location of the switch statement.
I believe the diff I posted was more efficient than the text above.
cheers, Joe
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels
@ 2021-11-23 18:21 ` Joe Perches
0 siblings, 0 replies; 18+ messages in thread
From: Joe Perches @ 2021-11-23 18:21 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 1938 bytes --]
On Tue, 2021-11-23 at 12:16 -0600, Gustavo A. R. Silva wrote:
> On Tue, Nov 23, 2021 at 09:59:58AM -0800, Joe Perches wrote:
> > On Tue, 2021-11-23 at 11:56 -0600, Gustavo A. R. Silva wrote:
> > > On Tue, Nov 23, 2021 at 09:25:17AM -0800, Joe Perches wrote:
> > > > On Tue, 2021-11-23 at 10:50 -0600, Gustavo A. R. Silva wrote:
> > > > > On Tue, Nov 23, 2021 at 12:52:30AM -0800, Joe Perches wrote:
> > > > > >
> > > > > > Perhaps this would be better:
> > > > >
> > > > > Feel free to send a proper patch.
> > > >
> > > > I commented on your proposed patch.
> > >
> > > And I reply giving you an option if you want to proceed.
> > >
> > > > And I'd prefer you actually look at and improve the code instead
> > > > of merely silencing warnings.
> > >
> > > If this is a matter of preference then I should express my preferences, too.
> > > So, I prefer to give you the opportunity of improving the code and not being
> > > pedantic at the same time. :)
> >
> > It appears to be difficult to give you suggestions on how to improve
> > what you do.
>
> No; that's appreciated.
> What I suggest you to improve is how you communicate it,
:) Thanks. I'll try.
> and to take into account a "Feel free to send a proper patch."
I'm not much for sending actual patches as when I do I get accusations
of being an excessively trivial patch submitter.
And I prefer to communicate in code where feasible rather than
expand all the code into words. But if you prefer:
The indentation used for the fallthrough addition in your patch is
incorrect.
In addition, the brace location in this code is poor.
There is an unnecessary open and close brace around the default case.
Please remove the unnecessary braces and move the default case to the
more typical end-of-block location of the switch statement.
I believe the diff I posted was more efficient than the text above.
cheers, Joe
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2021-11-24 1:44 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-11-22 23:51 arch/mips/mm/tlbex.c:2243:3: warning: unannotated fall-through between switch labels kernel test robot
2021-11-22 23:51 ` kernel test robot
2021-11-23 0:55 ` Gustavo A. R. Silva
2021-11-23 0:55 ` Gustavo A. R. Silva
2021-11-23 8:52 ` Joe Perches
2021-11-23 8:52 ` Joe Perches
2021-11-23 16:50 ` Gustavo A. R. Silva
2021-11-23 16:50 ` Gustavo A. R. Silva
2021-11-23 17:25 ` Joe Perches
2021-11-23 17:25 ` Joe Perches
2021-11-23 17:56 ` Gustavo A. R. Silva
2021-11-23 17:56 ` Gustavo A. R. Silva
2021-11-23 17:59 ` Joe Perches
2021-11-23 17:59 ` Joe Perches
2021-11-23 18:16 ` Gustavo A. R. Silva
2021-11-23 18:16 ` Gustavo A. R. Silva
2021-11-23 18:21 ` Joe Perches
2021-11-23 18:21 ` Joe Perches
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