[PATCH v2 0/2] irqchip: loongarch-cpu: add DT support

[PATCH v2 0/2] irqchip: loongarch-cpu: add DT support

[Liu Peibao]

This patches add the DT support for LoongArch compatible CPU interrupt
controller.

V1 -> V2: patch2/2: update commit log and remove redundant description in yaml.

Liu Peibao (2):
  irqchip: loongarch-cpu: add DT support
  dt-bindings: interrupt-controller: add yaml for LoongArch CPU
    interrupt controller

 .../loongarch,cpu-interrupt-controller.yaml   | 34 +++++++++++++++++++
 drivers/irqchip/irq-loongarch-cpu.c           | 19 +++++++++++
 2 files changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml

-- 
2.20.1

[PATCH v2 1/2] irqchip: loongarch-cpu: add DT support

[Liu Peibao]

LoongArch is coming to support booting with FDT, so DT
support of this driver is desired.

Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
---
 drivers/irqchip/irq-loongarch-cpu.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/irqchip/irq-loongarch-cpu.c b/drivers/irqchip/irq-loongarch-cpu.c
index 741612ba6a52..a28b7c549654 100644
--- a/drivers/irqchip/irq-loongarch-cpu.c
+++ b/drivers/irqchip/irq-loongarch-cpu.c
@@ -92,6 +92,25 @@ static const struct irq_domain_ops loongarch_cpu_intc_irq_domain_ops = {
 	.xlate = irq_domain_xlate_onecell,
 };
 
+#ifdef CONFIG_OF
+int __init loongarch_cpu_irq_of_init(struct device_node *of_node,
+				struct device_node *parent)
+{
+	cpuintc_handle = of_node_to_fwnode(of_node);
+
+	irq_domain = irq_domain_create_linear(cpuintc_handle, EXCCODE_INT_NUM,
+				&loongarch_cpu_intc_irq_domain_ops, NULL);
+	if (!irq_domain)
+		panic("Failed to add irqdomain for loongarch CPU");
+
+	set_handle_irq(&handle_cpu_irq);
+
+	return 0;
+}
+IRQCHIP_DECLARE(cpu_intc, "loongson,cpu-interrupt-controller",
+					loongarch_cpu_irq_of_init);
+#endif
+
 static int __init
 liointc_parse_madt(union acpi_subtable_headers *header,
 		       const unsigned long end)
-- 
2.20.1

[PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller

[Liu Peibao]

Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
the 14 IRQs are wired to the platform's internal interrupt controller by
devicetree.

Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
---
 .../loongarch,cpu-interrupt-controller.yaml   | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
new file mode 100644
index 000000000000..2a1cf885c99d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LoongArch CPU Interrupt Controller
+
+maintainers:
+  - Liu Peibao <liupeibao@loongson.cn>
+
+properties:
+  compatible:
+    const: loongarch,cpu-interrupt-controller
+
+  '#interrupt-cells':
+    const: 1
+
+  interrupt-controller: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#interrupt-cells'
+  - interrupt-controller
+
+examples:
+  - |
+    interrupt-controller {
+      compatible = "loongarch,cpu-interrupt-controller";
+      #interrupt-cells = <1>;
+      interrupt-controller;
+    };
-- 
2.20.1

Re: [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller

[Krzysztof Kozlowski]

On 14/11/2022 12:38, Liu Peibao wrote:
> Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
> the 14 IRQs are wired to the platform's internal interrupt controller by
> devicetree.
> 
> Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
> ---


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[irqchip: irq/irqchip-next] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller

[irqchip-bot for Liu Peibao]

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     6b2748ada244c7597e9b677a0bdda4e8781a8d8f
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/6b2748ada244c7597e9b677a0bdda4e8781a8d8f
Author:        Liu Peibao <liupeibao@loongson.cn>
AuthorDate:    Mon, 14 Nov 2022 19:38:24 +08:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 26 Nov 2022 11:54:11 

dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller

Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
the 14 IRQs are wired to the platform's internal interrupt controller by
devicetree.

Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221114113824.1880-3-liupeibao@loongson.cn
---
 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
new file mode 100644
index 0000000..2a1cf88
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LoongArch CPU Interrupt Controller
+
+maintainers:
+  - Liu Peibao <liupeibao@loongson.cn>
+
+properties:
+  compatible:
+    const: loongarch,cpu-interrupt-controller
+
+  '#interrupt-cells':
+    const: 1
+
+  interrupt-controller: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#interrupt-cells'
+  - interrupt-controller
+
+examples:
+  - |
+    interrupt-controller {
+      compatible = "loongarch,cpu-interrupt-controller";
+      #interrupt-cells = <1>;
+      interrupt-controller;
+    };

[irqchip: irq/irqchip-next] irqchip: loongarch-cpu: add DT support

[irqchip-bot for Liu Peibao]

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     855d4ca4bdb366aab3d43408b74e02ab629d1d55
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/855d4ca4bdb366aab3d43408b74e02ab629d1d55
Author:        Liu Peibao <liupeibao@loongson.cn>
AuthorDate:    Mon, 14 Nov 2022 19:38:23 +08:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 26 Nov 2022 11:54:11 

irqchip: loongarch-cpu: add DT support

LoongArch is coming to support booting with FDT, so DT
support of this driver is desired.

Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221114113824.1880-2-liupeibao@loongson.cn
---
 drivers/irqchip/irq-loongarch-cpu.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/irqchip/irq-loongarch-cpu.c b/drivers/irqchip/irq-loongarch-cpu.c
index 741612b..a28b7c5 100644
--- a/drivers/irqchip/irq-loongarch-cpu.c
+++ b/drivers/irqchip/irq-loongarch-cpu.c
@@ -92,6 +92,25 @@ static const struct irq_domain_ops loongarch_cpu_intc_irq_domain_ops = {
 	.xlate = irq_domain_xlate_onecell,
 };
 
+#ifdef CONFIG_OF
+int __init loongarch_cpu_irq_of_init(struct device_node *of_node,
+				struct device_node *parent)
+{
+	cpuintc_handle = of_node_to_fwnode(of_node);
+
+	irq_domain = irq_domain_create_linear(cpuintc_handle, EXCCODE_INT_NUM,
+				&loongarch_cpu_intc_irq_domain_ops, NULL);
+	if (!irq_domain)
+		panic("Failed to add irqdomain for loongarch CPU");
+
+	set_handle_irq(&handle_cpu_irq);
+
+	return 0;
+}
+IRQCHIP_DECLARE(cpu_intc, "loongson,cpu-interrupt-controller",
+					loongarch_cpu_irq_of_init);
+#endif
+
 static int __init
 liointc_parse_madt(union acpi_subtable_headers *header,
 		       const unsigned long end)

Re: [PATCH v2 1/2] irqchip: loongarch-cpu: add DT support

[Huacai Chen]

Hi, Peibao and Marc,

I found this patch has merged but lkp report a problem, this can
simply fixed by add "static" before loongarch_cpu_irq_of_init
definition. Since Marc's next branch hasn't been tagged yet, can
Peibao send a new version and Marc rebase it?

Huacai

On Mon, Nov 14, 2022 at 7:38 PM Liu Peibao <liupeibao@loongson.cn> wrote:
>
> LoongArch is coming to support booting with FDT, so DT
> support of this driver is desired.
>
> Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
> ---
>  drivers/irqchip/irq-loongarch-cpu.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>
> diff --git a/drivers/irqchip/irq-loongarch-cpu.c b/drivers/irqchip/irq-loongarch-cpu.c
> index 741612ba6a52..a28b7c549654 100644
> --- a/drivers/irqchip/irq-loongarch-cpu.c
> +++ b/drivers/irqchip/irq-loongarch-cpu.c
> @@ -92,6 +92,25 @@ static const struct irq_domain_ops loongarch_cpu_intc_irq_domain_ops = {
>         .xlate = irq_domain_xlate_onecell,
>  };
>
> +#ifdef CONFIG_OF
> +int __init loongarch_cpu_irq_of_init(struct device_node *of_node,
> +                               struct device_node *parent)
> +{
> +       cpuintc_handle = of_node_to_fwnode(of_node);
> +
> +       irq_domain = irq_domain_create_linear(cpuintc_handle, EXCCODE_INT_NUM,
> +                               &loongarch_cpu_intc_irq_domain_ops, NULL);
> +       if (!irq_domain)
> +               panic("Failed to add irqdomain for loongarch CPU");
> +
> +       set_handle_irq(&handle_cpu_irq);
> +
> +       return 0;
> +}
> +IRQCHIP_DECLARE(cpu_intc, "loongson,cpu-interrupt-controller",
> +                                       loongarch_cpu_irq_of_init);
> +#endif
> +
>  static int __init
>  liointc_parse_madt(union acpi_subtable_headers *header,
>                        const unsigned long end)
> --
> 2.20.1
>

Re: [PATCH v2 1/2] irqchip: loongarch-cpu: add DT support

[Marc Zyngier]

On 2022-12-02 02:07, Huacai Chen wrote:
> Hi, Peibao and Marc,
> 
> I found this patch has merged but lkp report a problem, this can
> simply fixed by add "static" before loongarch_cpu_irq_of_init
> definition. Since Marc's next branch hasn't been tagged yet, can
> Peibao send a new version and Marc rebase it?

Please send in a fix on top of the existing series.

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH v2 1/2] irqchip: loongarch-cpu: add DT support

[Huacai Chen]

On Fri, Dec 2, 2022 at 4:45 PM Marc Zyngier <maz@kernel.org> wrote:
>
> On 2022-12-02 02:07, Huacai Chen wrote:
> > Hi, Peibao and Marc,
> >
> > I found this patch has merged but lkp report a problem, this can
> > simply fixed by add "static" before loongarch_cpu_irq_of_init
> > definition. Since Marc's next branch hasn't been tagged yet, can
> > Peibao send a new version and Marc rebase it?
>
> Please send in a fix on top of the existing series.
OK, I'll send a fix later.

Huacai
>
> Thanks,
>
>          M.
> --
> Jazz is not dead. It just smells funny...

Re: [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller

[Rob Herring]

On Mon, Nov 14, 2022 at 07:38:24PM +0800, Liu Peibao wrote:
> Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
> the 14 IRQs are wired to the platform's internal interrupt controller by
> devicetree.
> 
> Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
> ---
>  .../loongarch,cpu-interrupt-controller.yaml   | 34 +++++++++++++++++++
>  1 file changed, 34 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
> new file mode 100644
> index 000000000000..2a1cf885c99d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
> @@ -0,0 +1,34 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: LoongArch CPU Interrupt Controller
> +
> +maintainers:
> +  - Liu Peibao <liupeibao@loongson.cn>
> +
> +properties:
> +  compatible:
> +    const: loongarch,cpu-interrupt-controller

This doesn't match what the kernel is using. It has loongson rather than 
loongarch. Please send an incremental fix. (Don't forget the example)

Rob

Re: [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller

[Liu Peibao]

On 12/8/22 10:09 AM, Rob Herring wrote:
> On Mon, Nov 14, 2022 at 07:38:24PM +0800, Liu Peibao wrote:
>> Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
>> the 14 IRQs are wired to the platform's internal interrupt controller by
>> devicetree.
>>
>> Signed-off-by: Liu Peibao <liupeibao@loongson.cn>
>> ---
>>  .../loongarch,cpu-interrupt-controller.yaml   | 34 +++++++++++++++++++
>>  1 file changed, 34 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
>> new file mode 100644
>> index 000000000000..2a1cf885c99d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
>> @@ -0,0 +1,34 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: LoongArch CPU Interrupt Controller
>> +
>> +maintainers:
>> +  - Liu Peibao <liupeibao@loongson.cn>
>> +
>> +properties:
>> +  compatible:
>> +    const: loongarch,cpu-interrupt-controller
> 
> This doesn't match what the kernel is using. It has loongson rather than 
> loongarch. Please send an incremental fix. (Don't forget the example)
> 
> Rob
> 

I will send an incremental fix.

It is much embarrassed for my careless.
Thanks! 

BR,
Peibao