From: Robin Murphy <robin.murphy@arm.com>
To: Chukun Pan <amadeus@jmu.edu.cn>
Cc: linux.amoon@gmail.com, heiko@sntech.de, robh+dt@kernel.org,
michael.riesch@wolfvision.net, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a
Date: Wed, 28 Sep 2022 11:37:54 +0100 [thread overview]
Message-ID: <ebb55252-f78b-e988-8a35-c41e6b6d7cda@arm.com> (raw)
In-Reply-To: <20220928100520.3886-1-amadeus@jmu.edu.cn>
On 2022-09-28 11:05, Chukun Pan wrote:
> Hi,
>
> On 27-09-22, 18:47, Robin Murphy wrote:
>
>> (as a side note, is pcie2x1's vpcie3v3-supply as queued in -next
>> actually correct? AFAICS the other socket is effectively powered
>> straight from VCC3V3_SYS so shouldn't have needed VCC3V3_PCIE,
>> but at least it's there now ready for this one)
>
> Thanks for the correction, I didn't notice this before. You are right,
> the supply of pcie2x1 comes from VCC3V3_SYS. But if we change supply
> of pcie2x1 to VCC3V3_SYS, it will cause pcie30phy to fail to initialize
> normally. The error is the same as the following:
>
>> phy phy-fe8c0000.phy.4: rockchip_p3phy_rk3568_init: lock
>> failed 0x6890000, check input refclk and power supply
>> phy phy-fe8c0000.phy.4: phy init failed --> -110
>> rockchip-dw-pcie: probe of 3c0800000.pcie failed with error -110
>
> If both vpcie3v3-supply of pcie2x1 and pcie3x2 use VCC3V3_PCIE like
> the vendor kernel, they can initialized normally.
Presumably that only works because you happen to be probing pcie2x1
first, so it's not robust if that is disabled or probes later.
Looking again, it seems the answer was right there in the error message
all along - the PCIe 3.0 phy wants its external reference clock
describing correctly, and it's *that* clock which depends on
VCC3V3_PI6C_03, which happens to be turned on in parallel with VCC3V3_PCIE.
Cheers,
Robin.
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Chukun Pan <amadeus@jmu.edu.cn>
Cc: linux.amoon@gmail.com, heiko@sntech.de, robh+dt@kernel.org,
michael.riesch@wolfvision.net, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a
Date: Wed, 28 Sep 2022 11:37:54 +0100 [thread overview]
Message-ID: <ebb55252-f78b-e988-8a35-c41e6b6d7cda@arm.com> (raw)
In-Reply-To: <20220928100520.3886-1-amadeus@jmu.edu.cn>
On 2022-09-28 11:05, Chukun Pan wrote:
> Hi,
>
> On 27-09-22, 18:47, Robin Murphy wrote:
>
>> (as a side note, is pcie2x1's vpcie3v3-supply as queued in -next
>> actually correct? AFAICS the other socket is effectively powered
>> straight from VCC3V3_SYS so shouldn't have needed VCC3V3_PCIE,
>> but at least it's there now ready for this one)
>
> Thanks for the correction, I didn't notice this before. You are right,
> the supply of pcie2x1 comes from VCC3V3_SYS. But if we change supply
> of pcie2x1 to VCC3V3_SYS, it will cause pcie30phy to fail to initialize
> normally. The error is the same as the following:
>
>> phy phy-fe8c0000.phy.4: rockchip_p3phy_rk3568_init: lock
>> failed 0x6890000, check input refclk and power supply
>> phy phy-fe8c0000.phy.4: phy init failed --> -110
>> rockchip-dw-pcie: probe of 3c0800000.pcie failed with error -110
>
> If both vpcie3v3-supply of pcie2x1 and pcie3x2 use VCC3V3_PCIE like
> the vendor kernel, they can initialized normally.
Presumably that only works because you happen to be probing pcie2x1
first, so it's not robust if that is disabled or probes later.
Looking again, it seems the answer was right there in the error message
all along - the PCIe 3.0 phy wants its external reference clock
describing correctly, and it's *that* clock which depends on
VCC3V3_PI6C_03, which happens to be turned on in parallel with VCC3V3_PCIE.
Cheers,
Robin.
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Chukun Pan <amadeus@jmu.edu.cn>
Cc: linux.amoon@gmail.com, heiko@sntech.de, robh+dt@kernel.org,
michael.riesch@wolfvision.net, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a
Date: Wed, 28 Sep 2022 11:37:54 +0100 [thread overview]
Message-ID: <ebb55252-f78b-e988-8a35-c41e6b6d7cda@arm.com> (raw)
In-Reply-To: <20220928100520.3886-1-amadeus@jmu.edu.cn>
On 2022-09-28 11:05, Chukun Pan wrote:
> Hi,
>
> On 27-09-22, 18:47, Robin Murphy wrote:
>
>> (as a side note, is pcie2x1's vpcie3v3-supply as queued in -next
>> actually correct? AFAICS the other socket is effectively powered
>> straight from VCC3V3_SYS so shouldn't have needed VCC3V3_PCIE,
>> but at least it's there now ready for this one)
>
> Thanks for the correction, I didn't notice this before. You are right,
> the supply of pcie2x1 comes from VCC3V3_SYS. But if we change supply
> of pcie2x1 to VCC3V3_SYS, it will cause pcie30phy to fail to initialize
> normally. The error is the same as the following:
>
>> phy phy-fe8c0000.phy.4: rockchip_p3phy_rk3568_init: lock
>> failed 0x6890000, check input refclk and power supply
>> phy phy-fe8c0000.phy.4: phy init failed --> -110
>> rockchip-dw-pcie: probe of 3c0800000.pcie failed with error -110
>
> If both vpcie3v3-supply of pcie2x1 and pcie3x2 use VCC3V3_PCIE like
> the vendor kernel, they can initialized normally.
Presumably that only works because you happen to be probing pcie2x1
first, so it's not robust if that is disabled or probes later.
Looking again, it seems the answer was right there in the error message
all along - the PCIe 3.0 phy wants its external reference clock
describing correctly, and it's *that* clock which depends on
VCC3V3_PI6C_03, which happens to be turned on in parallel with VCC3V3_PCIE.
Cheers,
Robin.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-28 10:38 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-26 6:14 [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a Anand Moon
2022-09-26 6:14 ` Anand Moon
2022-09-26 6:14 ` Anand Moon
2022-09-26 18:00 ` Chukun Pan
2022-09-26 18:00 ` Chukun Pan
2022-09-26 18:00 ` Chukun Pan
2022-09-26 18:01 ` [PATCH 1/3] arm64: dts: rockchip: Add regulator suffix to rock-3a Chukun Pan
2022-09-26 18:01 ` Chukun Pan
2022-09-26 18:01 ` Chukun Pan
2022-09-27 5:42 ` Michael Riesch
2022-09-27 5:42 ` Michael Riesch
2022-09-27 5:42 ` Michael Riesch
2022-09-26 18:01 ` [PATCH 2/3] arm64: dts: rockchip: Rename pinctrl label of pcie2x1 on rock-3a Chukun Pan
2022-09-26 18:01 ` Chukun Pan
2022-09-26 18:01 ` Chukun Pan
2022-10-05 7:48 ` Heiko Stübner
2022-10-05 7:48 ` Heiko Stübner
2022-10-05 7:48 ` Heiko Stübner
2022-09-26 18:01 ` [PATCH 3/3] arm64: dts: rockchip: Add PCIe v3 nodes to rock-3a Chukun Pan
2022-09-26 18:01 ` Chukun Pan
2022-09-26 18:01 ` Chukun Pan
2022-09-27 13:46 ` [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a Anand Moon
2022-09-27 13:46 ` Anand Moon
2022-09-27 13:46 ` Anand Moon
2022-09-27 17:47 ` Robin Murphy
2022-09-27 17:47 ` Robin Murphy
2022-09-27 17:47 ` Robin Murphy
2022-09-28 10:05 ` Chukun Pan
2022-09-28 10:05 ` Chukun Pan
2022-09-28 10:05 ` Chukun Pan
2022-09-28 10:37 ` Robin Murphy [this message]
2022-09-28 10:37 ` Robin Murphy
2022-09-28 10:37 ` Robin Murphy
2022-09-27 18:15 ` Chukun Pan
2022-09-27 18:15 ` Chukun Pan
2022-09-27 18:15 ` Chukun Pan
2022-09-27 18:15 ` [PATCH 3/3] arm64: dts: rockchip: Add PCIe v3 nodes to rock-3a Chukun Pan
2022-09-27 18:15 ` Chukun Pan
2022-09-27 18:15 ` Chukun Pan
2022-09-28 11:04 ` [PATCH-next v1] arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a Anand Moon
2022-09-28 11:04 ` Anand Moon
2022-09-28 11:04 ` Anand Moon
2022-09-30 15:25 ` [PATCH 0/1] " Chukun Pan
2022-09-30 15:25 ` Chukun Pan
2022-09-30 15:25 ` Chukun Pan
2022-10-02 15:46 ` Anand Moon
2022-10-02 15:46 ` Anand Moon
2022-10-02 15:46 ` Anand Moon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ebb55252-f78b-e988-8a35-c41e6b6d7cda@arm.com \
--to=robin.murphy@arm.com \
--cc=amadeus@jmu.edu.cn \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=linux.amoon@gmail.com \
--cc=michael.riesch@wolfvision.net \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.