* [Intel-gfx] [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 10:38 ` Mika Kuoppala
0 siblings, 0 replies; 20+ messages in thread
From: Mika Kuoppala @ 2019-10-24 10:38 UTC (permalink / raw)
To: intel-gfx
On testing the whitelists, using any of the nonpriv
flags when trying to access the register offset will lead
to failure.
Define address mask to get the mmio offset in order
to guard against any current and future flag usage.
Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 7 +++++--
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ef02920cec29..54324c6577dc 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -513,6 +513,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
ro_reg = ro_register(reg);
+ /* Clear non priv flags */
+ reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
srm = MI_STORE_REGISTER_MEM;
lrm = MI_LOAD_REGISTER_MEM;
if (INTEL_GEN(ctx->i915) >= 8)
@@ -810,8 +813,8 @@ static int read_whitelisted_registers(struct i915_gem_context *ctx,
u64 offset = results->node.start + sizeof(u32) * i;
u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
- /* Clear access permission field */
- reg &= ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
+ /* Clear non priv flags */
+ reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
*cs++ = srm;
*cs++ = reg;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 855db888516c..3ba503b5e0d9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2490,6 +2490,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define GEN8_RING_CS_GPR_UDW(base, n) _MMIO((base) + 0x600 + (n) * 8 + 4)
#define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
+#define RING_FORCE_TO_NONPRIV_ADDRESS_MASK REG_GENMASK(25, 2)
#define RING_FORCE_TO_NONPRIV_ACCESS_RW (0 << 28) /* CFL+ & Gen11+ */
#define RING_FORCE_TO_NONPRIV_ACCESS_RD (1 << 28)
#define RING_FORCE_TO_NONPRIV_ACCESS_WR (2 << 28)
--
2.17.1
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^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 2/2] drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT
@ 2019-10-24 10:38 ` Mika Kuoppala
0 siblings, 0 replies; 20+ messages in thread
From: Mika Kuoppala @ 2019-10-24 10:38 UTC (permalink / raw)
To: intel-gfx
From: Tapani Pälli <tapani.palli@intel.com>
As with commit 3fe0107e45ab, this change fixes multiple tests that are
using the invocation counts. Documentation doesn't list the workaround
for TGL but applying it fixes the tests.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index af8a8183154a..86ded203b2dd 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1215,6 +1215,26 @@ static void icl_whitelist_build(struct intel_engine_cs *engine)
static void tgl_whitelist_build(struct intel_engine_cs *engine)
{
+ struct i915_wa_list *w = &engine->whitelist;
+
+ switch (engine->class) {
+ case RENDER_CLASS:
+ /*
+ * WaAllowPMDepthAndInvocationCountAccessFromUMD:tgl
+ *
+ * This covers 4 registers which are next to one another :
+ * - PS_INVOCATION_COUNT
+ * - PS_INVOCATION_COUNT_UDW
+ * - PS_DEPTH_COUNT
+ * - PS_DEPTH_COUNT_UDW
+ */
+ whitelist_reg_ext(w, PS_INVOCATION_COUNT,
+ RING_FORCE_TO_NONPRIV_ACCESS_RD |
+ RING_FORCE_TO_NONPRIV_RANGE_4);
+ break;
+ default:
+ break;
+ }
}
void intel_engine_init_whitelist(struct intel_engine_cs *engine)
--
2.17.1
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^ permalink raw reply related [flat|nested] 20+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT
@ 2019-10-24 10:38 ` Mika Kuoppala
0 siblings, 0 replies; 20+ messages in thread
From: Mika Kuoppala @ 2019-10-24 10:38 UTC (permalink / raw)
To: intel-gfx
From: Tapani Pälli <tapani.palli@intel.com>
As with commit 3fe0107e45ab, this change fixes multiple tests that are
using the invocation counts. Documentation doesn't list the workaround
for TGL but applying it fixes the tests.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index af8a8183154a..86ded203b2dd 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1215,6 +1215,26 @@ static void icl_whitelist_build(struct intel_engine_cs *engine)
static void tgl_whitelist_build(struct intel_engine_cs *engine)
{
+ struct i915_wa_list *w = &engine->whitelist;
+
+ switch (engine->class) {
+ case RENDER_CLASS:
+ /*
+ * WaAllowPMDepthAndInvocationCountAccessFromUMD:tgl
+ *
+ * This covers 4 registers which are next to one another :
+ * - PS_INVOCATION_COUNT
+ * - PS_INVOCATION_COUNT_UDW
+ * - PS_DEPTH_COUNT
+ * - PS_DEPTH_COUNT_UDW
+ */
+ whitelist_reg_ext(w, PS_INVOCATION_COUNT,
+ RING_FORCE_TO_NONPRIV_ACCESS_RD |
+ RING_FORCE_TO_NONPRIV_RANGE_4);
+ break;
+ default:
+ break;
+ }
}
void intel_engine_init_whitelist(struct intel_engine_cs *engine)
--
2.17.1
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^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 10:52 ` Lionel Landwerlin
0 siblings, 0 replies; 20+ messages in thread
From: Lionel Landwerlin @ 2019-10-24 10:52 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
On 24/10/2019 13:38, Mika Kuoppala wrote:
> On testing the whitelists, using any of the nonpriv
> flags when trying to access the register offset will lead
> to failure.
>
> Define address mask to get the mmio offset in order
> to guard against any current and future flag usage.
>
> Cc: Tapani Pälli <tapani.palli@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/selftest_workarounds.c | 7 +++++--
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index ef02920cec29..54324c6577dc 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -513,6 +513,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
>
> ro_reg = ro_register(reg);
>
> + /* Clear non priv flags */
> + reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
> +
> srm = MI_STORE_REGISTER_MEM;
> lrm = MI_LOAD_REGISTER_MEM;
> if (INTEL_GEN(ctx->i915) >= 8)
> @@ -810,8 +813,8 @@ static int read_whitelisted_registers(struct i915_gem_context *ctx,
> u64 offset = results->node.start + sizeof(u32) * i;
> u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
>
> - /* Clear access permission field */
> - reg &= ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
> + /* Clear non priv flags */
> + reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
>
> *cs++ = srm;
> *cs++ = reg;
Aren't you missing the scrub_whitelisted_registers() function below?
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 855db888516c..3ba503b5e0d9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2490,6 +2490,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN8_RING_CS_GPR_UDW(base, n) _MMIO((base) + 0x600 + (n) * 8 + 4)
>
> #define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
> +#define RING_FORCE_TO_NONPRIV_ADDRESS_MASK REG_GENMASK(25, 2)
> #define RING_FORCE_TO_NONPRIV_ACCESS_RW (0 << 28) /* CFL+ & Gen11+ */
> #define RING_FORCE_TO_NONPRIV_ACCESS_RD (1 << 28)
> #define RING_FORCE_TO_NONPRIV_ACCESS_WR (2 << 28)
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 10:52 ` Lionel Landwerlin
0 siblings, 0 replies; 20+ messages in thread
From: Lionel Landwerlin @ 2019-10-24 10:52 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
On 24/10/2019 13:38, Mika Kuoppala wrote:
> On testing the whitelists, using any of the nonpriv
> flags when trying to access the register offset will lead
> to failure.
>
> Define address mask to get the mmio offset in order
> to guard against any current and future flag usage.
>
> Cc: Tapani Pälli <tapani.palli@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/selftest_workarounds.c | 7 +++++--
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index ef02920cec29..54324c6577dc 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -513,6 +513,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
>
> ro_reg = ro_register(reg);
>
> + /* Clear non priv flags */
> + reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
> +
> srm = MI_STORE_REGISTER_MEM;
> lrm = MI_LOAD_REGISTER_MEM;
> if (INTEL_GEN(ctx->i915) >= 8)
> @@ -810,8 +813,8 @@ static int read_whitelisted_registers(struct i915_gem_context *ctx,
> u64 offset = results->node.start + sizeof(u32) * i;
> u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
>
> - /* Clear access permission field */
> - reg &= ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
> + /* Clear non priv flags */
> + reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
>
> *cs++ = srm;
> *cs++ = reg;
Aren't you missing the scrub_whitelisted_registers() function below?
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 855db888516c..3ba503b5e0d9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2490,6 +2490,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN8_RING_CS_GPR_UDW(base, n) _MMIO((base) + 0x600 + (n) * 8 + 4)
>
> #define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
> +#define RING_FORCE_TO_NONPRIV_ADDRESS_MASK REG_GENMASK(25, 2)
> #define RING_FORCE_TO_NONPRIV_ACCESS_RW (0 << 28) /* CFL+ & Gen11+ */
> #define RING_FORCE_TO_NONPRIV_ACCESS_RD (1 << 28)
> #define RING_FORCE_TO_NONPRIV_ACCESS_WR (2 << 28)
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 11:03 ` Mika Kuoppala
0 siblings, 0 replies; 20+ messages in thread
From: Mika Kuoppala @ 2019-10-24 11:03 UTC (permalink / raw)
To: intel-gfx
On testing the whitelists, using any of the nonpriv
flags when trying to access the register offset will lead
to failure.
Define address mask to get the mmio offset in order
to guard against any current and future flag usage.
v2: apply also on scrub_whitelisted_registers (Lionel)
Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 10 ++++++++--
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ef02920cec29..abce6e4ec9c0 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -513,6 +513,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
ro_reg = ro_register(reg);
+ /* Clear non priv flags */
+ reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
srm = MI_STORE_REGISTER_MEM;
lrm = MI_LOAD_REGISTER_MEM;
if (INTEL_GEN(ctx->i915) >= 8)
@@ -810,8 +813,8 @@ static int read_whitelisted_registers(struct i915_gem_context *ctx,
u64 offset = results->node.start + sizeof(u32) * i;
u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
- /* Clear access permission field */
- reg &= ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
+ /* Clear non priv flags */
+ reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
*cs++ = srm;
*cs++ = reg;
@@ -849,6 +852,9 @@ static int scrub_whitelisted_registers(struct i915_gem_context *ctx,
if (ro_register(reg))
continue;
+ /* Clear non priv flags */
+ reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
*cs++ = reg;
*cs++ = 0xffffffff;
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 855db888516c..3ba503b5e0d9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2490,6 +2490,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define GEN8_RING_CS_GPR_UDW(base, n) _MMIO((base) + 0x600 + (n) * 8 + 4)
#define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
+#define RING_FORCE_TO_NONPRIV_ADDRESS_MASK REG_GENMASK(25, 2)
#define RING_FORCE_TO_NONPRIV_ACCESS_RW (0 << 28) /* CFL+ & Gen11+ */
#define RING_FORCE_TO_NONPRIV_ACCESS_RD (1 << 28)
#define RING_FORCE_TO_NONPRIV_ACCESS_WR (2 << 28)
--
2.17.1
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^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 11:03 ` Mika Kuoppala
0 siblings, 0 replies; 20+ messages in thread
From: Mika Kuoppala @ 2019-10-24 11:03 UTC (permalink / raw)
To: intel-gfx
On testing the whitelists, using any of the nonpriv
flags when trying to access the register offset will lead
to failure.
Define address mask to get the mmio offset in order
to guard against any current and future flag usage.
v2: apply also on scrub_whitelisted_registers (Lionel)
Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 10 ++++++++--
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ef02920cec29..abce6e4ec9c0 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -513,6 +513,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
ro_reg = ro_register(reg);
+ /* Clear non priv flags */
+ reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
srm = MI_STORE_REGISTER_MEM;
lrm = MI_LOAD_REGISTER_MEM;
if (INTEL_GEN(ctx->i915) >= 8)
@@ -810,8 +813,8 @@ static int read_whitelisted_registers(struct i915_gem_context *ctx,
u64 offset = results->node.start + sizeof(u32) * i;
u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
- /* Clear access permission field */
- reg &= ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
+ /* Clear non priv flags */
+ reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
*cs++ = srm;
*cs++ = reg;
@@ -849,6 +852,9 @@ static int scrub_whitelisted_registers(struct i915_gem_context *ctx,
if (ro_register(reg))
continue;
+ /* Clear non priv flags */
+ reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
*cs++ = reg;
*cs++ = 0xffffffff;
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 855db888516c..3ba503b5e0d9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2490,6 +2490,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define GEN8_RING_CS_GPR_UDW(base, n) _MMIO((base) + 0x600 + (n) * 8 + 4)
#define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
+#define RING_FORCE_TO_NONPRIV_ADDRESS_MASK REG_GENMASK(25, 2)
#define RING_FORCE_TO_NONPRIV_ACCESS_RW (0 << 28) /* CFL+ & Gen11+ */
#define RING_FORCE_TO_NONPRIV_ACCESS_RD (1 << 28)
#define RING_FORCE_TO_NONPRIV_ACCESS_WR (2 << 28)
--
2.17.1
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^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 11:37 ` Chris Wilson
0 siblings, 0 replies; 20+ messages in thread
From: Chris Wilson @ 2019-10-24 11:37 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-10-24 12:03:31)
> On testing the whitelists, using any of the nonpriv
> flags when trying to access the register offset will lead
> to failure.
>
> Define address mask to get the mmio offset in order
> to guard against any current and future flag usage.
>
> v2: apply also on scrub_whitelisted_registers (Lionel)
>
> Cc: Tapani Pälli <tapani.palli@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 11:37 ` Chris Wilson
0 siblings, 0 replies; 20+ messages in thread
From: Chris Wilson @ 2019-10-24 11:37 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2019-10-24 12:03:31)
> On testing the whitelists, using any of the nonpriv
> flags when trying to access the register offset will lead
> to failure.
>
> Define address mask to get the mmio offset in order
> to guard against any current and future flag usage.
>
> v2: apply also on scrub_whitelisted_registers (Lionel)
>
> Cc: Tapani Pälli <tapani.palli@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 15:23 ` Lionel Landwerlin
0 siblings, 0 replies; 20+ messages in thread
From: Lionel Landwerlin @ 2019-10-24 15:23 UTC (permalink / raw)
To: Chris Wilson, Mika Kuoppala, intel-gfx
On 24/10/2019 14:37, Chris Wilson wrote:
> Quoting Mika Kuoppala (2019-10-24 12:03:31)
>> On testing the whitelists, using any of the nonpriv
>> flags when trying to access the register offset will lead
>> to failure.
>>
>> Define address mask to get the mmio offset in order
>> to guard against any current and future flag usage.
>>
>> v2: apply also on scrub_whitelisted_registers (Lionel)
>>
>> Cc: Tapani Pälli <tapani.palli@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> -Chris
>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
_______________________________________________
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 15:23 ` Lionel Landwerlin
0 siblings, 0 replies; 20+ messages in thread
From: Lionel Landwerlin @ 2019-10-24 15:23 UTC (permalink / raw)
To: Chris Wilson, Mika Kuoppala, intel-gfx
On 24/10/2019 14:37, Chris Wilson wrote:
> Quoting Mika Kuoppala (2019-10-24 12:03:31)
>> On testing the whitelists, using any of the nonpriv
>> flags when trying to access the register offset will lead
>> to failure.
>>
>> Define address mask to get the mmio offset in order
>> to guard against any current and future flag usage.
>>
>> v2: apply also on scrub_whitelisted_registers (Lionel)
>>
>> Cc: Tapani Pälli <tapani.palli@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> -Chris
>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 22:36 ` Chris Wilson
0 siblings, 0 replies; 20+ messages in thread
From: Chris Wilson @ 2019-10-24 22:36 UTC (permalink / raw)
To: Lionel Landwerlin, Mika Kuoppala, intel-gfx
Quoting Lionel Landwerlin (2019-10-24 16:23:01)
> On 24/10/2019 14:37, Chris Wilson wrote:
> > Quoting Mika Kuoppala (2019-10-24 12:03:31)
> >> On testing the whitelists, using any of the nonpriv
> >> flags when trying to access the register offset will lead
> >> to failure.
> >>
> >> Define address mask to get the mmio offset in order
> >> to guard against any current and future flag usage.
> >>
> >> v2: apply also on scrub_whitelisted_registers (Lionel)
> >>
> >> Cc: Tapani Pälli <tapani.palli@intel.com>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> >> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> > -Chris
> >
> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
And pushed, thanks for the fixup and the original patch!
-Chris
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Remove nonpriv flags when srm/lrm
@ 2019-10-24 22:36 ` Chris Wilson
0 siblings, 0 replies; 20+ messages in thread
From: Chris Wilson @ 2019-10-24 22:36 UTC (permalink / raw)
To: Lionel Landwerlin, Mika Kuoppala, intel-gfx
Quoting Lionel Landwerlin (2019-10-24 16:23:01)
> On 24/10/2019 14:37, Chris Wilson wrote:
> > Quoting Mika Kuoppala (2019-10-24 12:03:31)
> >> On testing the whitelists, using any of the nonpriv
> >> flags when trying to access the register offset will lead
> >> to failure.
> >>
> >> Define address mask to get the mmio offset in order
> >> to guard against any current and future flag usage.
> >>
> >> v2: apply also on scrub_whitelisted_registers (Lionel)
> >>
> >> Cc: Tapani Pälli <tapani.palli@intel.com>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> >> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> > -Chris
> >
> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
And pushed, thanks for the fixup and the original patch!
-Chris
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2)
@ 2019-10-24 15:29 ` Patchwork
0 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-24 15:29 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2)
URL : https://patchwork.freedesktop.org/series/68506/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
56ea118779e3 drm/i915: Remove nonpriv flags when srm/lrm
b34090d8a268 drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT
-:9: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 3fe0107e45ab ("drm/i915/icl: whitelist PS_(DEPTH|INVOCATION)_COUNT")'
#9:
As with commit 3fe0107e45ab, this change fixes multiple tests that are
total: 1 errors, 0 warnings, 0 checks, 26 lines checked
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^ permalink raw reply [flat|nested] 20+ messages in thread* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2)
@ 2019-10-24 15:29 ` Patchwork
0 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-24 15:29 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2)
URL : https://patchwork.freedesktop.org/series/68506/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
56ea118779e3 drm/i915: Remove nonpriv flags when srm/lrm
b34090d8a268 drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT
-:9: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 3fe0107e45ab ("drm/i915/icl: whitelist PS_(DEPTH|INVOCATION)_COUNT")'
#9:
As with commit 3fe0107e45ab, this change fixes multiple tests that are
total: 1 errors, 0 warnings, 0 checks, 26 lines checked
_______________________________________________
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^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2)
@ 2019-10-24 15:58 ` Patchwork
0 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-24 15:58 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2)
URL : https://patchwork.freedesktop.org/series/68506/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7173 -> Patchwork_14965
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/index.html
Known issues
------------
Here are the changes found in Patchwork_14965 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_tiled_blits@basic:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/fi-icl-u3/igt@gem_tiled_blits@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/fi-icl-u3/igt@gem_tiled_blits@basic.html
* igt@i915_selftest@live_gem_contexts:
- fi-cfl-8109u: [PASS][3] -> [DMESG-FAIL][4] ([fdo#112050 ])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/fi-cfl-8109u/igt@i915_selftest@live_gem_contexts.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/fi-cfl-8109u/igt@i915_selftest@live_gem_contexts.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#111407])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@gem_ctx_create@basic-files:
- {fi-tgl-u2}: [INCOMPLETE][7] ([fdo#111735]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/fi-tgl-u2/igt@gem_ctx_create@basic-files.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/fi-tgl-u2/igt@gem_ctx_create@basic-files.html
- {fi-icl-dsi}: [INCOMPLETE][9] ([fdo#107713] / [fdo#109100]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/fi-icl-dsi/igt@gem_ctx_create@basic-files.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/fi-icl-dsi/igt@gem_ctx_create@basic-files.html
* igt@gem_ctx_switch@legacy-render:
- {fi-icl-guc}: [INCOMPLETE][11] ([fdo#107713] / [fdo#111381]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/fi-icl-guc/igt@gem_ctx_switch@legacy-render.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/fi-icl-guc/igt@gem_ctx_switch@legacy-render.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-icl-u3: [DMESG-WARN][13] ([fdo#107724]) -> [PASS][14] +3 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html
* {igt@i915_selftest@live_gt_heartbeat}:
- fi-kbl-x1275: [DMESG-FAIL][15] ([fdo#112096]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/fi-kbl-x1275/igt@i915_selftest@live_gt_heartbeat.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/fi-kbl-x1275/igt@i915_selftest@live_gt_heartbeat.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
[fdo#112050 ]: https://bugs.freedesktop.org/show_bug.cgi?id=112050
[fdo#112096]: https://bugs.freedesktop.org/show_bug.cgi?id=112096
Participating hosts (52 -> 45)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7173 -> Patchwork_14965
CI-20190529: 20190529
CI_DRM_7173: 0e7609c32df689d5196c3b9e3f820c37dc03b192 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5237: 9a46404de7c42c8cc2d492176e956597ef28d7c4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14965: b34090d8a268a35a792e9a48778be6c0d465589a @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b34090d8a268 drm/i915/tgl: whitelist PS_(DEPTH|INVOCATION)_COUNT
56ea118779e3 drm/i915: Remove nonpriv flags when srm/lrm
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/index.html
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^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2)
@ 2019-10-25 23:17 ` Patchwork
0 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-25 23:17 UTC (permalink / raw)
To: Mika Kuoppala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Remove nonpriv flags when srm/lrm (rev2)
URL : https://patchwork.freedesktop.org/series/68506/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7173_full -> Patchwork_14965_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14965_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_eio@reset-stress:
- {shard-tglb}: [PASS][1] -> [INCOMPLETE][2] +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-tglb5/igt@gem_eio@reset-stress.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-tglb8/igt@gem_eio@reset-stress.html
Known issues
------------
Here are the changes found in Patchwork_14965_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566]) +6 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_isolation@vcs1-none:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) +3 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb1/igt@gem_ctx_isolation@vcs1-none.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb8/igt@gem_ctx_isolation@vcs1-none.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#110854])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb2/igt@gem_exec_balancer@smoke.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb7/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_capture@capture-bsd2:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +11 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb2/igt@gem_exec_capture@capture-bsd2.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb7/igt@gem_exec_capture@capture-bsd2.html
* igt@gem_exec_nop@basic-sequential:
- shard-iclb: [PASS][11] -> [INCOMPLETE][12] ([fdo#107713] / [fdo#110255])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb5/igt@gem_exec_nop@basic-sequential.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb7/igt@gem_exec_nop@basic-sequential.html
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#112080]) +9 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb4/igt@gem_exec_parallel@vcs1-fds.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb5/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#111325]) +3 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_linear_blits@interruptible:
- shard-apl: [PASS][17] -> [INCOMPLETE][18] ([fdo#103927] / [fdo#112067])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-apl2/igt@gem_linear_blits@interruptible.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-apl3/igt@gem_linear_blits@interruptible.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-snb: [PASS][19] -> [DMESG-WARN][20] ([fdo#111870])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-kbl: [PASS][21] -> [SKIP][22] ([fdo#109271])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-kbl3/igt@i915_pm_rc6_residency@rc6-accuracy.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][23] -> [DMESG-WARN][24] ([fdo#108566]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-apl7/igt@i915_suspend@fence-restore-tiled2untiled.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [PASS][25] -> [FAIL][26] ([fdo#108682])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-skl2/igt@kms_color@pipe-a-ctm-0-5.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-skl8/igt@kms_color@pipe-a-ctm-0-5.html
* igt@kms_color@pipe-a-legacy-gamma-reset:
- shard-snb: [PASS][27] -> [SKIP][28] ([fdo#109271]) +3 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-snb1/igt@kms_color@pipe-a-legacy-gamma-reset.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-snb5/igt@kms_color@pipe-a-legacy-gamma-reset.html
* igt@kms_cursor_crc@pipe-a-cursor-64x21-random:
- shard-skl: [PASS][29] -> [FAIL][30] ([fdo#103232])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-skl4/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html
* igt@kms_cursor_crc@pipe-c-cursor-256x85-random:
- shard-iclb: [PASS][31] -> [INCOMPLETE][32] ([fdo#107713])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb2/igt@kms_cursor_crc@pipe-c-cursor-256x85-random.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb7/igt@kms_cursor_crc@pipe-c-cursor-256x85-random.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
- shard-iclb: [PASS][33] -> [FAIL][34] ([fdo#103167]) +5 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][35] -> [FAIL][36] ([fdo#108145])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][37] -> [FAIL][38] ([fdo#108145] / [fdo#110403])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [PASS][39] -> [SKIP][40] ([fdo#109441]) +2 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb6/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-iclb: [PASS][41] -> [INCOMPLETE][42] ([fdo#107713] / [fdo#110026] / [fdo#110040 ])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][43] -> [FAIL][44] ([fdo#99912])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-kbl2/igt@kms_setmode@basic.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-kbl3/igt@kms_setmode@basic.html
#### Possible fixes ####
* igt@gem_ctx_exec@basic-invalid-context-vcs1:
- shard-iclb: [SKIP][45] ([fdo#112080]) -> [PASS][46] +13 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb6/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb1/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
* igt@gem_ctx_isolation@bcs0-s3:
- shard-kbl: [DMESG-WARN][47] ([fdo#103313]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-kbl3/igt@gem_ctx_isolation@bcs0-s3.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-kbl6/igt@gem_ctx_isolation@bcs0-s3.html
* igt@gem_ctx_isolation@vcs0-none:
- {shard-tglb}: [INCOMPLETE][49] -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-tglb8/igt@gem_ctx_isolation@vcs0-none.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-tglb2/igt@gem_ctx_isolation@vcs0-none.html
* igt@gem_ctx_isolation@vcs1-dirty-switch:
- shard-iclb: [SKIP][51] ([fdo#109276] / [fdo#112080]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb7/igt@gem_ctx_isolation@vcs1-dirty-switch.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb2/igt@gem_ctx_isolation@vcs1-dirty-switch.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [SKIP][53] ([fdo#110841]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb5/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [SKIP][55] ([fdo#109276]) -> [PASS][56] +7 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb8/igt@gem_exec_schedule@preempt-contexts-bsd2.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb1/igt@gem_exec_schedule@preempt-contexts-bsd2.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [SKIP][57] ([fdo#111325]) -> [PASS][58] +6 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb5/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [INCOMPLETE][59] ([fdo#104108]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-skl6/igt@gem_softpin@noreloc-s3.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-skl3/igt@gem_softpin@noreloc-s3.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-hsw: [DMESG-WARN][61] ([fdo#111870]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-hsw2/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
* igt@i915_pm_rpm@system-suspend-modeset:
- {shard-tglb}: [INCOMPLETE][63] ([fdo#111832] / [fdo#111850]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-tglb1/igt@i915_pm_rpm@system-suspend-modeset.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-tglb6/igt@i915_pm_rpm@system-suspend-modeset.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-apl: [DMESG-WARN][65] ([fdo#108566]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [FAIL][67] ([fdo#105363]) -> [PASS][68] +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-skl3/igt@kms_flip@flip-vs-expired-vblank.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-skl6/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render:
- shard-iclb: [FAIL][69] ([fdo#103167]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-cpu:
- {shard-tglb}: [INCOMPLETE][71] ([fdo#111884]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-cpu.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [DMESG-WARN][73] ([fdo#108566]) -> [PASS][74] +9 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc:
- {shard-tglb}: [FAIL][75] ([fdo#103167]) -> [PASS][76] +9 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][77] ([fdo#109642] / [fdo#111068]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb7/igt@kms_psr2_su@page_flip.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][79] ([fdo#109441]) -> [PASS][80] +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-apl: [INCOMPLETE][81] ([fdo#103927]) -> [PASS][82] +2 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-apl7/igt@kms_rotation_crc@primary-rotation-270.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-apl6/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_setmode@basic:
- shard-glk: [FAIL][83] ([fdo#99912]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-glk4/igt@kms_setmode@basic.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-glk4/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-d-ts-continuation-suspend:
- {shard-tglb}: [INCOMPLETE][85] ([fdo#111850]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-tglb2/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-tglb4/igt@kms_vblank@pipe-d-ts-continuation-suspend.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][87] ([fdo#111329]) -> [SKIP][88] ([fdo#109276] / [fdo#112080])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb3/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_mocs_settings@mocs-reset-bsd2:
- shard-iclb: [FAIL][89] ([fdo#111330]) -> [SKIP][90] ([fdo#109276])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb8/igt@gem_mocs_settings@mocs-reset-bsd2.html
* igt@gem_mocs_settings@mocs-settings-bsd2:
- shard-iclb: [SKIP][91] ([fdo#109276]) -> [FAIL][92] ([fdo#111330]) +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-iclb8/igt@gem_mocs_settings@mocs-settings-bsd2.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-iclb1/igt@gem_mocs_settings@mocs-settings-bsd2.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-kbl: [DMESG-WARN][93] ([fdo#108566]) -> [INCOMPLETE][94] ([fdo#103665])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7173/shard-kbl7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/shard-kbl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo# 111852 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 111852
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108682]: https://bugs.freedesktop.org/show_bug.cgi?id=108682
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110026]: https://bugs.freedesktop.org/show_bug.cgi?id=110026
[fdo#110040 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110040
[fdo#110255]: https://bugs.freedesktop.org/show_bug.cgi?id=110255
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#111595]: https://bugs.freedeskt
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14965/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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