[PATCH] drm/i915/uc: define GuC and HuC FWs for EHL

[PATCH] drm/i915/uc: define GuC and HuC FWs for EHL

[Daniele Ceraolo Spurio]

First uc firmware release for EHL.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index bd22bf11adad..296a82603be0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -39,12 +39,13 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
  * Must be ordered based on platform + revid, from newer to older.
  */
 #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
-	fw_def(ICELAKE,    0, guc_def(icl, 33, 0, 0), huc_def(icl,  8,  4, 3238)) \
-	fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
-	fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 03, 01, 2893)) \
-	fw_def(KABYLAKE,   0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
-	fw_def(BROXTON,    0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 01,  8, 2893)) \
-	fw_def(SKYLAKE,    0, guc_def(skl, 33, 0, 0), huc_def(skl, 01, 07, 1398))
+	fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl,  9,  0,    0)) \
+	fw_def(ICELAKE,     0, guc_def(icl, 33, 0, 0), huc_def(icl,  8,  4, 3238)) \
+	fw_def(COFFEELAKE,  0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
+	fw_def(GEMINILAKE,  0, guc_def(glk, 33, 0, 0), huc_def(glk, 03, 01, 2893)) \
+	fw_def(KABYLAKE,    0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
+	fw_def(BROXTON,     0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 01,  8, 2893)) \
+	fw_def(SKYLAKE,     0, guc_def(skl, 33, 0, 0), huc_def(skl, 01, 07, 1398))
 
 #define __MAKE_UC_FW_PATH(prefix_, name_, separator_, major_, minor_, patch_) \
 	"i915/" \
-- 
2.22.0

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✓ Fi.CI.BAT: success for drm/i915/uc: define GuC and HuC FWs for EHL

[Patchwork]

== Series Details ==

Series: drm/i915/uc: define GuC and HuC FWs for EHL
URL   : https://patchwork.freedesktop.org/series/65444/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6741 -> Patchwork_14090
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with Patchwork_14090 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14090, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14090:

### IGT changes ###

#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][1] ([fdo#111407]) -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
Known issues
------------

  Here are the changes found in Patchwork_14090 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_execlists:
    - fi-skl-gvtdvm:      [PASS][3] -> [DMESG-FAIL][4] ([fdo#111108])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html

  
#### Possible fixes ####

  * igt@gem_busy@busy-all:
    - fi-icl-u3:          [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/fi-icl-u3/igt@gem_busy@busy-all.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/fi-icl-u3/igt@gem_busy@busy-all.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [INCOMPLETE][7] ([fdo#107718]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@i915_selftest@live_execlists:
    - {fi-icl-guc}:       [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/fi-icl-guc/igt@i915_selftest@live_execlists.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/fi-icl-guc/igt@i915_selftest@live_execlists.html

  * igt@kms_busy@basic-flip-a:
    - fi-kbl-7567u:       [SKIP][11] ([fdo#109271] / [fdo#109278]) -> [PASS][12] +2 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407


Participating hosts (55 -> 45)
------------------------------

  Missing    (10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6741 -> Patchwork_14090

  CI-20190529: 20190529
  CI_DRM_6741: 0db9333be821acadbf8c476e13b160522d252d77 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5141: 7102b417fedc2a1ea6f72d768a9f1bd100a34f13 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14090: 75b6ab1144e67003b025bb8fcf62a4fbbf6331a1 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

75b6ab1144e6 drm/i915/uc: define GuC and HuC FWs for EHL

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/
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Re: [PATCH] drm/i915/uc: define GuC and HuC FWs for EHL

[Summers, Stuart]

[-- Attachment #1.1: Type: text/plain, Size: 2409 bytes --]

On Mon, 2019-08-19 at 18:23 -0700, Daniele Ceraolo Spurio wrote:
> First uc firmware release for EHL.
> 
> Signed-off-by: Daniele Ceraolo Spurio <
> daniele.ceraolospurio@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index bd22bf11adad..296a82603be0 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -39,12 +39,13 @@ void intel_uc_fw_change_status(struct intel_uc_fw
> *uc_fw,
>   * Must be ordered based on platform + revid, from newer to older.
>   */
>  #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
> -	fw_def(ICELAKE,    0, guc_def(icl, 33, 0, 0),
> huc_def(icl,  8,  4, 3238)) \
> -	fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
> 00, 1810)) \
> -	fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 03,
> 01, 2893)) \
> -	fw_def(KABYLAKE,   0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
> 00, 1810)) \
> -	fw_def(BROXTON,    0, guc_def(bxt, 33, 0, 0), huc_def(bxt,
> 01,  8, 2893)) \
> -	fw_def(SKYLAKE,    0, guc_def(skl, 33, 0, 0), huc_def(skl, 01,
> 07, 1398))
> +	fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4),
> huc_def(ehl,  9,  0,    0)) \

Is there a reason you are bumping straight to 33.0.4 for EHL rather
than sticking with the existing firmware version? Or worded
differently, why don't we bump everything to 33.0.4 if we're adding EHL
here to stay in sync between the platforms?

Thanks,
Stuart

> +	fw_def(ICELAKE,     0, guc_def(icl, 33, 0, 0),
> huc_def(icl,  8,  4, 3238)) \
> +	fw_def(COFFEELAKE,  0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
> 00, 1810)) \
> +	fw_def(GEMINILAKE,  0, guc_def(glk, 33, 0, 0), huc_def(glk, 03,
> 01, 2893)) \
> +	fw_def(KABYLAKE,    0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
> 00, 1810)) \
> +	fw_def(BROXTON,     0, guc_def(bxt, 33, 0, 0), huc_def(bxt,
> 01,  8, 2893)) \
> +	fw_def(SKYLAKE,     0, guc_def(skl, 33, 0, 0), huc_def(skl, 01,
> 07, 1398))
>  
>  #define __MAKE_UC_FW_PATH(prefix_, name_, separator_, major_,
> minor_, patch_) \
>  	"i915/" \

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Re: [PATCH] drm/i915/uc: define GuC and HuC FWs for EHL

[Daniele Ceraolo Spurio]

On 8/19/2019 9:25 PM, Summers, Stuart wrote:
> On Mon, 2019-08-19 at 18:23 -0700, Daniele Ceraolo Spurio wrote:
>> First uc firmware release for EHL.
>>
>> Signed-off-by: Daniele Ceraolo Spurio <
>> daniele.ceraolospurio@intel.com>
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +++++++------
>>   1 file changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>> index bd22bf11adad..296a82603be0 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>> @@ -39,12 +39,13 @@ void intel_uc_fw_change_status(struct intel_uc_fw
>> *uc_fw,
>>    * Must be ordered based on platform + revid, from newer to older.
>>    */
>>   #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
>> -	fw_def(ICELAKE,    0, guc_def(icl, 33, 0, 0),
>> huc_def(icl,  8,  4, 3238)) \
>> -	fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
>> 00, 1810)) \
>> -	fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 03,
>> 01, 2893)) \
>> -	fw_def(KABYLAKE,   0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
>> 00, 1810)) \
>> -	fw_def(BROXTON,    0, guc_def(bxt, 33, 0, 0), huc_def(bxt,
>> 01,  8, 2893)) \
>> -	fw_def(SKYLAKE,    0, guc_def(skl, 33, 0, 0), huc_def(skl, 01,
>> 07, 1398))
>> +	fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4),
>> huc_def(ehl,  9,  0,    0)) \
> Is there a reason you are bumping straight to 33.0.4 for EHL rather
> than sticking with the existing firmware version? Or worded
> differently, why don't we bump everything to 33.0.4 if we're adding EHL
> here to stay in sync between the platforms?

33.0.4 is the first release to include an EHL build, so I didn't have 
the choice to stick with 33.0.0 for it, otherwise I would have. As for 
why I didn't update all the other blobs, it was because AFAICS from the 
release notes there are no changes that we need at the moment, mostly 
because the only thing we do with GuC is authenticating HuC and that 
flow is pretty static. All the 33.0.* releases are compatible at the 
interface level so I opted to avoid pushing several more binaries just 
to keep the numbers the same with no real benefit.

As a general point, I think we should expect that the patch number might 
vary across platforms as we get platform-specific features/fixes, but 
major and minor, which indicate the interface version, will be in sync.

Daniele

> Thanks,
> Stuart
>
>> +	fw_def(ICELAKE,     0, guc_def(icl, 33, 0, 0),
>> huc_def(icl,  8,  4, 3238)) \
>> +	fw_def(COFFEELAKE,  0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
>> 00, 1810)) \
>> +	fw_def(GEMINILAKE,  0, guc_def(glk, 33, 0, 0), huc_def(glk, 03,
>> 01, 2893)) \
>> +	fw_def(KABYLAKE,    0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
>> 00, 1810)) \
>> +	fw_def(BROXTON,     0, guc_def(bxt, 33, 0, 0), huc_def(bxt,
>> 01,  8, 2893)) \
>> +	fw_def(SKYLAKE,     0, guc_def(skl, 33, 0, 0), huc_def(skl, 01,
>> 07, 1398))
>>   
>>   #define __MAKE_UC_FW_PATH(prefix_, name_, separator_, major_,
>> minor_, patch_) \
>>   	"i915/" \

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Re: [PATCH] drm/i915/uc: define GuC and HuC FWs for EHL

[Summers, Stuart]

[-- Attachment #1.1: Type: text/plain, Size: 3873 bytes --]

On Mon, 2019-08-19 at 21:59 -0700, Daniele Ceraolo Spurio wrote:
> 
> On 8/19/2019 9:25 PM, Summers, Stuart wrote:
> > On Mon, 2019-08-19 at 18:23 -0700, Daniele Ceraolo Spurio wrote:
> > > First uc firmware release for EHL.
> > > 
> > > Signed-off-by: Daniele Ceraolo Spurio <
> > > daniele.ceraolospurio@intel.com>
> > > Cc: Matt Roper <matthew.d.roper@intel.com>
> > > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +++++++------
> > >   1 file changed, 7 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> > > b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> > > index bd22bf11adad..296a82603be0 100644
> > > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> > > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> > > @@ -39,12 +39,13 @@ void intel_uc_fw_change_status(struct
> > > intel_uc_fw
> > > *uc_fw,
> > >    * Must be ordered based on platform + revid, from newer to
> > > older.
> > >    */
> > >   #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
> > > -	fw_def(ICELAKE,    0, guc_def(icl, 33, 0, 0),
> > > huc_def(icl,  8,  4, 3238)) \
> > > -	fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
> > > 00, 1810)) \
> > > -	fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 03,
> > > 01, 2893)) \
> > > -	fw_def(KABYLAKE,   0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
> > > 00, 1810)) \
> > > -	fw_def(BROXTON,    0, guc_def(bxt, 33, 0, 0), huc_def(bxt,
> > > 01,  8, 2893)) \
> > > -	fw_def(SKYLAKE,    0, guc_def(skl, 33, 0, 0), huc_def(skl, 01,
> > > 07, 1398))
> > > +	fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4),
> > > huc_def(ehl,  9,  0,    0)) \
> > 
> > Is there a reason you are bumping straight to 33.0.4 for EHL rather
> > than sticking with the existing firmware version? Or worded
> > differently, why don't we bump everything to 33.0.4 if we're adding
> > EHL
> > here to stay in sync between the platforms?
> 
> 33.0.4 is the first release to include an EHL build, so I didn't
> have 
> the choice to stick with 33.0.0 for it, otherwise I would have. As
> for 
> why I didn't update all the other blobs, it was because AFAICS from
> the 
> release notes there are no changes that we need at the moment,
> mostly 
> because the only thing we do with GuC is authenticating HuC and that 
> flow is pretty static. All the 33.0.* releases are compatible at the 
> interface level so I opted to avoid pushing several more binaries
> just 
> to keep the numbers the same with no real benefit.
> 
> As a general point, I think we should expect that the patch number
> might 
> vary across platforms as we get platform-specific features/fixes,
> but 
> major and minor, which indicate the interface version, will be in
> sync.

Ok, makes sense and I agree with your reasoning here. You might want
another review from someone with more experience on EHL. Otherwise the
changes look good:
Reviewed-by: Stuart Summers <stuart.summers@intel.com>

> 
> Daniele
> 
> > Thanks,
> > Stuart
> > 
> > > +	fw_def(ICELAKE,     0, guc_def(icl, 33, 0, 0),
> > > huc_def(icl,  8,  4, 3238)) \
> > > +	fw_def(COFFEELAKE,  0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
> > > 00, 1810)) \
> > > +	fw_def(GEMINILAKE,  0, guc_def(glk, 33, 0, 0), huc_def(glk, 03,
> > > 01, 2893)) \
> > > +	fw_def(KABYLAKE,    0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02,
> > > 00, 1810)) \
> > > +	fw_def(BROXTON,     0, guc_def(bxt, 33, 0, 0), huc_def(bxt,
> > > 01,  8, 2893)) \
> > > +	fw_def(SKYLAKE,     0, guc_def(skl, 33, 0, 0), huc_def(skl, 01,
> > > 07, 1398))
> > >   
> > >   #define __MAKE_UC_FW_PATH(prefix_, name_, separator_, major_,
> > > minor_, patch_) \
> > >   	"i915/" \
> 
> 

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✓ Fi.CI.IGT: success for drm/i915/uc: define GuC and HuC FWs for EHL

[Patchwork]

== Series Details ==

Series: drm/i915/uc: define GuC and HuC FWs for EHL
URL   : https://patchwork.freedesktop.org/series/65444/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6741_full -> Patchwork_14090_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_14090_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#111325]) +6 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb7/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@promotion-bsd1:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276]) +16 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb2/igt@gem_exec_schedule@promotion-bsd1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb8/igt@gem_exec_schedule@promotion-bsd1.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-apl:          [PASS][5] -> [DMESG-WARN][6] ([fdo#108566])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [PASS][7] -> [FAIL][8] ([fdo#105767])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-apl:          [PASS][9] -> [FAIL][10] ([fdo#105363])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-apl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-apl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [PASS][11] -> [FAIL][12] ([fdo#103167]) +2 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt:
    - shard-skl:          [PASS][13] -> [FAIL][14] ([fdo#103167])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][15] -> [FAIL][16] ([fdo#108145])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][17] -> [SKIP][18] ([fdo#109642] / [fdo#111068])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb8/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#109441])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb8/igt@kms_psr@psr2_primary_mmap_gtt.html

  
#### Possible fixes ####

  * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd:
    - shard-iclb:         [SKIP][21] ([fdo#111325]) -> [PASS][22] +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb2/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb8/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html

  * igt@gem_mmap_gtt@forked-big-copy:
    - shard-apl:          [INCOMPLETE][23] ([fdo#103927]) -> [PASS][24] +4 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-apl4/igt@gem_mmap_gtt@forked-big-copy.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-apl3/igt@gem_mmap_gtt@forked-big-copy.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [DMESG-WARN][25] ([fdo#108566]) -> [PASS][26] +6 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-apl3/igt@i915_suspend@sysfs-reader.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-apl2/igt@i915_suspend@sysfs-reader.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions:
    - shard-hsw:          [FAIL][27] ([fdo#103355]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-hsw4/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [FAIL][29] ([fdo#102670]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][31] ([fdo#105363]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
    - shard-iclb:         [FAIL][33] ([fdo#103167]) -> [PASS][34] +4 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-skl:          [INCOMPLETE][35] ([fdo#104108]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-skl9/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-skl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][37] ([fdo#108145]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][39] ([fdo#108145] / [fdo#110403]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [FAIL][41] ([fdo#103166]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb1/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [SKIP][43] ([fdo#109441]) -> [PASS][44] +3 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@perf@blocking:
    - shard-skl:          [FAIL][45] ([fdo#110728]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-skl5/igt@perf@blocking.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-skl8/igt@perf@blocking.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][47] ([fdo#109276]) -> [PASS][48] +8 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb7/igt@prime_busy@hang-bsd2.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb2/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][49] ([fdo#109276]) -> [FAIL][50] ([fdo#111329])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [FAIL][51] ([fdo#111330]) -> [SKIP][52] ([fdo#109276])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb7/igt@gem_mocs_settings@mocs-reset-bsd2.html

  * igt@gem_mocs_settings@mocs-settings-bsd2:
    - shard-iclb:         [SKIP][53] ([fdo#109276]) -> [FAIL][54] ([fdo#111330])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6741/shard-iclb3/igt@gem_mocs_settings@mocs-settings-bsd2.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/shard-iclb2/igt@gem_mocs_settings@mocs-settings-bsd2.html

  
  [fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6741 -> Patchwork_14090

  CI-20190529: 20190529
  CI_DRM_6741: 0db9333be821acadbf8c476e13b160522d252d77 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5141: 7102b417fedc2a1ea6f72d768a9f1bd100a34f13 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14090: 75b6ab1144e67003b025bb8fcf62a4fbbf6331a1 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14090/
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Re: [PATCH] drm/i915/uc: define GuC and HuC FWs for EHL

[Matt Roper]

On Mon, Aug 19, 2019 at 06:23:27PM -0700, Daniele Ceraolo Spurio wrote:
> First uc firmware release for EHL.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>

The new firmwares load properly with this patch.

Tested-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index bd22bf11adad..296a82603be0 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -39,12 +39,13 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
>   * Must be ordered based on platform + revid, from newer to older.
>   */
>  #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
> -	fw_def(ICELAKE,    0, guc_def(icl, 33, 0, 0), huc_def(icl,  8,  4, 3238)) \
> -	fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
> -	fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 03, 01, 2893)) \
> -	fw_def(KABYLAKE,   0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
> -	fw_def(BROXTON,    0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 01,  8, 2893)) \
> -	fw_def(SKYLAKE,    0, guc_def(skl, 33, 0, 0), huc_def(skl, 01, 07, 1398))
> +	fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl,  9,  0,    0)) \
> +	fw_def(ICELAKE,     0, guc_def(icl, 33, 0, 0), huc_def(icl,  8,  4, 3238)) \
> +	fw_def(COFFEELAKE,  0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
> +	fw_def(GEMINILAKE,  0, guc_def(glk, 33, 0, 0), huc_def(glk, 03, 01, 2893)) \
> +	fw_def(KABYLAKE,    0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
> +	fw_def(BROXTON,     0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 01,  8, 2893)) \
> +	fw_def(SKYLAKE,     0, guc_def(skl, 33, 0, 0), huc_def(skl, 01, 07, 1398))
>  
>  #define __MAKE_UC_FW_PATH(prefix_, name_, separator_, major_, minor_, patch_) \
>  	"i915/" \
> -- 
> 2.22.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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Re: [PATCH] drm/i915/uc: define GuC and HuC FWs for EHL

[Daniele Ceraolo Spurio]

Thanks for the reviews and the testing, pushed.

Daniele

On 8/19/19 6:23 PM, Daniele Ceraolo Spurio wrote:
> First uc firmware release for EHL.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +++++++------
>   1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index bd22bf11adad..296a82603be0 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -39,12 +39,13 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
>    * Must be ordered based on platform + revid, from newer to older.
>    */
>   #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
> -	fw_def(ICELAKE,    0, guc_def(icl, 33, 0, 0), huc_def(icl,  8,  4, 3238)) \
> -	fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
> -	fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 03, 01, 2893)) \
> -	fw_def(KABYLAKE,   0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
> -	fw_def(BROXTON,    0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 01,  8, 2893)) \
> -	fw_def(SKYLAKE,    0, guc_def(skl, 33, 0, 0), huc_def(skl, 01, 07, 1398))
> +	fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl,  9,  0,    0)) \
> +	fw_def(ICELAKE,     0, guc_def(icl, 33, 0, 0), huc_def(icl,  8,  4, 3238)) \
> +	fw_def(COFFEELAKE,  0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
> +	fw_def(GEMINILAKE,  0, guc_def(glk, 33, 0, 0), huc_def(glk, 03, 01, 2893)) \
> +	fw_def(KABYLAKE,    0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 02, 00, 1810)) \
> +	fw_def(BROXTON,     0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 01,  8, 2893)) \
> +	fw_def(SKYLAKE,     0, guc_def(skl, 33, 0, 0), huc_def(skl, 01, 07, 1398))
>   
>   #define __MAKE_UC_FW_PATH(prefix_, name_, separator_, major_, minor_, patch_) \
>   	"i915/" \
> 
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