* [U-Boot] [PATCH v5 0/5] Add support for reading memory configuration from DT at run-time
@ 2018-07-16 13:37 Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 1/5] lib: fdtdec: Update ram_base to store ram start adddress Michal Simek
` (4 more replies)
0 siblings, 5 replies; 7+ messages in thread
From: Michal Simek @ 2018-07-16 13:37 UTC (permalink / raw)
To: u-boot
Hi,
this is series which was send by Siva. I have just put there missing
Tom's tag which we got and adding more people to TO.
Thanks,
Michal
Changes in v5:
- Add Tom's tag -
https://lists.denx.de/pipermail/u-boot/2018-June/332810.html
- Add Tom's tag -
https://lists.denx.de/pipermail/u-boot/2018-June/332810.html
Changes in v4:
- Rebased on latest master and used
available ram_base
- Separate the rename patch
- Rebased on latest master
- None, rebased on latest master
Changes in v3:
- Used new varibale ram_start
- Rename fdtdec_setup_memory_size
Changes in v2:
- Removed commit reference from description as per comment
- Update memory node as per comment
- Removed intc and fclk as per comment
Siva Durga Prasad Paladugu (5):
lib: fdtdec: Update ram_base to store ram start adddress
lib: fdtdec: Rename routine fdtdec_setup_memory_size()
arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h
arm: zynq: Add Nand flash mini u-boot configuration for zynq
arm: zynq: Add parallel NOR flash mini u-boot configuration for zynq
arch/arm/dts/Makefile | 2 +
arch/arm/dts/zynq-cse-nand.dts | 80 ++++++++++++++++++++
arch/arm/dts/zynq-cse-nor.dts | 88 ++++++++++++++++++++++
arch/arm/mach-mvebu/arm64-common.c | 2 +-
board/emulation/qemu-arm/qemu-arm.c | 2 +-
board/renesas/alt/alt.c | 2 +-
board/renesas/blanche/blanche.c | 2 +-
board/renesas/draak/draak.c | 2 +-
board/renesas/eagle/eagle.c | 2 +-
board/renesas/gose/gose.c | 2 +-
board/renesas/koelsch/koelsch.c | 2 +-
board/renesas/lager/lager.c | 2 +-
board/renesas/porter/porter.c | 2 +-
board/renesas/salvator-x/salvator-x.c | 2 +-
board/renesas/silk/silk.c | 2 +-
board/renesas/stout/stout.c | 2 +-
board/renesas/ulcb/ulcb.c | 2 +-
board/st/stm32f429-discovery/stm32f429-discovery.c | 2 +-
.../st/stm32f429-evaluation/stm32f429-evaluation.c | 2 +-
board/st/stm32f469-discovery/stm32f469-discovery.c | 2 +-
board/st/stm32h743-disco/stm32h743-disco.c | 2 +-
board/st/stm32h743-eval/stm32h743-eval.c | 2 +-
board/xilinx/zynq/board.c | 2 +-
board/xilinx/zynqmp/zynqmp.c | 2 +-
board/xilinx/zynqmp_r5/board.c | 2 +-
common/board_f.c | 4 +-
configs/zynq_cse_nand_defconfig | 50 ++++++++++++
configs/zynq_cse_nor_defconfig | 50 ++++++++++++
include/configs/zynq_cse.h | 3 -
include/fdtdec.h | 16 ++--
lib/fdtdec.c | 3 +-
tools/patman/func_test.py | 2 +-
tools/patman/test/0000-cover-letter.patch | 2 +-
...-cast-for-sandbox-in-fdtdec_setup_memory_.patch | 4 +-
tools/patman/test/test01.txt | 2 +-
35 files changed, 310 insertions(+), 40 deletions(-)
create mode 100644 arch/arm/dts/zynq-cse-nand.dts
create mode 100644 arch/arm/dts/zynq-cse-nor.dts
create mode 100644 configs/zynq_cse_nand_defconfig
create mode 100644 configs/zynq_cse_nor_defconfig
--
1.9.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH v5 1/5] lib: fdtdec: Update ram_base to store ram start adddress
2018-07-16 13:37 [U-Boot] [PATCH v5 0/5] Add support for reading memory configuration from DT at run-time Michal Simek
@ 2018-07-16 13:37 ` Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 2/5] lib: fdtdec: Rename routine fdtdec_setup_memory_size() Michal Simek
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Michal Simek @ 2018-07-16 13:37 UTC (permalink / raw)
To: u-boot
From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
This patch updates the ram_base to store the start address of
the first bank DRAM and the use this ram_base to calculate ram_top
properly. This patch fixes the erroneous calculation of ram_top
incase of non zero ram start address.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
Changes in v5:
- Add Tom's tag -
https://lists.denx.de/pipermail/u-boot/2018-June/332810.html
Changes in v4:
- Rebased on latest master and used
available ram_base
Changes in v3:
- Used new varibale ram_start
- Rename fdtdec_setup_memory_size
Changes in v2: None
common/board_f.c | 4 ++--
lib/fdtdec.c | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index e943347ce3df..88d770071c38 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -281,9 +281,9 @@ static int setup_dest_addr(void)
gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
#endif
#ifdef CONFIG_SYS_SDRAM_BASE
- gd->ram_top = CONFIG_SYS_SDRAM_BASE;
+ gd->ram_base = CONFIG_SYS_SDRAM_BASE;
#endif
- gd->ram_top += get_effective_memsize();
+ gd->ram_top = gd->ram_base + get_effective_memsize();
gd->ram_top = board_get_usable_ram_top(gd->mon_len);
gd->relocaddr = gd->ram_top;
debug("Ram top: %08lX\n", (ulong)gd->ram_top);
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 1b0c430945a9..66dff0f906b7 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1173,6 +1173,7 @@ int fdtdec_setup_memory_size(void)
}
gd->ram_size = (phys_size_t)(res.end - res.start + 1);
+ gd->ram_base = (unsigned long)res.start;
debug("%s: Initial DRAM size %llx\n", __func__,
(unsigned long long)gd->ram_size);
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH v5 2/5] lib: fdtdec: Rename routine fdtdec_setup_memory_size()
2018-07-16 13:37 [U-Boot] [PATCH v5 0/5] Add support for reading memory configuration from DT at run-time Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 1/5] lib: fdtdec: Update ram_base to store ram start adddress Michal Simek
@ 2018-07-16 13:37 ` Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 3/5] arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h Michal Simek
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Michal Simek @ 2018-07-16 13:37 UTC (permalink / raw)
To: u-boot
From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
This patch renames the routine fdtdec_setup_memory_size()
to fdtdec_setup_mem_size_base() as it now fills the
mem base as well along with size.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
Changes in v5:
- Add Tom's tag -
https://lists.denx.de/pipermail/u-boot/2018-June/332810.html
Changes in v4:
- Separate the rename patch
Changes in v3: None
Changes in v2: None
arch/arm/mach-mvebu/arm64-common.c | 2 +-
board/emulation/qemu-arm/qemu-arm.c | 2 +-
board/renesas/alt/alt.c | 2 +-
board/renesas/blanche/blanche.c | 2 +-
board/renesas/draak/draak.c | 2 +-
board/renesas/eagle/eagle.c | 2 +-
board/renesas/gose/gose.c | 2 +-
board/renesas/koelsch/koelsch.c | 2 +-
board/renesas/lager/lager.c | 2 +-
board/renesas/porter/porter.c | 2 +-
board/renesas/salvator-x/salvator-x.c | 2 +-
board/renesas/silk/silk.c | 2 +-
board/renesas/stout/stout.c | 2 +-
board/renesas/ulcb/ulcb.c | 2 +-
board/st/stm32f429-discovery/stm32f429-discovery.c | 2 +-
board/st/stm32f429-evaluation/stm32f429-evaluation.c | 2 +-
board/st/stm32f469-discovery/stm32f469-discovery.c | 2 +-
board/st/stm32h743-disco/stm32h743-disco.c | 2 +-
board/st/stm32h743-eval/stm32h743-eval.c | 2 +-
board/xilinx/zynq/board.c | 2 +-
board/xilinx/zynqmp/zynqmp.c | 2 +-
board/xilinx/zynqmp_r5/board.c | 2 +-
include/fdtdec.h | 16 +++++++++-------
lib/fdtdec.c | 2 +-
tools/patman/func_test.py | 2 +-
tools/patman/test/0000-cover-letter.patch | 2 +-
...orrect-cast-for-sandbox-in-fdtdec_setup_memory_.patch | 4 ++--
tools/patman/test/test01.txt | 2 +-
28 files changed, 37 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index d3ea9e67e07f..f47273fde9c6 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -54,7 +54,7 @@ int dram_init_banksize(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
index 085cbbef994e..1f5a33d520bd 100644
--- a/board/emulation/qemu-arm/qemu-arm.c
+++ b/board/emulation/qemu-arm/qemu-arm.c
@@ -47,7 +47,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index 86e9d2446dcc..b18ab7ce8872 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -78,7 +78,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index 7d48d0faf957..f5ada6e288e9 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -339,7 +339,7 @@ int board_eth_init(bd_t *bis)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index f804fae6eebf..852fdda843c7 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -96,7 +96,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
index 7b89c10cc742..931741007196 100644
--- a/board/renesas/eagle/eagle.c
+++ b/board/renesas/eagle/eagle.c
@@ -74,7 +74,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 96ac29d9ab03..282381ede56f 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -83,7 +83,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index b6688a2cc082..52f37c970e78 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -85,7 +85,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 6bfb0d140489..062e88c19832 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -94,7 +94,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index cadff2cd0230..663b8001ef6b 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -83,7 +83,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 651877cac253..00256bc1a343 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -108,7 +108,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c
index 5fa472ce81b8..966c0717b249 100644
--- a/board/renesas/silk/silk.c
+++ b/board/renesas/silk/silk.c
@@ -78,7 +78,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index 778593b9ba5d..85e30db635f6 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -97,7 +97,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index 9e15e45a3047..213e869ebe66 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -96,7 +96,7 @@ int board_init(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c
index b7638c0f6a91..e800d70f763b 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -29,7 +29,7 @@ int dram_init(void)
return rv;
}
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
rv = -EINVAL;
return rv;
diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
index 2e638c605990..fd2109b27c0f 100644
--- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c
+++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
@@ -23,7 +23,7 @@ int dram_init(void)
return rv;
}
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
rv = -EINVAL;
return rv;
diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c
index 90d7045e9ab7..a457f9095276 100644
--- a/board/st/stm32f469-discovery/stm32f469-discovery.c
+++ b/board/st/stm32f469-discovery/stm32f469-discovery.c
@@ -23,7 +23,7 @@ int dram_init(void)
return rv;
}
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
rv = -EINVAL;
return rv;
diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c
index fa007c79864d..3ab95188048d 100644
--- a/board/st/stm32h743-disco/stm32h743-disco.c
+++ b/board/st/stm32h743-disco/stm32h743-disco.c
@@ -20,7 +20,7 @@ int dram_init(void)
return ret;
}
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
ret = -EINVAL;
return ret;
diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c
index fa007c79864d..3ab95188048d 100644
--- a/board/st/stm32h743-eval/stm32h743-eval.c
+++ b/board/st/stm32h743-eval/stm32h743-eval.c
@@ -20,7 +20,7 @@ int dram_init(void)
return ret;
}
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
ret = -EINVAL;
return ret;
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 9c005e40e895..614d93c082a6 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -98,7 +98,7 @@ int dram_init_banksize(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
zynq_ddrc_init();
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 06cdcbdba6b9..89fac6bb67ca 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -423,7 +423,7 @@ int dram_init_banksize(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/board/xilinx/zynqmp_r5/board.c b/board/xilinx/zynqmp_r5/board.c
index 70fb20235498..1c45ee7196f7 100644
--- a/board/xilinx/zynqmp_r5/board.c
+++ b/board/xilinx/zynqmp_r5/board.c
@@ -18,7 +18,7 @@ int dram_init_banksize(void)
int dram_init(void)
{
- if (fdtdec_setup_memory_size() != 0)
+ if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;
return 0;
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 58d5b721aa60..83be06403d8b 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -957,20 +957,22 @@ int fdtdec_decode_display_timing(const void *blob, int node, int index,
struct display_timing *config);
/**
- * fdtdec_setup_memory_size() - decode and setup gd->ram_size
+ * fdtdec_setup_mem_size_base() - decode and setup gd->ram_size and
+ * gd->ram_start
*
- * Decode the /memory 'reg' property to determine the size of the first memory
- * bank, populate the global data with the size of the first bank of memory.
+ * Decode the /memory 'reg' property to determine the size and start of the
+ * first memory bank, populate the global data with the size and start of the
+ * first bank of memory.
*
* This function should be called from a boards dram_init(). This helper
- * function allows for boards to query the device tree for DRAM size instead of
- * hard coding the value in the case where the memory size cannot be detected
- * automatically.
+ * function allows for boards to query the device tree for DRAM size and start
+ * address instead of hard coding the value in the case where the memory size
+ * and start address cannot be detected automatically.
*
* @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
* invalid
*/
-int fdtdec_setup_memory_size(void);
+int fdtdec_setup_mem_size_base(void);
/**
* fdtdec_setup_memory_banksize() - decode and populate gd->bd->bi_dram
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 66dff0f906b7..c373ddee358d 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1155,7 +1155,7 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index,
return ret;
}
-int fdtdec_setup_memory_size(void)
+int fdtdec_setup_mem_size_base(void)
{
int ret, mem;
struct fdt_resource res;
diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py
index 3f7e03214470..d79e716074b6 100644
--- a/tools/patman/func_test.py
+++ b/tools/patman/func_test.py
@@ -210,7 +210,7 @@ Changes in v4:
Simon Glass (2):
pci: Correct cast for sandbox
- fdt: Correct cast for sandbox in fdtdec_setup_memory_size()
+ fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base()
cmd/pci.c | 3 ++-
fs/fat/fat.c | 1 +
diff --git a/tools/patman/test/0000-cover-letter.patch b/tools/patman/test/0000-cover-letter.patch
index 29062015bc21..c99e635623f3 100644
--- a/tools/patman/test/0000-cover-letter.patch
+++ b/tools/patman/test/0000-cover-letter.patch
@@ -10,7 +10,7 @@ Content-Transfer-Encoding: 8bit
Simon Glass (2):
pci: Correct cast for sandbox
- fdt: Correct cast for sandbox in fdtdec_setup_memory_size()
+ fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base()
cmd/pci.c | 3 ++-
fs/fat/fat.c | 1 +
diff --git a/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_memory_.patch b/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_memory_.patch
index e3284973a0d3..702c0306ffe1 100644
--- a/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_memory_.patch
+++ b/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_memory_.patch
@@ -1,7 +1,7 @@
From 5ab48490f03051875ab13d288a4bf32b507d76fd Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Sat, 15 Apr 2017 15:39:08 -0600
-Subject: [RFC 2/2] fdt: Correct cast for sandbox in fdtdec_setup_memory_size()
+Subject: [RFC 2/2] fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
@@ -58,7 +58,7 @@ diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index c072e54..942244f 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
-@@ -1200,7 +1200,8 @@ int fdtdec_setup_memory_size(void)
+@@ -1200,7 +1200,8 @@ int fdtdec_setup_mem_size_base(void)
}
gd->ram_size = (phys_size_t)(res.end - res.start + 1);
diff --git a/tools/patman/test/test01.txt b/tools/patman/test/test01.txt
index 8ad9587aef53..478ea93674d0 100644
--- a/tools/patman/test/test01.txt
+++ b/tools/patman/test/test01.txt
@@ -28,7 +28,7 @@ commit 5ab48490f03051875ab13d288a4bf32b507d76fd
Author: Simon Glass <sjg@chromium.org>
Date: Sat Apr 15 15:39:08 2017 -0600
- fdt: Correct cast for sandbox in fdtdec_setup_memory_size()
+ fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base()
This gives a warning with some native compilers:
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH v5 3/5] arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h
2018-07-16 13:37 [U-Boot] [PATCH v5 0/5] Add support for reading memory configuration from DT at run-time Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 1/5] lib: fdtdec: Update ram_base to store ram start adddress Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 2/5] lib: fdtdec: Rename routine fdtdec_setup_memory_size() Michal Simek
@ 2018-07-16 13:37 ` Michal Simek
2018-07-19 1:31 ` Simon Glass
2018-07-16 13:37 ` [U-Boot] [PATCH v5 4/5] arm: zynq: Add Nand flash mini u-boot configuration for zynq Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 5/5] arm: zynq: Add parallel NOR " Michal Simek
4 siblings, 1 reply; 7+ messages in thread
From: Michal Simek @ 2018-07-16 13:37 UTC (permalink / raw)
To: u-boot
From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Remove the SDRAM_BASE nad SDRAM_SIZE as it can now get these
details from DT.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Removed commit reference from description as per comment
include/configs/zynq_cse.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h
index 2f5843f9ec31..adc02f0a4a3b 100644
--- a/include/configs/zynq_cse.h
+++ b/include/configs/zynq_cse.h
@@ -41,7 +41,4 @@
#undef CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_MALLOC_LEN 0x1000
-#define CONFIG_SYS_SDRAM_BASE 0xfffc0000
-#define CONFIG_SYS_SDRAM_SIZE 0x40000
-
#endif /* __CONFIG_ZYNQ_CSE_H */
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH v5 4/5] arm: zynq: Add Nand flash mini u-boot configuration for zynq
2018-07-16 13:37 [U-Boot] [PATCH v5 0/5] Add support for reading memory configuration from DT at run-time Michal Simek
` (2 preceding siblings ...)
2018-07-16 13:37 ` [U-Boot] [PATCH v5 3/5] arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h Michal Simek
@ 2018-07-16 13:37 ` Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 5/5] arm: zynq: Add parallel NOR " Michal Simek
4 siblings, 0 replies; 7+ messages in thread
From: Michal Simek @ 2018-07-16 13:37 UTC (permalink / raw)
To: u-boot
From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint of memory. This configuration
has only required nand flash support.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v5: None
Changes in v4:
- Rebased on latest master
Changes in v3: None
Changes in v2:
- Update memory node as per comment
- Removed intc and fclk as per comment
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynq-cse-nand.dts | 80 +++++++++++++++++++++++++++++++++++++++++
configs/zynq_cse_nand_defconfig | 50 ++++++++++++++++++++++++++
3 files changed, 131 insertions(+)
create mode 100644 arch/arm/dts/zynq-cse-nand.dts
create mode 100644 configs/zynq_cse_nand_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 946023093df6..834a19b664e9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-cc108.dtb \
+ zynq-cse-nand.dtb \
zynq-cse-qspi-single.dtb \
zynq-microzed.dtb \
zynq-minized.dtb \
diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts
new file mode 100644
index 000000000000..9b1dd19a85df
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-nand.dts
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE NAND board DTS
+ *
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Zynq CSE NAND Board";
+ compatible = "xlnx,zynq-cse-nand", "xlnx,zynq-7000";
+
+ aliases {
+ serial0 = &dcc;
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x0 0x400000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "disabled";
+ u-boot,dm-pre-reloc;
+ };
+
+ amba: amba {
+ u-boot,dm-pre-reloc;
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ slcr: slcr at f8000000 {
+ u-boot,dm-pre-reloc;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
+ reg = <0xF8000000 0x1000>;
+ ranges;
+ clkc: clkc at 100 {
+ u-boot,dm-pre-reloc;
+ #clock-cells = <1>;
+ compatible = "xlnx,ps7-clkc";
+ clock-output-names = "armpll", "ddrpll",
+ "iopll", "cpu_6or4x",
+ "cpu_3or2x", "cpu_2x", "cpu_1x",
+ "ddr2x", "ddr3x", "dci",
+ "lqspi", "smc", "pcap", "gem0",
+ "gem1", "fclk0", "fclk1",
+ "fclk2", "fclk3", "can0",
+ "can1", "sdio0", "sdio1",
+ "uart0", "uart1", "spi0",
+ "spi1", "dma", "usb0_aper",
+ "usb1_aper", "gem0_aper",
+ "gem1_aper", "sdio0_aper",
+ "sdio1_aper", "spi0_aper",
+ "spi1_aper", "can0_aper",
+ "can1_aper", "i2c0_aper",
+ "i2c1_aper", "uart0_aper",
+ "uart1_aper", "gpio_aper",
+ "lqspi_aper", "smc_aper",
+ "swdt", "dbg_trc", "dbg_apb";
+ reg = <0x100 0x100>;
+ };
+ };
+ };
+
+};
+
+&dcc {
+ status = "okay";
+};
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
new file mode 100644
index 000000000000..7c7e1430c60f
--- /dev/null
+++ b/configs/zynq_cse_nand_defconfig
@@ -0,0 +1,50 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x100000
+CONFIG_SPL_STACK_R_ADDR=0x200000
+CONFIG_SYS_MALLOC_LEN=0x20000
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_PROMPT="Zynq> "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_SPL is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_PARTITIONS is not set
+CONFIG_OF_EMBED=y
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_NAND_ZYNQ=y
+# CONFIG_EFI_LOADER is not set
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH v5 5/5] arm: zynq: Add parallel NOR flash mini u-boot configuration for zynq
2018-07-16 13:37 [U-Boot] [PATCH v5 0/5] Add support for reading memory configuration from DT at run-time Michal Simek
` (3 preceding siblings ...)
2018-07-16 13:37 ` [U-Boot] [PATCH v5 4/5] arm: zynq: Add Nand flash mini u-boot configuration for zynq Michal Simek
@ 2018-07-16 13:37 ` Michal Simek
4 siblings, 0 replies; 7+ messages in thread
From: Michal Simek @ 2018-07-16 13:37 UTC (permalink / raw)
To: u-boot
From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint OCM memory. This configuration
only has required parallel nor flash support.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v5: None
Changes in v4:
- None, rebased on latest master
Changes in v3: None
Changes in v2: None
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynq-cse-nor.dts | 88 ++++++++++++++++++++++++++++++++++++++++++
configs/zynq_cse_nor_defconfig | 50 ++++++++++++++++++++++++
3 files changed, 139 insertions(+)
create mode 100644 arch/arm/dts/zynq-cse-nor.dts
create mode 100644 configs/zynq_cse_nor_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 834a19b664e9..6785fefff52a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -130,6 +130,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-cc108.dtb \
zynq-cse-nand.dtb \
+ zynq-cse-nor.dtb \
zynq-cse-qspi-single.dtb \
zynq-microzed.dtb \
zynq-minized.dtb \
diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts
new file mode 100644
index 000000000000..ba6f9a1a79e3
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-nor.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE NOR board DTS
+ *
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Zynq CSE NOR Board";
+ compatible = "xlnx,zynq-cse-nor", "xlnx,zynq-7000";
+
+ aliases {
+ serial0 = &dcc;
+ };
+
+ memory at fffc0000 {
+ device_type = "memory";
+ reg = <0xFFFC0000 0x40000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "disabled";
+ u-boot,dm-pre-reloc;
+ };
+
+ amba: amba {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+ ranges;
+
+ intc: interrupt-controller at f8f01000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0xF8F01000 0x1000>,
+ <0xF8F00100 0x100>;
+ };
+
+ slcr: slcr at f8000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
+ reg = <0xF8000000 0x1000>;
+ ranges;
+ clkc: clkc at 100 {
+ #clock-cells = <1>;
+ compatible = "xlnx,ps7-clkc";
+ fclk-enable = <0xf>;
+ clock-output-names = "armpll", "ddrpll",
+ "iopll", "cpu_6or4x",
+ "cpu_3or2x", "cpu_2x", "cpu_1x",
+ "ddr2x", "ddr3x", "dci",
+ "lqspi", "smc", "pcap", "gem0",
+ "gem1", "fclk0", "fclk1",
+ "fclk2", "fclk3", "can0",
+ "can1", "sdio0", "sdio1",
+ "uart0", "uart1", "spi0",
+ "spi1", "dma", "usb0_aper",
+ "usb1_aper", "gem0_aper",
+ "gem1_aper", "sdio0_aper",
+ "sdio1_aper", "spi0_aper",
+ "spi1_aper", "can0_aper",
+ "can1_aper", "i2c0_aper",
+ "i2c1_aper", "uart0_aper",
+ "uart1_aper", "gpio_aper",
+ "lqspi_aper", "smc_aper",
+ "swdt", "dbg_trc", "dbg_apb";
+ reg = <0x100 0x100>;
+ };
+ };
+ };
+
+};
+
+&dcc {
+ status = "okay";
+};
diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
new file mode 100644
index 000000000000..842d5206a7a6
--- /dev/null
+++ b/configs/zynq_cse_nor_defconfig
@@ -0,0 +1,50 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0xFFFC0000
+CONFIG_SPL_STACK_R_ADDR=0x200000
+CONFIG_SYS_MALLOC_LEN=0x1000
+CONFIG_ZYNQ_M29EW_WB_HACK=y
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor"
+CONFIG_BOOTDELAY=-1
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_PROMPT="Zynq> "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_SPL is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_PARTITIONS is not set
+CONFIG_OF_EMBED=y
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_MMC is not set
+CONFIG_MTD_NOR_FLASH=y
+# CONFIG_EFI_LOADER is not set
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH v5 3/5] arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h
2018-07-16 13:37 ` [U-Boot] [PATCH v5 3/5] arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h Michal Simek
@ 2018-07-19 1:31 ` Simon Glass
0 siblings, 0 replies; 7+ messages in thread
From: Simon Glass @ 2018-07-19 1:31 UTC (permalink / raw)
To: u-boot
On 16 July 2018 at 07:37, Michal Simek <michal.simek@xilinx.com> wrote:
> From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
>
> Remove the SDRAM_BASE nad SDRAM_SIZE as it can now get these
and
> details from DT.
>
> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - Removed commit reference from description as per comment
>
> include/configs/zynq_cse.h | 3 ---
> 1 file changed, 3 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2018-07-19 1:31 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-16 13:37 [U-Boot] [PATCH v5 0/5] Add support for reading memory configuration from DT at run-time Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 1/5] lib: fdtdec: Update ram_base to store ram start adddress Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 2/5] lib: fdtdec: Rename routine fdtdec_setup_memory_size() Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 3/5] arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h Michal Simek
2018-07-19 1:31 ` Simon Glass
2018-07-16 13:37 ` [U-Boot] [PATCH v5 4/5] arm: zynq: Add Nand flash mini u-boot configuration for zynq Michal Simek
2018-07-16 13:37 ` [U-Boot] [PATCH v5 5/5] arm: zynq: Add parallel NOR " Michal Simek
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