* [PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st_b()
@ 2022-05-04 2:33 nihui
2022-05-04 14:02 ` Richard Henderson
2022-05-30 14:17 ` Philippe Mathieu-Daudé via
0 siblings, 2 replies; 3+ messages in thread
From: nihui @ 2022-05-04 2:33 UTC (permalink / raw)
To: qemu-devel; +Cc: nihui
This patch fix the issue that helper_msa_st_b() write high 64bit
data to where the low 64bit resides, leaving high 64bit undefined.
Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
---
target/mips/tcg/msa_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c
index 4dde5d639a..736283e2af 100644
--- a/target/mips/tcg/msa_helper.c
+++ b/target/mips/tcg/msa_helper.c
@@ -8329,7 +8329,7 @@ void helper_msa_st_b(CPUMIPSState *env, uint32_t wd,
/* Store 8 bytes at a time. Vector element ordering makes this LE. */
cpu_stq_le_data_ra(env, addr + 0, pwd->d[0], ra);
- cpu_stq_le_data_ra(env, addr + 0, pwd->d[1], ra);
+ cpu_stq_le_data_ra(env, addr + 8, pwd->d[1], ra);
}
void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st_b()
2022-05-04 2:33 [PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st_b() nihui
@ 2022-05-04 14:02 ` Richard Henderson
2022-05-30 14:17 ` Philippe Mathieu-Daudé via
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2022-05-04 14:02 UTC (permalink / raw)
To: nihui, qemu-devel, Philippe Mathieu-Daudé
On 5/3/22 19:33, nihui wrote:
> This patch fix the issue that helper_msa_st_b() write high 64bit
> data to where the low 64bit resides, leaving high 64bit undefined.
>
> Signed-off-by: Ni Hui<shuizhuyuanluo@126.com>
> ---
> target/mips/tcg/msa_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st_b()
2022-05-04 2:33 [PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st_b() nihui
2022-05-04 14:02 ` Richard Henderson
@ 2022-05-30 14:17 ` Philippe Mathieu-Daudé via
1 sibling, 0 replies; 3+ messages in thread
From: Philippe Mathieu-Daudé via @ 2022-05-30 14:17 UTC (permalink / raw)
To: nihui, qemu-devel
On 4/5/22 04:33, nihui wrote:
> This patch fix the issue that helper_msa_st_b() write high 64bit
> data to where the low 64bit resides, leaving high 64bit undefined.
>
> Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
> ---
> target/mips/tcg/msa_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c
> index 4dde5d639a..736283e2af 100644
> --- a/target/mips/tcg/msa_helper.c
> +++ b/target/mips/tcg/msa_helper.c
> @@ -8329,7 +8329,7 @@ void helper_msa_st_b(CPUMIPSState *env, uint32_t wd,
>
> /* Store 8 bytes at a time. Vector element ordering makes this LE. */
> cpu_stq_le_data_ra(env, addr + 0, pwd->d[0], ra);
> - cpu_stq_le_data_ra(env, addr + 0, pwd->d[1], ra);
> + cpu_stq_le_data_ra(env, addr + 8, pwd->d[1], ra);
> }
>
> void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,
Fixes: 68ad9260e0 ("target/mips: Use 8-byte memory ops for msa load/store")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Queued to mips-next.
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2022-05-04 2:33 [PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st_b() nihui
2022-05-04 14:02 ` Richard Henderson
2022-05-30 14:17 ` Philippe Mathieu-Daudé via
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