* [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable
@ 2021-01-05 21:13 John.C.Harrison
2021-01-05 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: John.C.Harrison @ 2021-01-05 21:13 UTC (permalink / raw)
To: Intel-GFX
From: John Harrison <John.C.Harrison@Intel.com>
There is a module parameter for controlling what GuC/HuC features are
enabled. Setting to -1 means 'use the default'. However, the default
is not well defined, out of date and needs to be different across
platforms.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 28 ++++++++++++++++++++++--
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 7 +-----
drivers/gpu/drm/i915/i915_params.h | 1 +
3 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 6a0452815c41..2c08db58cf12 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -15,6 +15,29 @@
static const struct intel_uc_ops uc_ops_off;
static const struct intel_uc_ops uc_ops_on;
+static void uc_expand_default_options(struct intel_uc *uc)
+{
+ struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
+
+ if (i915->params.enable_guc != -1)
+ return;
+
+ /* Don't enable GuC/HuC on pre-Gen12 */
+ if (INTEL_GEN(i915) < 12) {
+ i915->params.enable_guc = 0;
+ return;
+ }
+
+ /* Don't enable GuC/HuC on older Gen12 platforms */
+ if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) {
+ i915->params.enable_guc = 0;
+ return;
+ }
+
+ /* Default: enable HuC authentication only */
+ i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
+}
+
/* Reset GuC providing us with fresh state for both GuC and HuC.
*/
static int __intel_uc_reset_hw(struct intel_uc *uc)
@@ -79,8 +102,7 @@ static void __confirm_options(struct intel_uc *uc)
"Incompatible option enable_guc=%d - %s\n",
i915->params.enable_guc, "GuC submission is N/A");
- if (i915->params.enable_guc & ~(ENABLE_GUC_SUBMISSION |
- ENABLE_GUC_LOAD_HUC))
+ if (i915->params.enable_guc & ~ENABLE_GUC_MASK)
drm_info(&i915->drm,
"Incompatible option enable_guc=%d - %s\n",
i915->params.enable_guc, "undocumented flag");
@@ -88,6 +110,8 @@ static void __confirm_options(struct intel_uc *uc)
void intel_uc_init_early(struct intel_uc *uc)
{
+ uc_expand_default_options(uc);
+
intel_guc_init_early(&uc->guc);
intel_huc_init_early(&uc->huc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 602f1a0bc587..67b06fde1225 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -152,16 +152,11 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
uc_fw->path = NULL;
}
}
-
- /* We don't want to enable GuC/HuC on pre-Gen11 by default */
- if (i915->params.enable_guc == -1 && p < INTEL_ICELAKE)
- uc_fw->path = NULL;
}
static const char *__override_guc_firmware_path(struct drm_i915_private *i915)
{
- if (i915->params.enable_guc & (ENABLE_GUC_SUBMISSION |
- ENABLE_GUC_LOAD_HUC))
+ if (i915->params.enable_guc & ENABLE_GUC_MASK)
return i915->params.guc_firmware_path;
return "";
}
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 330c03e2b4f7..f031966af5b7 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -32,6 +32,7 @@ struct drm_printer;
#define ENABLE_GUC_SUBMISSION BIT(0)
#define ENABLE_GUC_LOAD_HUC BIT(1)
+#define ENABLE_GUC_MASK GENMASK(1, 0)
/*
* Invoke param, a function-like macro, for each i915 param, with arguments:
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: Add function to define defaults for GuC/HuC enable
2021-01-05 21:13 [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable John.C.Harrison
@ 2021-01-05 23:48 ` Patchwork
2021-01-06 1:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-08 0:51 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2021-01-05 23:48 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 3764 bytes --]
== Series Details ==
Series: drm/i915/uc: Add function to define defaults for GuC/HuC enable
URL : https://patchwork.freedesktop.org/series/85521/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9547 -> Patchwork_19260
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/index.html
Known issues
------------
Here are the changes found in Patchwork_19260 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@userptr:
- fi-byt-j1900: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/fi-byt-j1900/igt@amdgpu/amd_basic@userptr.html
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][2] -> [DMESG-WARN][3] ([i915#402]) +1 similar issue
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/fi-tgl-y/igt@debugfs_test@read_all_entries.html
#### Possible fixes ####
* igt@gem_exec_parallel@engines@contexts:
- fi-tgl-y: [FAIL][4] ([i915#2780]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/fi-tgl-y/igt@gem_exec_parallel@engines@contexts.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/fi-tgl-y/igt@gem_exec_parallel@engines@contexts.html
* igt@gem_sync@basic-all:
- fi-tgl-y: [DMESG-WARN][6] ([i915#402]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/fi-tgl-y/igt@gem_sync@basic-all.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/fi-tgl-y/igt@gem_sync@basic-all.html
* igt@i915_pm_rpm@module-reload:
- fi-byt-j1900: [INCOMPLETE][8] ([i915#142] / [i915#2405]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: [DMESG-FAIL][10] ([i915#2291] / [i915#541]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#142]: https://gitlab.freedesktop.org/drm/intel/issues/142
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2405]: https://gitlab.freedesktop.org/drm/intel/issues/2405
[i915#2780]: https://gitlab.freedesktop.org/drm/intel/issues/2780
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (42 -> 37)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9547 -> Patchwork_19260
CI-20190529: 20190529
CI_DRM_9547: 4f31e1ebafa4d59ce9692a7ef7f76e63e51f58d6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5942: e14e76a87c44c684ec958b391b030bb549254f88 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19260: 50ccb6d91dd7ac3985244387eb2fe6762c5921a4 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
50ccb6d91dd7 drm/i915/uc: Add function to define defaults for GuC/HuC enable
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/uc: Add function to define defaults for GuC/HuC enable
2021-01-05 21:13 [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable John.C.Harrison
2021-01-05 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2021-01-06 1:41 ` Patchwork
2021-01-08 0:51 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
2 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2021-01-06 1:41 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 24334 bytes --]
== Series Details ==
Series: drm/i915/uc: Add function to define defaults for GuC/HuC enable
URL : https://patchwork.freedesktop.org/series/85521/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9547_full -> Patchwork_19260_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
New tests
---------
New tests have been introduced between CI_DRM_9547_full and Patchwork_19260_full:
### New IGT tests (1) ###
* igt@gem_spin_batch@legacy:
- Statuses :
- Exec time: [None] s
Known issues
------------
Here are the changes found in Patchwork_19260_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_params@no-bsd:
- shard-iclb: NOTRUN -> [SKIP][1] ([fdo#109283])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@gem_exec_params@no-bsd.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][2] -> [SKIP][3] ([i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-tglb2/igt@gem_huc_copy@huc-copy.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-tglb6/igt@gem_huc_copy@huc-copy.html
- shard-iclb: NOTRUN -> [SKIP][4] ([i915#2190])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@gem_huc_copy@huc-copy.html
* igt@gem_pread@exhaustion:
- shard-iclb: NOTRUN -> [WARN][5] ([i915#2658])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@gem_pread@exhaustion.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-iclb: NOTRUN -> [SKIP][6] ([fdo#109312])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@gem_softpin@evict-snoop-interruptible.html
* igt@gem_userptr_blits@readonly-mmap-unsync@wb:
- shard-iclb: NOTRUN -> [SKIP][7] ([i915#1704]) +3 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@gem_userptr_blits@readonly-mmap-unsync@wb.html
* igt@gen9_exec_parse@secure-batches:
- shard-iclb: NOTRUN -> [SKIP][8] ([fdo#112306])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@gen9_exec_parse@secure-batches.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-iclb: NOTRUN -> [SKIP][9] ([i915#1769])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][10] ([fdo#110725] / [fdo#111614])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-270:
- shard-iclb: NOTRUN -> [SKIP][11] ([fdo#110723])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@kms_big_fb@yf-tiled-64bpp-rotate-270.html
* igt@kms_chamelium@vga-edid-read:
- shard-iclb: NOTRUN -> [SKIP][12] ([fdo#109284] / [fdo#111827]) +3 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_chamelium@vga-edid-read.html
* igt@kms_color@pipe-a-ctm-0-75:
- shard-iclb: NOTRUN -> [FAIL][13] ([i915#1149] / [i915#315])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_color@pipe-a-ctm-0-75.html
* igt@kms_color@pipe-c-ctm-negative:
- shard-skl: [PASS][14] -> [DMESG-WARN][15] ([i915#1982]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl4/igt@kms_color@pipe-c-ctm-negative.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl3/igt@kms_color@pipe-c-ctm-negative.html
* igt@kms_color_chamelium@pipe-d-ctm-red-to-blue:
- shard-skl: NOTRUN -> [SKIP][16] ([fdo#109271] / [fdo#111827]) +4 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl8/igt@kms_color_chamelium@pipe-d-ctm-red-to-blue.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen:
- shard-skl: [PASS][17] -> [FAIL][18] ([i915#54]) +11 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl1/igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-128x42-onscreen.html
* igt@kms_cursor_crc@pipe-a-cursor-512x512-offscreen:
- shard-iclb: NOTRUN -> [SKIP][19] ([fdo#109278] / [fdo#109279]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@kms_cursor_crc@pipe-a-cursor-512x512-offscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-64x64-onscreen:
- shard-skl: NOTRUN -> [FAIL][20] ([i915#54])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-64x64-onscreen.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions:
- shard-iclb: NOTRUN -> [SKIP][21] ([fdo#109274] / [fdo#109278])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html
* igt@kms_cursor_legacy@pipe-d-single-move:
- shard-iclb: NOTRUN -> [SKIP][22] ([fdo#109278]) +6 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_cursor_legacy@pipe-d-single-move.html
* igt@kms_cursor_legacy@pipe-d-torture-move:
- shard-skl: NOTRUN -> [SKIP][23] ([fdo#109271]) +62 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl5/igt@kms_cursor_legacy@pipe-d-torture-move.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-iclb: NOTRUN -> [SKIP][24] ([fdo#109274])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-tglb: [PASS][25] -> [FAIL][26] ([i915#2598])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-tglb7/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-tglb1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a2:
- shard-glk: [PASS][27] -> [FAIL][28] ([i915#79])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-glk2/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a2.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-glk7/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [PASS][29] -> [FAIL][30] ([i915#79])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-pwrite:
- shard-iclb: NOTRUN -> [SKIP][31] ([fdo#109280]) +12 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-render:
- shard-iclb: [PASS][32] -> [FAIL][33] ([i915#49])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb3/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-render.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb6/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-render.html
* igt@kms_hdr@static-toggle-dpms:
- shard-iclb: NOTRUN -> [SKIP][34] ([i915#1187])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_panel_fitting@legacy:
- shard-iclb: [PASS][35] -> [DMESG-WARN][36] ([i915#1226])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb3/igt@kms_panel_fitting@legacy.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb6/igt@kms_panel_fitting@legacy.html
* igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
- shard-iclb: NOTRUN -> [SKIP][37] ([fdo#109289]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][38] -> [FAIL][39] ([fdo#108145] / [i915#265]) +1 similar issue
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][40] -> [SKIP][41] ([fdo#109441])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb7/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: NOTRUN -> [SKIP][42] ([fdo#109441]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@kms_psr@psr2_suspend.html
* igt@kms_vblank@pipe-b-wait-forked:
- shard-snb: [PASS][43] -> [SKIP][44] ([fdo#109271]) +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-snb4/igt@kms_vblank@pipe-b-wait-forked.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-snb4/igt@kms_vblank@pipe-b-wait-forked.html
* igt@nouveau_crc@pipe-a-ctx-flip-detection:
- shard-iclb: NOTRUN -> [SKIP][45] ([i915#2530])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@nouveau_crc@pipe-a-ctx-flip-detection.html
* igt@nouveau_crc@pipe-d-source-rg:
- shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109278] / [i915#2530])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@nouveau_crc@pipe-d-source-rg.html
* igt@perf@polling:
- shard-skl: [PASS][47] -> [FAIL][48] ([i915#1542])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl9/igt@perf@polling.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl2/igt@perf@polling.html
* igt@prime_nv_api@i915_self_import_to_different_fd:
- shard-iclb: NOTRUN -> [SKIP][49] ([fdo#109291])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@prime_nv_api@i915_self_import_to_different_fd.html
* igt@prime_vgem@sync@rcs0:
- shard-apl: [PASS][50] -> [INCOMPLETE][51] ([i915#409])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-apl6/igt@prime_vgem@sync@rcs0.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-apl3/igt@prime_vgem@sync@rcs0.html
#### Possible fixes ####
* {igt@gem_exec_fair@basic-none@vcs1}:
- shard-kbl: [FAIL][52] ([i915#2842]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-kbl4/igt@gem_exec_fair@basic-none@vcs1.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-kbl3/igt@gem_exec_fair@basic-none@vcs1.html
* {igt@gem_exec_fair@basic-pace@bcs0}:
- shard-iclb: [FAIL][54] ([i915#2842]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb3/igt@gem_exec_fair@basic-pace@bcs0.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb6/igt@gem_exec_fair@basic-pace@bcs0.html
* {igt@gem_exec_fair@basic-pace@vecs0}:
- shard-glk: [FAIL][56] ([i915#2842]) -> [PASS][57] +2 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-glk8/igt@gem_exec_fair@basic-pace@vecs0.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-glk9/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@i915_selftest@live@execlists:
- shard-iclb: [INCOMPLETE][58] ([i915#1037] / [i915#2276]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb2/igt@i915_selftest@live@execlists.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-glk: [DMESG-FAIL][60] ([i915#2291]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-glk6/igt@i915_selftest@live@gt_heartbeat.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-glk5/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_color@pipe-b-ctm-0-75:
- shard-skl: [DMESG-WARN][62] ([i915#1982]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl9/igt@kms_color@pipe-b-ctm-0-75.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl2/igt@kms_color@pipe-b-ctm-0-75.html
* igt@kms_cursor_crc@pipe-b-cursor-128x128-random:
- shard-skl: [FAIL][64] ([i915#54]) -> [PASS][65] +7 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl3/igt@kms_cursor_crc@pipe-b-cursor-128x128-random.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-128x128-random.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [FAIL][66] ([i915#1188]) -> [PASS][67] +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl5/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][68] ([fdo#108145] / [i915#265]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][70] ([fdo#109642] / [fdo#111068]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb1/igt@kms_psr2_su@frontbuffer.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_vblank@pipe-b-ts-continuation-modeset-hang:
- shard-kbl: [DMESG-WARN][72] ([i915#165] / [i915#180]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-kbl2/igt@kms_vblank@pipe-b-ts-continuation-modeset-hang.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-kbl4/igt@kms_vblank@pipe-b-ts-continuation-modeset-hang.html
* igt@prime_vgem@sync@rcs0:
- shard-skl: [INCOMPLETE][74] ([i915#409]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl7/igt@prime_vgem@sync@rcs0.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl8/igt@prime_vgem@sync@rcs0.html
* igt@syncobj_timeline@multi-wait-for-submit-unsubmitted-signaled:
- shard-iclb: [INCOMPLETE][76] -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb4/igt@syncobj_timeline@multi-wait-for-submit-unsubmitted-signaled.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb8/igt@syncobj_timeline@multi-wait-for-submit-unsubmitted-signaled.html
#### Warnings ####
* igt@i915_pm_dc@dc6-psr:
- shard-skl: [INCOMPLETE][78] ([i915#198]) -> [FAIL][79] ([i915#454])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl1/igt@i915_pm_dc@dc6-psr.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl5/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][80] ([i915#2681] / [i915#2684]) -> [WARN][81] ([i915#2684])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][82], [FAIL][83]) ([i915#2295] / [i915#2426] / [i915#2505] / [i915#483]) -> ([FAIL][84], [FAIL][85]) ([i915#2295] / [i915#2426] / [i915#483])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-kbl4/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-kbl6/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-kbl1/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-kbl4/igt@runner@aborted.html
- shard-iclb: [FAIL][86] ([i915#2295] / [i915#2724] / [i915#483]) -> ([FAIL][87], [FAIL][88]) ([i915#2295] / [i915#2426] / [i915#2724] / [i915#483])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-iclb5/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb1/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-iclb4/igt@runner@aborted.html
- shard-apl: [FAIL][89] ([i915#2295]) -> ([FAIL][90], [FAIL][91]) ([i915#2295] / [i915#2426] / [i915#409])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-apl7/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-apl3/igt@runner@aborted.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-apl7/igt@runner@aborted.html
- shard-glk: [FAIL][92] ([i915#2295] / [k.org#202321]) -> [FAIL][93] ([i915#2295] / [i915#483] / [k.org#202321])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-glk8/igt@runner@aborted.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-glk3/igt@runner@aborted.html
- shard-tglb: [FAIL][94] ([i915#2295] / [i915#2667]) -> ([FAIL][95], [FAIL][96]) ([i915#2295] / [i915#2426] / [i915#2667] / [i915#2803])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-tglb7/igt@runner@aborted.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-tglb1/igt@runner@aborted.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-tglb1/igt@runner@aborted.html
- shard-skl: ([FAIL][97], [FAIL][98]) ([i915#2295] / [i915#2426] / [i915#409]) -> ([FAIL][99], [FAIL][100]) ([i915#2295] / [i915#2426])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl8/igt@runner@aborted.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9547/shard-skl7/igt@runner@aborted.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl1/igt@runner@aborted.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/shard-skl3/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#110725]: https://bugs.freedesktop.org/show_bug.cgi?id=110725
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112306]: https://bugs.freedesktop.org/show_bug.cgi?id=112306
[i915#1037]: https://gitlab.freedesktop.org/drm/intel/issues/1037
[i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149
[i915#1187]: https://gitlab.freedesktop.org/drm/intel/issues/1187
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#1704]: https://gitlab.freedesktop.org/drm/intel/issues/1704
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2276]: https://gitlab.freedesktop.org/drm/intel/issues/2276
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2598]: https://gitlab.freedesktop.org/drm/intel/issues/2598
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2667]: https://gitlab.freedesktop.org/drm/intel/issues/2667
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#2724]: https://gitlab.freedesktop.org/drm/intel/issues/2724
[i915#2802]: https://gitlab.freedesktop.org/drm/intel/issues/2802
[i915#2803]: https://gitlab.freedesktop.org/drm/intel/issues/2803
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2849]: https://gitlab.freedesktop.org/drm/intel/issues/2849
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#409]: https://gitlab.freedesktop.org/drm/intel/issues/409
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_9547 -> Patchwork_19260
CI-20190529: 20190529
CI_DRM_9547: 4f31e1ebafa4d59ce9692a7ef7f76e63e51f58d6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5942: e14e76a87c44c684ec958b391b030bb549254f88 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19260: 50ccb6d91dd7ac3985244387eb2fe6762c5921a4 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19260/index.html
[-- Attachment #1.2: Type: text/html, Size: 29553 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable
2021-01-05 21:13 [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable John.C.Harrison
2021-01-05 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-01-06 1:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2021-01-08 0:51 ` Daniele Ceraolo Spurio
2 siblings, 0 replies; 7+ messages in thread
From: Daniele Ceraolo Spurio @ 2021-01-08 0:51 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX
On 1/5/2021 1:13 PM, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> There is a module parameter for controlling what GuC/HuC features are
> enabled. Setting to -1 means 'use the default'. However, the default
> is not well defined, out of date and needs to be different across
> platforms.
I believe this needs a bit more detail about the change in behavior. -1
used to map to HuC loading on all gen11+ platforms, while after this
change it will map to disabled on all current platforms and HuC loading
on dg1 and all future platforms.
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> CC: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 28 ++++++++++++++++++++++--
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 7 +-----
> drivers/gpu/drm/i915/i915_params.h | 1 +
> 3 files changed, 28 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 6a0452815c41..2c08db58cf12 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -15,6 +15,29 @@
> static const struct intel_uc_ops uc_ops_off;
> static const struct intel_uc_ops uc_ops_on;
>
> +static void uc_expand_default_options(struct intel_uc *uc)
> +{
> + struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
> +
> + if (i915->params.enable_guc != -1)
> + return;
> +
> + /* Don't enable GuC/HuC on pre-Gen12 */
> + if (INTEL_GEN(i915) < 12) {
> + i915->params.enable_guc = 0;
> + return;
> + }
> +
> + /* Don't enable GuC/HuC on older Gen12 platforms */
> + if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) {
> + i915->params.enable_guc = 0;
> + return;
> + }
> +
> + /* Default: enable HuC authentication only */
> + i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
> +}
> +
> /* Reset GuC providing us with fresh state for both GuC and HuC.
> */
> static int __intel_uc_reset_hw(struct intel_uc *uc)
> @@ -79,8 +102,7 @@ static void __confirm_options(struct intel_uc *uc)
> "Incompatible option enable_guc=%d - %s\n",
> i915->params.enable_guc, "GuC submission is N/A");
>
> - if (i915->params.enable_guc & ~(ENABLE_GUC_SUBMISSION |
> - ENABLE_GUC_LOAD_HUC))
> + if (i915->params.enable_guc & ~ENABLE_GUC_MASK)
> drm_info(&i915->drm,
> "Incompatible option enable_guc=%d - %s\n",
> i915->params.enable_guc, "undocumented flag");
> @@ -88,6 +110,8 @@ static void __confirm_options(struct intel_uc *uc)
>
> void intel_uc_init_early(struct intel_uc *uc)
> {
> + uc_expand_default_options(uc);
> +
> intel_guc_init_early(&uc->guc);
> intel_huc_init_early(&uc->huc);
here there is a call to __confirm_options() that has a check for
enable_guc == -1, which can be dropped since we can't reach here with
that value anymore.
with these addressed:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 602f1a0bc587..67b06fde1225 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -152,16 +152,11 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
> uc_fw->path = NULL;
> }
> }
> -
> - /* We don't want to enable GuC/HuC on pre-Gen11 by default */
> - if (i915->params.enable_guc == -1 && p < INTEL_ICELAKE)
> - uc_fw->path = NULL;
> }
>
> static const char *__override_guc_firmware_path(struct drm_i915_private *i915)
> {
> - if (i915->params.enable_guc & (ENABLE_GUC_SUBMISSION |
> - ENABLE_GUC_LOAD_HUC))
> + if (i915->params.enable_guc & ENABLE_GUC_MASK)
> return i915->params.guc_firmware_path;
> return "";
> }
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 330c03e2b4f7..f031966af5b7 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -32,6 +32,7 @@ struct drm_printer;
>
> #define ENABLE_GUC_SUBMISSION BIT(0)
> #define ENABLE_GUC_LOAD_HUC BIT(1)
> +#define ENABLE_GUC_MASK GENMASK(1, 0)
>
> /*
> * Invoke param, a function-like macro, for each i915 param, with arguments:
_______________________________________________
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable
@ 2021-01-13 22:07 John.C.Harrison
2021-01-14 21:39 ` John Harrison
0 siblings, 1 reply; 7+ messages in thread
From: John.C.Harrison @ 2021-01-13 22:07 UTC (permalink / raw)
To: Intel-GFX
From: John Harrison <John.C.Harrison@Intel.com>
There is a module parameter for controlling what GuC/HuC features are
enabled. Setting to -1 means 'use the default'. However, the default
was not well defined, out of date and needs to be different across
platforms.
The default is now to disable both GuC and HuC on legacy platforms
where legacy means TGL/RKL and anything prior to Gen12. For new
platforms, the default is to load HuC but not GuC as GuC submission
has not yet landed.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 31 ++++++++++++++++++++----
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 7 +-----
drivers/gpu/drm/i915/i915_params.h | 1 +
3 files changed, 28 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
index 6a0452815c41..6abb8f2dc33d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
@@ -15,6 +15,29 @@
static const struct intel_uc_ops uc_ops_off;
static const struct intel_uc_ops uc_ops_on;
+static void uc_expand_default_options(struct intel_uc *uc)
+{
+ struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
+
+ if (i915->params.enable_guc != -1)
+ return;
+
+ /* Don't enable GuC/HuC on pre-Gen12 */
+ if (INTEL_GEN(i915) < 12) {
+ i915->params.enable_guc = 0;
+ return;
+ }
+
+ /* Don't enable GuC/HuC on older Gen12 platforms */
+ if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) {
+ i915->params.enable_guc = 0;
+ return;
+ }
+
+ /* Default: enable HuC authentication only */
+ i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
+}
+
/* Reset GuC providing us with fresh state for both GuC and HuC.
*/
static int __intel_uc_reset_hw(struct intel_uc *uc)
@@ -52,9 +75,6 @@ static void __confirm_options(struct intel_uc *uc)
yesno(intel_uc_wants_guc_submission(uc)),
yesno(intel_uc_wants_huc(uc)));
- if (i915->params.enable_guc == -1)
- return;
-
if (i915->params.enable_guc == 0) {
GEM_BUG_ON(intel_uc_wants_guc(uc));
GEM_BUG_ON(intel_uc_wants_guc_submission(uc));
@@ -79,8 +99,7 @@ static void __confirm_options(struct intel_uc *uc)
"Incompatible option enable_guc=%d - %s\n",
i915->params.enable_guc, "GuC submission is N/A");
- if (i915->params.enable_guc & ~(ENABLE_GUC_SUBMISSION |
- ENABLE_GUC_LOAD_HUC))
+ if (i915->params.enable_guc & ~ENABLE_GUC_MASK)
drm_info(&i915->drm,
"Incompatible option enable_guc=%d - %s\n",
i915->params.enable_guc, "undocumented flag");
@@ -88,6 +107,8 @@ static void __confirm_options(struct intel_uc *uc)
void intel_uc_init_early(struct intel_uc *uc)
{
+ uc_expand_default_options(uc);
+
intel_guc_init_early(&uc->guc);
intel_huc_init_early(&uc->huc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 602f1a0bc587..67b06fde1225 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -152,16 +152,11 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
uc_fw->path = NULL;
}
}
-
- /* We don't want to enable GuC/HuC on pre-Gen11 by default */
- if (i915->params.enable_guc == -1 && p < INTEL_ICELAKE)
- uc_fw->path = NULL;
}
static const char *__override_guc_firmware_path(struct drm_i915_private *i915)
{
- if (i915->params.enable_guc & (ENABLE_GUC_SUBMISSION |
- ENABLE_GUC_LOAD_HUC))
+ if (i915->params.enable_guc & ENABLE_GUC_MASK)
return i915->params.guc_firmware_path;
return "";
}
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 330c03e2b4f7..f031966af5b7 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -32,6 +32,7 @@ struct drm_printer;
#define ENABLE_GUC_SUBMISSION BIT(0)
#define ENABLE_GUC_LOAD_HUC BIT(1)
+#define ENABLE_GUC_MASK GENMASK(1, 0)
/*
* Invoke param, a function-like macro, for each i915 param, with arguments:
--
2.25.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable
2021-01-13 22:07 John.C.Harrison
@ 2021-01-14 21:39 ` John Harrison
2021-01-20 10:35 ` Chris Wilson
0 siblings, 1 reply; 7+ messages in thread
From: John Harrison @ 2021-01-14 21:39 UTC (permalink / raw)
To: Intel-GFX
[-- Attachment #1.1: Type: text/plain, Size: 4817 bytes --]
On 1/13/2021 14:07, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> There is a module parameter for controlling what GuC/HuC features are
> enabled. Setting to -1 means 'use the default'. However, the default
> was not well defined, out of date and needs to be different across
> platforms.
>
> The default is now to disable both GuC and HuC on legacy platforms
> where legacy means TGL/RKL and anything prior to Gen12. For new
> platforms, the default is to load HuC but not GuC as GuC submission
> has not yet landed.
Daniele pointed out that the above wording is somewhat inaccurate. GuC
is still loaded (in order to do HuC authentication). Better wording
would be:
The default is now to disable both GuC and HuC on legacy platforms
where legacy means TGL/RKL and anything prior to Gen12. For new
platforms, the default is to load HuC but not enable GuC submission
as that has not landed yet.
John.
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 31 ++++++++++++++++++++----
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 7 +-----
> drivers/gpu/drm/i915/i915_params.h | 1 +
> 3 files changed, 28 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 6a0452815c41..6abb8f2dc33d 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -15,6 +15,29 @@
> static const struct intel_uc_ops uc_ops_off;
> static const struct intel_uc_ops uc_ops_on;
>
> +static void uc_expand_default_options(struct intel_uc *uc)
> +{
> + struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
> +
> + if (i915->params.enable_guc != -1)
> + return;
> +
> + /* Don't enable GuC/HuC on pre-Gen12 */
> + if (INTEL_GEN(i915) < 12) {
> + i915->params.enable_guc = 0;
> + return;
> + }
> +
> + /* Don't enable GuC/HuC on older Gen12 platforms */
> + if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) {
> + i915->params.enable_guc = 0;
> + return;
> + }
> +
> + /* Default: enable HuC authentication only */
> + i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
> +}
> +
> /* Reset GuC providing us with fresh state for both GuC and HuC.
> */
> static int __intel_uc_reset_hw(struct intel_uc *uc)
> @@ -52,9 +75,6 @@ static void __confirm_options(struct intel_uc *uc)
> yesno(intel_uc_wants_guc_submission(uc)),
> yesno(intel_uc_wants_huc(uc)));
>
> - if (i915->params.enable_guc == -1)
> - return;
> -
> if (i915->params.enable_guc == 0) {
> GEM_BUG_ON(intel_uc_wants_guc(uc));
> GEM_BUG_ON(intel_uc_wants_guc_submission(uc));
> @@ -79,8 +99,7 @@ static void __confirm_options(struct intel_uc *uc)
> "Incompatible option enable_guc=%d - %s\n",
> i915->params.enable_guc, "GuC submission is N/A");
>
> - if (i915->params.enable_guc & ~(ENABLE_GUC_SUBMISSION |
> - ENABLE_GUC_LOAD_HUC))
> + if (i915->params.enable_guc & ~ENABLE_GUC_MASK)
> drm_info(&i915->drm,
> "Incompatible option enable_guc=%d - %s\n",
> i915->params.enable_guc, "undocumented flag");
> @@ -88,6 +107,8 @@ static void __confirm_options(struct intel_uc *uc)
>
> void intel_uc_init_early(struct intel_uc *uc)
> {
> + uc_expand_default_options(uc);
> +
> intel_guc_init_early(&uc->guc);
> intel_huc_init_early(&uc->huc);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 602f1a0bc587..67b06fde1225 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -152,16 +152,11 @@ __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
> uc_fw->path = NULL;
> }
> }
> -
> - /* We don't want to enable GuC/HuC on pre-Gen11 by default */
> - if (i915->params.enable_guc == -1 && p < INTEL_ICELAKE)
> - uc_fw->path = NULL;
> }
>
> static const char *__override_guc_firmware_path(struct drm_i915_private *i915)
> {
> - if (i915->params.enable_guc & (ENABLE_GUC_SUBMISSION |
> - ENABLE_GUC_LOAD_HUC))
> + if (i915->params.enable_guc & ENABLE_GUC_MASK)
> return i915->params.guc_firmware_path;
> return "";
> }
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 330c03e2b4f7..f031966af5b7 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -32,6 +32,7 @@ struct drm_printer;
>
> #define ENABLE_GUC_SUBMISSION BIT(0)
> #define ENABLE_GUC_LOAD_HUC BIT(1)
> +#define ENABLE_GUC_MASK GENMASK(1, 0)
>
> /*
> * Invoke param, a function-like macro, for each i915 param, with arguments:
[-- Attachment #1.2: Type: text/html, Size: 5560 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable
2021-01-14 21:39 ` John Harrison
@ 2021-01-20 10:35 ` Chris Wilson
0 siblings, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2021-01-20 10:35 UTC (permalink / raw)
To: Intel-GFX, John Harrison
Quoting John Harrison (2021-01-14 21:39:42)
> On 1/13/2021 14:07, John.C.Harrison@Intel.com wrote:
>
> From: John Harrison <John.C.Harrison@Intel.com>
>
> There is a module parameter for controlling what GuC/HuC features are
> enabled. Setting to -1 means 'use the default'. However, the default
> was not well defined, out of date and needs to be different across
> platforms.
>
> The default is now to disable both GuC and HuC on legacy platforms
> where legacy means TGL/RKL and anything prior to Gen12. For new
> platforms, the default is to load HuC but not GuC as GuC submission
> has not yet landed.
>
> Daniele pointed out that the above wording is somewhat inaccurate. GuC is still
> loaded (in order to do HuC authentication). Better wording would be:
>
> The default is now to disable both GuC and HuC on legacy platforms
> where legacy means TGL/RKL and anything prior to Gen12. For new
> platforms, the default is to load HuC but not enable GuC submission
> as that has not landed yet.
I did not observe any changes in default behaviour across CI, so pushed
with the amended text.
-Chris
_______________________________________________
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-01-20 10:35 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-05 21:13 [Intel-gfx] [PATCH] drm/i915/uc: Add function to define defaults for GuC/HuC enable John.C.Harrison
2021-01-05 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-01-06 1:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-08 0:51 ` [Intel-gfx] [PATCH] " Daniele Ceraolo Spurio
2021-01-13 22:07 John.C.Harrison
2021-01-14 21:39 ` John Harrison
2021-01-20 10:35 ` Chris Wilson
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