* [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver
@ 2021-10-21 4:55 Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton Samuel Holland
` (21 more replies)
0 siblings, 22 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This series resolves some longstanding TODOs by implementing a pinctrl
driver for sunxi platforms and converting DM drivers to use it.
I am sending this as RFC because I have only tested this on a limited
amount of hardware, and there are quite a few magic numbers involved,
so it is likely I missed something. Also, I'm not sure the how best to
split up the patches by subsystem, or if that is necessary.
This series depends on the sunxi-gpio series I just sent.
Samuel Holland (23):
sunxi: pinctrl: Create the driver skeleton
sunxi: pinctrl: Implement pin muxing functions
sunxi: pinctrl: Implement get_pin_muxing function
sunxi: pinctrl: Implement pin configuration
pinctrl: sunxi: Add UART pinmuxes
sunxi: Skip non-DM UART pin setup when PINCTRL=y
pinctrl: sunxi: Add sun4i EMAC pinmuxes
net: sunxi_emac: Remove non-DM pin setup
pinctrl: sunxi: Add sunxi GMAC pinmuxes
sunxi: Remove non-DM GMAC pin setup
pinctrl: sunxi: Add sun8i EMAC pinmuxes
net: sun8i_emac: Remove non-DM pin setup
pinctrl: sunxi: Add I2C pinmuxes
sunxi: Remove options and setup code for I2C2-I2C4
sunxi: Remove non-DM I2C clock/pin setup from U-Boot
i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C
i2c: sun8i_rsb: Only do non-DM pin setup for non-DM I2C
pinctrl: sunxi: Add MMC pinmuxes
sunxi: Remove non-DM MMC pin setup
pinctrl: sunxi: a64: Add the PWM pinmux
pwm: sunxi: Remove non-DM pin setup
pinctrl: sunxi: Add SPI0 pinmuxes
spi: sun4i_spi: Remove non-DM pin setup
MAINTAINERS | 1 +
arch/arm/Kconfig | 1 +
arch/arm/include/asm/arch-sunxi/gpio.h | 18 +-
arch/arm/include/asm/arch-sunxi/i2c.h | 11 +-
arch/arm/mach-sunxi/Kconfig | 22 --
arch/arm/mach-sunxi/board.c | 2 +
board/sunxi/board.c | 67 ------
board/sunxi/gmac.c | 55 -----
drivers/gpio/sunxi_gpio.c | 130 +-----------
drivers/i2c/sun6i_p2wi.c | 6 +-
drivers/i2c/sun8i_rsb.c | 40 ++--
drivers/net/sun8i_emac.c | 90 --------
drivers/net/sunxi_emac.c | 5 -
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl/Makefile | 2 +-
drivers/pinctrl/sunxi/Kconfig | 122 +++++++++++
drivers/pinctrl/sunxi/Makefile | 26 +++
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 53 +++++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c | 38 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 51 +++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 50 +++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 38 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 49 +++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c | 38 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 47 +++++
drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 53 +++++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 38 ++++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 53 +++++
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 57 +++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 38 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 47 +++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 49 +++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 38 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 50 +++++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 38 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 50 +++++
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 54 +++++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 39 ++++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 48 +++++
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 196 ++++++++++++++++++
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 21 ++
drivers/pwm/sunxi_pwm.c | 11 -
drivers/spi/spi-sunxi.c | 83 --------
43 files changed, 1414 insertions(+), 512 deletions(-)
create mode 100644 drivers/pinctrl/sunxi/Kconfig
create mode 100644 drivers/pinctrl/sunxi/Makefile
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sunxi.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sunxi.h
--
2.32.0
^ permalink raw reply [flat|nested] 28+ messages in thread
* [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 5:13 ` Sean Anderson
2021-10-21 4:55 ` [RFC PATCH 02/23] sunxi: pinctrl: Implement pin muxing functions Samuel Holland
` (20 subsequent siblings)
21 siblings, 1 reply; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
Create a do-nothing driver for each sunxi pin controller variant.
Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
MAINTAINERS | 1 +
arch/arm/Kconfig | 1 +
arch/arm/include/asm/arch-sunxi/gpio.h | 5 +
drivers/gpio/sunxi_gpio.c | 130 +-----------------
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl/Makefile | 2 +-
drivers/pinctrl/sunxi/Kconfig | 120 ++++++++++++++++
drivers/pinctrl/sunxi/Makefile | 26 ++++
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 33 +++++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 33 +++++
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 33 +++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 33 +++++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 29 ++++
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 57 ++++++++
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 14 ++
32 files changed, 882 insertions(+), 129 deletions(-)
create mode 100644 drivers/pinctrl/sunxi/Kconfig
create mode 100644 drivers/pinctrl/sunxi/Makefile
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sunxi.c
create mode 100644 drivers/pinctrl/sunxi/pinctrl-sunxi.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 71f468c00a..407919d350 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -474,6 +474,7 @@ F: arch/arm/mach-sunxi/
F: board/sunxi/
F: drivers/clk/sunxi/
F: drivers/phy/allwinner/
+F: drivers/pinctrl/sunxi/
F: drivers/video/sunxi/
ARM TEGRA
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d8c041a877..e896e55747 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1037,6 +1037,7 @@ config ARCH_SUNXI
select OF_BOARD_SETUP
select OF_CONTROL
select OF_SEPARATE
+ select PINCTRL
select SPECIFY_CONSOLE_INDEX
select SPL_STACK_R if SPL
select SPL_SYS_MALLOC_SIMPLE if SPL
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 106605adf5..fa99b1ca84 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -222,6 +222,11 @@ enum sunxi_gpio_number {
#define SUNXI_GPIO_AXP0_VBUS_ENABLE 5
#define SUNXI_GPIO_AXP0_GPIO_COUNT 6
+struct sunxi_gpio_plat {
+ struct sunxi_gpio *regs;
+ char bank_name[3];
+};
+
void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val);
void sunxi_gpio_set_cfgpin(u32 pin, u32 val);
int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset);
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 92fee0118d..1e85db179a 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -16,15 +16,8 @@
#include <malloc.h>
#include <asm/io.h>
#include <asm/gpio.h>
-#include <dm/device-internal.h>
#include <dt-bindings/gpio/gpio.h>
-struct sunxi_gpio_plat {
- struct sunxi_gpio *regs;
- const char *bank_name; /* Name of bank, e.g. "B" */
- int gpio_count;
-};
-
#if !CONFIG_IS_ENABLED(DM_GPIO)
static int sunxi_gpio_output(u32 pin, u32 val)
{
@@ -211,28 +204,6 @@ static const struct dm_gpio_ops gpio_sunxi_ops = {
.set_flags = sunxi_gpio_set_flags,
};
-/**
- * Returns the name of a GPIO bank
- *
- * GPIO banks are named A, B, C, ...
- *
- * @bank: Bank number (0, 1..n-1)
- * @return allocated string containing the name
- */
-static char *gpio_bank_name(int bank)
-{
- char *name;
-
- name = malloc(3);
- if (name) {
- name[0] = 'P';
- name[1] = 'A' + bank;
- name[2] = '\0';
- }
-
- return name;
-}
-
static int gpio_sunxi_probe(struct udevice *dev)
{
struct sunxi_gpio_plat *plat = dev_get_plat(dev);
@@ -240,114 +211,17 @@ static int gpio_sunxi_probe(struct udevice *dev)
/* Tell the uclass how many GPIOs we have */
if (plat) {
- uc_priv->gpio_count = plat->gpio_count;
+ uc_priv->gpio_count = SUNXI_GPIOS_PER_BANK;
uc_priv->bank_name = plat->bank_name;
}
return 0;
}
-struct sunxi_gpio_soc_data {
- int start;
- int no_banks;
-};
-
-/**
- * We have a top-level GPIO device with no actual GPIOs. It has a child
- * device for each Sunxi bank.
- */
-static int gpio_sunxi_bind(struct udevice *parent)
-{
- struct sunxi_gpio_soc_data *soc_data =
- (struct sunxi_gpio_soc_data *)dev_get_driver_data(parent);
- struct sunxi_gpio_plat *plat = dev_get_plat(parent);
- struct sunxi_gpio_reg *ctlr;
- int bank, ret;
-
- /* If this is a child device, there is nothing to do here */
- if (plat)
- return 0;
-
- ctlr = dev_read_addr_ptr(parent);
- for (bank = 0; bank < soc_data->no_banks; bank++) {
- struct sunxi_gpio_plat *plat;
- struct udevice *dev;
-
- plat = calloc(1, sizeof(*plat));
- if (!plat)
- return -ENOMEM;
- plat->regs = &ctlr->gpio_bank[bank];
- plat->bank_name = gpio_bank_name(soc_data->start + bank);
- plat->gpio_count = SUNXI_GPIOS_PER_BANK;
-
- ret = device_bind(parent, parent->driver, plat->bank_name, plat,
- dev_ofnode(parent), &dev);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-
-static const struct sunxi_gpio_soc_data soc_data_a_all = {
- .start = 0,
- .no_banks = SUNXI_GPIO_BANKS,
-};
-
-static const struct sunxi_gpio_soc_data soc_data_l_1 = {
- .start = 'L' - 'A',
- .no_banks = 1,
-};
-
-static const struct sunxi_gpio_soc_data soc_data_l_2 = {
- .start = 'L' - 'A',
- .no_banks = 2,
-};
-
-static const struct sunxi_gpio_soc_data soc_data_l_3 = {
- .start = 'L' - 'A',
- .no_banks = 3,
-};
-
-#define ID(_compat_, _soc_data_) \
- { .compatible = _compat_, .data = (ulong)&soc_data_##_soc_data_ }
-
-static const struct udevice_id sunxi_gpio_ids[] = {
- ID("allwinner,sun4i-a10-pinctrl", a_all),
- ID("allwinner,sun5i-a10s-pinctrl", a_all),
- ID("allwinner,sun5i-a13-pinctrl", a_all),
- ID("allwinner,sun50i-h5-pinctrl", a_all),
- ID("allwinner,sun6i-a31-pinctrl", a_all),
- ID("allwinner,sun6i-a31s-pinctrl", a_all),
- ID("allwinner,sun7i-a20-pinctrl", a_all),
- ID("allwinner,sun8i-a23-pinctrl", a_all),
- ID("allwinner,sun8i-a33-pinctrl", a_all),
- ID("allwinner,sun8i-a83t-pinctrl", a_all),
- ID("allwinner,sun8i-h3-pinctrl", a_all),
- ID("allwinner,sun8i-r40-pinctrl", a_all),
- ID("allwinner,sun8i-v3-pinctrl", a_all),
- ID("allwinner,sun8i-v3s-pinctrl", a_all),
- ID("allwinner,sun9i-a80-pinctrl", a_all),
- ID("allwinner,sun50i-a64-pinctrl", a_all),
- ID("allwinner,sun50i-h6-pinctrl", a_all),
- ID("allwinner,sun50i-h616-pinctrl", a_all),
- ID("allwinner,sun6i-a31-r-pinctrl", l_2),
- ID("allwinner,sun8i-a23-r-pinctrl", l_1),
- ID("allwinner,sun8i-a83t-r-pinctrl", l_1),
- ID("allwinner,sun8i-h3-r-pinctrl", l_1),
- ID("allwinner,sun9i-a80-r-pinctrl", l_3),
- ID("allwinner,sun50i-a64-r-pinctrl", l_1),
- ID("allwinner,sun50i-h6-r-pinctrl", l_2),
- ID("allwinner,sun50i-h616-r-pinctrl", l_1),
- { }
-};
-
U_BOOT_DRIVER(gpio_sunxi) = {
.name = "gpio_sunxi",
.id = UCLASS_GPIO,
- .ops = &gpio_sunxi_ops,
- .of_match = sunxi_gpio_ids,
- .bind = gpio_sunxi_bind,
.probe = gpio_sunxi_probe,
+ .ops = &gpio_sunxi_ops,
};
#endif /* DM_GPIO */
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 30eaa376c8..5cb1605ba8 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -312,6 +312,7 @@ source "drivers/pinctrl/nexell/Kconfig"
source "drivers/pinctrl/nxp/Kconfig"
source "drivers/pinctrl/renesas/Kconfig"
source "drivers/pinctrl/rockchip/Kconfig"
+source "drivers/pinctrl/sunxi/Kconfig"
source "drivers/pinctrl/uniphier/Kconfig"
endmenu
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 05b71f2f13..7ad9d6cf73 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_PINCTRL_INTEL) += intel/
obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
obj-$(CONFIG_ARCH_RMOBILE) += renesas/
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
-
+obj-$(CONFIG_PINCTRL_SUNXI) += sunxi/
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
new file mode 100644
index 0000000000..d1cf5d0842
--- /dev/null
+++ b/drivers/pinctrl/sunxi/Kconfig
@@ -0,0 +1,120 @@
+# SPDX-License-Identifier: GPL-2.0
+
+if ARCH_SUNXI
+
+config PINCTRL_SUNXI
+ select PINCTRL_FULL
+ select PINCTRL_GENERIC
+ bool
+
+config PINCTRL_SUN4I_A10
+ bool "Support for the Allwinner A10 PIO"
+ default MACH_SUN4I
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN5I_A13
+ bool "Support for the Allwinner A10s/A13 PIO"
+ default MACH_SUN5I
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN6I_A31
+ bool "Support for the Allwinner A31 PIO"
+ default MACH_SUN6I
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN6I_A31_R
+ bool "Support for the Allwinner A31 R-PIO"
+ default MACH_SUN6I
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN7I_A20
+ bool "Support for the Allwinner A20/R40 PIO"
+ default MACH_SUN7I || MACH_SUN8I_R40
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN8I_A23
+ bool "Support for the Allwinner A23 PIO"
+ default MACH_SUN8I_A23
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN8I_A23_R
+ bool "Support for the Allwinner A23/A33 R-PIO"
+ default MACH_SUN8I_A23 || MACH_SUN8I_A33
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN8I_A33
+ bool "Support for the Allwinner A33 PIO"
+ default MACH_SUN8I_A33
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN8I_A83T
+ bool "Support for the Allwinner A83T PIO"
+ default MACH_SUN8I_A83T
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN8I_A83T_R
+ bool "Support for the Allwinner A83T R-PIO"
+ default MACH_SUN8I_A83T
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN8I_H3
+ bool "Support for the Allwinner H3 PIO"
+ default MACH_SUN8I_H3
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN8I_H3_R
+ bool "Support for the Allwinner H3/H5 R-PIO"
+ default MACH_SUN8I_H3 || MACH_SUN50I_H5
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN8I_V3S
+ bool "Support for the Allwinner V3s PIO"
+ default MACH_SUN8I_V3S
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN9I_A80
+ bool "Support for the Allwinner A80 PIO"
+ default MACH_SUN9I
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN9I_A80_R
+ bool "Support for the Allwinner A80 R-PIO"
+ default MACH_SUN9I
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN50I_A64
+ bool "Support for the Allwinner A64 PIO"
+ default MACH_SUN50I
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN50I_A64_R
+ bool "Support for the Allwinner A64 R-PIO"
+ default MACH_SUN50I
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN50I_H5
+ bool "Support for the Allwinner H5 PIO"
+ default MACH_SUN50I_H5
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN50I_H6
+ bool "Support for the Allwinner H6 PIO"
+ default MACH_SUN50I_H6
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN50I_H6_R
+ bool "Support for the Allwinner H6 R-PIO"
+ default MACH_SUN50I_H6
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN50I_H616
+ bool "Support for the Allwinner H616 PIO"
+ default MACH_SUN50I_H616
+ select PINCTRL_SUNXI
+
+config PINCTRL_SUN50I_H616_R
+ bool "Support for the Allwinner H616 R-PIO"
+ default MACH_SUN50I_H616
+ select PINCTRL_SUNXI
+
+endif
diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
new file mode 100644
index 0000000000..9f46c75564
--- /dev/null
+++ b/drivers/pinctrl/sunxi/Makefile
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += pinctrl-sunxi.o
+
+obj-$(CONFIG_PINCTRL_SUN4I_A10) += pinctrl-sun4i-a10.o
+obj-$(CONFIG_PINCTRL_SUN5I_A13) += pinctrl-sun5i-a13.o
+obj-$(CONFIG_PINCTRL_SUN6I_A31) += pinctrl-sun6i-a31.o
+obj-$(CONFIG_PINCTRL_SUN6I_A31_R) += pinctrl-sun6i-a31-r.o
+obj-$(CONFIG_PINCTRL_SUN7I_A20) += pinctrl-sun7i-a20.o
+obj-$(CONFIG_PINCTRL_SUN8I_A23) += pinctrl-sun8i-a23.o
+obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o
+obj-$(CONFIG_PINCTRL_SUN8I_A33) += pinctrl-sun8i-a33.o
+obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o
+obj-$(CONFIG_PINCTRL_SUN8I_A83T_R) += pinctrl-sun8i-a83t-r.o
+obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o
+obj-$(CONFIG_PINCTRL_SUN8I_H3_R) += pinctrl-sun8i-h3-r.o
+obj-$(CONFIG_PINCTRL_SUN8I_V3S) += pinctrl-sun8i-v3s.o
+obj-$(CONFIG_PINCTRL_SUN9I_A80) += pinctrl-sun9i-a80.o
+obj-$(CONFIG_PINCTRL_SUN9I_A80_R) += pinctrl-sun9i-a80-r.o
+obj-$(CONFIG_PINCTRL_SUN50I_A64) += pinctrl-sun50i-a64.o
+obj-$(CONFIG_PINCTRL_SUN50I_A64_R) += pinctrl-sun50i-a64-r.o
+obj-$(CONFIG_PINCTRL_SUN50I_H5) += pinctrl-sun50i-h5.o
+obj-$(CONFIG_PINCTRL_SUN50I_H6) += pinctrl-sun50i-h6.o
+obj-$(CONFIG_PINCTRL_SUN50I_H6_R) += pinctrl-sun50i-h6-r.o
+obj-$(CONFIG_PINCTRL_SUN50I_H616) += pinctrl-sun50i-h616.o
+obj-$(CONFIG_PINCTRL_SUN50I_H616_R) += pinctrl-sun50i-h616-r.o
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
new file mode 100644
index 0000000000..db31f788b1
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 9,
+};
+
+static const struct udevice_id sun4i_a10_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun4i-a10-pinctrl",
+ .data = (ulong)&sun4i_a10_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun4i_a10_pinctrl) = {
+ .name = "sun4i-a10-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun4i_a10_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
new file mode 100644
index 0000000000..55a1eeb10b
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun50i_a64_r_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_L,
+ .num_banks = 1,
+};
+
+static const struct udevice_id sun50i_a64_r_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun50i-a64-r-pinctrl",
+ .data = (ulong)&sun50i_a64_r_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun50i_a64_r_pinctrl) = {
+ .name = "sun50i-a64-r-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun50i_a64_r_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
new file mode 100644
index 0000000000..b1f4d25d7e
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun50i_a64_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 8,
+};
+
+static const struct udevice_id sun50i_a64_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun50i-a64-pinctrl",
+ .data = (ulong)&sun50i_a64_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun50i_a64_pinctrl) = {
+ .name = "sun50i-a64-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun50i_a64_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
new file mode 100644
index 0000000000..47f441c7f0
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun50i_h5_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 7,
+};
+
+static const struct udevice_id sun50i_h5_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun50i-h5-pinctrl",
+ .data = (ulong)&sun50i_h5_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun50i_h5_pinctrl) = {
+ .name = "sun50i-h5-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun50i_h5_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
new file mode 100644
index 0000000000..7f44e35bcc
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun50i_h6_r_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_L,
+ .num_banks = 2,
+};
+
+static const struct udevice_id sun50i_h6_r_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun50i-h6-r-pinctrl",
+ .data = (ulong)&sun50i_h6_r_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun50i_h6_r_pinctrl) = {
+ .name = "sun50i-h6-r-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun50i_h6_r_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
new file mode 100644
index 0000000000..c0c290bd7f
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun50i_h6_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 8,
+};
+
+static const struct udevice_id sun50i_h6_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun50i-h6-pinctrl",
+ .data = (ulong)&sun50i_h6_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun50i_h6_pinctrl) = {
+ .name = "sun50i-h6-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun50i_h6_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
new file mode 100644
index 0000000000..5db7662f3e
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun50i_h616_r_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_L,
+ .num_banks = 1,
+};
+
+static const struct udevice_id sun50i_h616_r_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun50i-h616-r-pinctrl",
+ .data = (ulong)&sun50i_h616_r_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun50i_h616_r_pinctrl) = {
+ .name = "sun50i-h616-r-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun50i_h616_r_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
new file mode 100644
index 0000000000..1211eb5e2e
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun50i_h616_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 9,
+};
+
+static const struct udevice_id sun50i_h616_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun50i-h616-pinctrl",
+ .data = (ulong)&sun50i_h616_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun50i_h616_pinctrl) = {
+ .name = "sun50i-h616-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun50i_h616_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
new file mode 100644
index 0000000000..6a4d47c5f0
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun5i_a13_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 7,
+};
+
+static const struct udevice_id sun5i_a13_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun5i-a10s-pinctrl",
+ .data = (ulong)&sun5i_a13_pinctrl_desc,
+ },
+ {
+ .compatible = "allwinner,sun5i-a13-pinctrl",
+ .data = (ulong)&sun5i_a13_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun5i_a13_pinctrl) = {
+ .name = "sun5i-a13-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun5i_a13_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
new file mode 100644
index 0000000000..0761eefc11
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_L,
+ .num_banks = 2,
+};
+
+static const struct udevice_id sun6i_a31_r_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun6i-a31-r-pinctrl",
+ .data = (ulong)&sun6i_a31_r_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun6i_a31_r_pinctrl) = {
+ .name = "sun6i-a31-r-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun6i_a31_r_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
new file mode 100644
index 0000000000..257a47dc52
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 8,
+};
+
+static const struct udevice_id sun6i_a31_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun6i-a31-pinctrl",
+ .data = (ulong)&sun6i_a31_pinctrl_desc,
+ },
+ {
+ .compatible = "allwinner,sun6i-a31s-pinctrl",
+ .data = (ulong)&sun6i_a31_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun6i_a31_pinctrl) = {
+ .name = "sun6i-a31-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun6i_a31_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
new file mode 100644
index 0000000000..c555950441
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun7i_a20_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 9,
+};
+
+static const struct udevice_id sun7i_a20_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun7i-a20-pinctrl",
+ .data = (ulong)&sun7i_a20_pinctrl_desc,
+ },
+ {
+ .compatible = "allwinner,sun8i-r40-pinctrl",
+ .data = (ulong)&sun7i_a20_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun7i_a20_pinctrl) = {
+ .name = "sun7i-a20-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun7i_a20_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
new file mode 100644
index 0000000000..983a9b8ce7
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_L,
+ .num_banks = 1,
+};
+
+static const struct udevice_id sun8i_a23_r_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-a23-r-pinctrl",
+ .data = (ulong)&sun8i_a23_r_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun8i_a23_r_pinctrl) = {
+ .name = "sun8i-a23-r-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun8i_a23_r_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
new file mode 100644
index 0000000000..60f42fa003
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun8i_a23_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 8,
+};
+
+static const struct udevice_id sun8i_a23_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-a23-pinctrl",
+ .data = (ulong)&sun8i_a23_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun8i_a23_pinctrl) = {
+ .name = "sun8i-a23-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun8i_a23_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
new file mode 100644
index 0000000000..e482dff6a7
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun8i_a33_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 8,
+};
+
+static const struct udevice_id sun8i_a33_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-a33-pinctrl",
+ .data = (ulong)&sun8i_a33_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun8i_a33_pinctrl) = {
+ .name = "sun8i-a33-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun8i_a33_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
new file mode 100644
index 0000000000..8417b9f25b
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun8i_a83t_r_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_L,
+ .num_banks = 1,
+};
+
+static const struct udevice_id sun8i_a83t_r_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-a83t-r-pinctrl",
+ .data = (ulong)&sun8i_a83t_r_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun8i_a83t_r_pinctrl) = {
+ .name = "sun8i-a83t-r-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun8i_a83t_r_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
new file mode 100644
index 0000000000..0391190654
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 8,
+};
+
+static const struct udevice_id sun8i_a83t_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-a83t-pinctrl",
+ .data = (ulong)&sun8i_a83t_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun8i_a83t_pinctrl) = {
+ .name = "sun8i-a83t-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun8i_a83t_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
new file mode 100644
index 0000000000..89517519d0
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun8i_h3_r_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_L,
+ .num_banks = 1,
+};
+
+static const struct udevice_id sun8i_h3_r_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-h3-r-pinctrl",
+ .data = (ulong)&sun8i_h3_r_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun8i_h3_r_pinctrl) = {
+ .name = "sun8i-h3-r-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun8i_h3_r_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
new file mode 100644
index 0000000000..0edcfe25c2
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 7,
+};
+
+static const struct udevice_id sun8i_h3_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-h3-pinctrl",
+ .data = (ulong)&sun8i_h3_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun8i_h3_pinctrl) = {
+ .name = "sun8i-h3-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun8i_h3_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
new file mode 100644
index 0000000000..1fce28bda1
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun8i_v3s_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 7,
+};
+
+static const struct udevice_id sun8i_v3s_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun8i-v3-pinctrl",
+ .data = (ulong)&sun8i_v3s_pinctrl_desc,
+ },
+ {
+ .compatible = "allwinner,sun8i-v3s-pinctrl",
+ .data = (ulong)&sun8i_v3s_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun8i_v3s_pinctrl) = {
+ .name = "sun8i-v3s-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun8i_v3s_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
new file mode 100644
index 0000000000..8209de6cac
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun9i_a80_r_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_L,
+ .num_banks = 3,
+};
+
+static const struct udevice_id sun9i_a80_r_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun9i-a80-r-pinctrl",
+ .data = (ulong)&sun9i_a80_r_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun9i_a80_r_pinctrl) = {
+ .name = "sun9i-a80-r-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun9i_a80_r_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
new file mode 100644
index 0000000000..1594215df1
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+static const struct sunxi_pinctrl_desc sun9i_a80_pinctrl_desc = {
+ .first_bank = SUNXI_GPIO_A,
+ .num_banks = 8,
+};
+
+static const struct udevice_id sun9i_a80_pinctrl_ids[] = {
+ {
+ .compatible = "allwinner,sun9i-a80-pinctrl",
+ .data = (ulong)&sun9i_a80_pinctrl_desc,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(sun9i_a80_pinctrl) = {
+ .name = "sun9i-a80-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = sun9i_a80_pinctrl_ids,
+ .bind = sunxi_pinctrl_bind,
+ .plat_auto = sizeof(struct sunxi_pinctrl_plat),
+ .ops = &sunxi_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
new file mode 100644
index 0000000000..18aee4a1ac
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/pinctrl.h>
+#include <errno.h>
+#include <malloc.h>
+#include <asm/gpio.h>
+
+#include "pinctrl-sunxi.h"
+
+extern U_BOOT_DRIVER(gpio_sunxi);
+
+const struct pinctrl_ops sunxi_pinctrl_ops = {
+ .set_state = pinctrl_generic_set_state,
+};
+
+int sunxi_pinctrl_bind(struct udevice *dev)
+{
+ struct sunxi_pinctrl_plat *plat = dev_get_plat(dev);
+ struct sunxi_pinctrl_desc *desc;
+ struct sunxi_gpio_plat *gpio_plat;
+ struct udevice *gpio_dev;
+ int i, ret;
+
+ desc = (void *)dev_get_driver_data(dev);
+ if (!desc)
+ return -EINVAL;
+ dev_set_priv(dev, desc);
+
+ plat->base = dev_read_addr_ptr(dev);
+
+ ret = device_bind_driver_to_node(dev, "gpio_sunxi", dev->name,
+ dev_ofnode(dev), &gpio_dev);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < desc->num_banks; ++i) {
+ gpio_plat = malloc(sizeof(*gpio_plat));
+ if (!gpio_plat)
+ return -ENOMEM;
+
+ gpio_plat->regs = plat->base + i;
+ gpio_plat->bank_name[0] = 'P';
+ gpio_plat->bank_name[1] = 'A' + desc->first_bank + i;
+ gpio_plat->bank_name[2] = '\0';
+
+ ret = device_bind(gpio_dev, DM_DRIVER_REF(gpio_sunxi),
+ gpio_plat->bank_name, gpio_plat,
+ ofnode_null(), NULL);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
new file mode 100644
index 0000000000..a36ddb2dde
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+struct sunxi_pinctrl_desc {
+ u8 first_bank;
+ u8 num_banks;
+};
+
+struct sunxi_pinctrl_plat {
+ struct sunxi_gpio __iomem *base;
+};
+
+extern const struct pinctrl_ops sunxi_pinctrl_ops;
+
+int sunxi_pinctrl_bind(struct udevice *dev);
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 02/23] sunxi: pinctrl: Implement pin muxing functions
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 03/23] sunxi: pinctrl: Implement get_pin_muxing function Samuel Holland
` (19 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
Implement the operations to get pin and function names, and to set the
mux for a pin. The pin count and pin names are calculated as if each
bank has the maximum number of pins. Function names are simply the index
into a list of { function name, mux value } pairs.
We assume all pins associated with a function use the same mux value for
that function. This is generally true within a group of pins on a single
port, but generally false when some peripheral can be muxed to multiple
ports. For example, A64 UART3 uses mux 3 on port D, and mux 2 on port H.
But all of the port D pins use the same mux value, and so do all of the
port H pins. This applies even when the pins for some function are not
contiguous, and when the lower-numbered mux values are unused. A good
example of both of these cases is SPI0 on most SoCs.
This strategy saves a lot of space (which is especially important for
SPL), but where the mux value for a certain function differs across
ports, it forces us to choose a single port for that function at build
time. Since almost all boards use the default (i.e. reference design)
pin muxes[1], this is unlikely to be a problem.
[1]: See commit dda9fa734f81 ("sunxi: Simplify MMC pinmux selection")
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/Kconfig | 1 +
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 7 +++
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 59 +++++++++++++++++++
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 7 +++
25 files changed, 221 insertions(+)
diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
index d1cf5d0842..bd251c20c3 100644
--- a/drivers/pinctrl/sunxi/Kconfig
+++ b/drivers/pinctrl/sunxi/Kconfig
@@ -5,6 +5,7 @@ if ARCH_SUNXI
config PINCTRL_SUNXI
select PINCTRL_FULL
select PINCTRL_GENERIC
+ select PINMUX
bool
config PINCTRL_SUN4I_A10
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
index db31f788b1..3ade2d204e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_desc = {
+ .functions = sun4i_a10_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun4i_a10_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 9,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
index 55a1eeb10b..971e441434 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun50i_a64_r_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun50i_a64_r_pinctrl_desc = {
+ .functions = sun50i_a64_r_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun50i_a64_r_pinctrl_functions),
.first_bank = SUNXI_GPIO_L,
.num_banks = 1,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
index b1f4d25d7e..4494ce7cd7 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun50i_a64_pinctrl_desc = {
+ .functions = sun50i_a64_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun50i_a64_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 8,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
index 47f441c7f0..442771d4bd 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun50i_h5_pinctrl_desc = {
+ .functions = sun50i_h5_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun50i_h5_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 7,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
index 7f44e35bcc..e60775f15e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun50i_h6_r_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun50i_h6_r_pinctrl_desc = {
+ .functions = sun50i_h6_r_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun50i_h6_r_pinctrl_functions),
.first_bank = SUNXI_GPIO_L,
.num_banks = 2,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
index c0c290bd7f..9d64942ce0 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun50i_h6_pinctrl_desc = {
+ .functions = sun50i_h6_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun50i_h6_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 8,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
index 5db7662f3e..e4cd60b70e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun50i_h616_r_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun50i_h616_r_pinctrl_desc = {
+ .functions = sun50i_h616_r_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun50i_h616_r_pinctrl_functions),
.first_bank = SUNXI_GPIO_L,
.num_banks = 1,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
index 1211eb5e2e..1c9768087b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun50i_h616_pinctrl_desc = {
+ .functions = sun50i_h616_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun50i_h616_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 9,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
index 6a4d47c5f0..d6ffa08c8f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun5i_a13_pinctrl_desc = {
+ .functions = sun5i_a13_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun5i_a13_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 7,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
index 0761eefc11..9ae676b208 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun6i_a31_r_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_desc = {
+ .functions = sun6i_a31_r_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun6i_a31_r_pinctrl_functions),
.first_bank = SUNXI_GPIO_L,
.num_banks = 2,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
index 257a47dc52..5b6ab37592 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_desc = {
+ .functions = sun6i_a31_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun6i_a31_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 8,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
index c555950441..25b4b57e14 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun7i_a20_pinctrl_desc = {
+ .functions = sun7i_a20_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun7i_a20_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 9,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
index 983a9b8ce7..fafee0cbf9 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun8i_a23_r_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_desc = {
+ .functions = sun8i_a23_r_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun8i_a23_r_pinctrl_functions),
.first_bank = SUNXI_GPIO_L,
.num_banks = 1,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
index 60f42fa003..40222ca10d 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun8i_a23_pinctrl_desc = {
+ .functions = sun8i_a23_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun8i_a23_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 8,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
index e482dff6a7..d275b5b7c2 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun8i_a33_pinctrl_desc = {
+ .functions = sun8i_a33_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun8i_a33_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 8,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
index 8417b9f25b..4301132203 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun8i_a83t_r_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun8i_a83t_r_pinctrl_desc = {
+ .functions = sun8i_a83t_r_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun8i_a83t_r_pinctrl_functions),
.first_bank = SUNXI_GPIO_L,
.num_banks = 1,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index 0391190654..e916db3c80 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_desc = {
+ .functions = sun8i_a83t_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun8i_a83t_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 8,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
index 89517519d0..5c2df17f15 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun8i_h3_r_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun8i_h3_r_pinctrl_desc = {
+ .functions = sun8i_h3_r_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun8i_h3_r_pinctrl_functions),
.first_bank = SUNXI_GPIO_L,
.num_banks = 1,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index 0edcfe25c2..50a39ce4ad 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_desc = {
+ .functions = sun8i_h3_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun8i_h3_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 7,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
index 1fce28bda1..3b407c644f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun8i_v3s_pinctrl_desc = {
+ .functions = sun8i_v3s_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun8i_v3s_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 7,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
index 8209de6cac..da30e98969 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun9i_a80_r_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun9i_a80_r_pinctrl_desc = {
+ .functions = sun9i_a80_r_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun9i_a80_r_pinctrl_functions),
.first_bank = SUNXI_GPIO_L,
.num_banks = 3,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
index 1594215df1..6268c35ca1 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
@@ -6,7 +6,14 @@
#include "pinctrl-sunxi.h"
+static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = {
+ { "gpio_in", 0 },
+ { "gpio_out", 1 },
+};
+
static const struct sunxi_pinctrl_desc sun9i_a80_pinctrl_desc = {
+ .functions = sun9i_a80_pinctrl_functions,
+ .num_functions = ARRAY_SIZE(sun9i_a80_pinctrl_functions),
.first_bank = SUNXI_GPIO_A,
.num_banks = 8,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 18aee4a1ac..bbda954f31 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -12,7 +12,66 @@
extern U_BOOT_DRIVER(gpio_sunxi);
+static int sunxi_pinctrl_get_pins_count(struct udevice *dev)
+{
+ const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev);
+
+ return desc->num_banks * SUNXI_GPIOS_PER_BANK;
+}
+
+static const char *sunxi_pinctrl_get_pin_name(struct udevice *dev,
+ uint pin_selector)
+{
+ const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev);
+ static char pin_name[sizeof("PN31")];
+
+ snprintf(pin_name, sizeof(pin_name), "P%c%d",
+ pin_selector / SUNXI_GPIOS_PER_BANK + desc->first_bank + 'A',
+ pin_selector % SUNXI_GPIOS_PER_BANK);
+
+ return pin_name;
+}
+
+static int sunxi_pinctrl_get_functions_count(struct udevice *dev)
+{
+ const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev);
+
+ return desc->num_functions;
+}
+
+static const char *sunxi_pinctrl_get_function_name(struct udevice *dev,
+ uint func_selector)
+{
+ const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev);
+
+ return desc->functions[func_selector].name;
+}
+
+static int sunxi_pinctrl_pinmux_set(struct udevice *dev, uint pin_selector,
+ uint func_selector)
+{
+ const struct sunxi_pinctrl_desc *desc = dev_get_priv(dev);
+ struct sunxi_pinctrl_plat *plat = dev_get_plat(dev);
+ int bank = pin_selector / SUNXI_GPIOS_PER_BANK;
+ int pin = pin_selector % SUNXI_GPIOS_PER_BANK;
+
+ debug("set mux: %-4s => %s (%d)\n",
+ sunxi_pinctrl_get_pin_name(dev, pin_selector),
+ sunxi_pinctrl_get_function_name(dev, func_selector),
+ desc->functions[func_selector].mux);
+
+ sunxi_gpio_set_cfgbank(plat->base + bank, pin,
+ desc->functions[func_selector].mux);
+
+ return 0;
+}
+
const struct pinctrl_ops sunxi_pinctrl_ops = {
+ .get_pins_count = sunxi_pinctrl_get_pins_count,
+ .get_pin_name = sunxi_pinctrl_get_pin_name,
+ .get_functions_count = sunxi_pinctrl_get_functions_count,
+ .get_function_name = sunxi_pinctrl_get_function_name,
+ .pinmux_set = sunxi_pinctrl_pinmux_set,
.set_state = pinctrl_generic_set_state,
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index a36ddb2dde..229deb7b70 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -1,6 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0 */
+struct sunxi_pinctrl_function {
+ const char name[sizeof("gpio_out")];
+ u8 mux;
+};
+
struct sunxi_pinctrl_desc {
+ const struct sunxi_pinctrl_function *functions;
+ u8 num_functions;
u8 first_bank;
u8 num_banks;
};
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 03/23] sunxi: pinctrl: Implement get_pin_muxing function
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 02/23] sunxi: pinctrl: Implement pin muxing functions Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 04/23] sunxi: pinctrl: Implement pin configuration Samuel Holland
` (18 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
The pinmux command uses this function to display pinmux status.
Since the driver cannot map pin numbers to a list of supported
functions, only functions which are common across all pins can be
reported by name.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index bbda954f31..e67c276a33 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -66,6 +66,32 @@ static int sunxi_pinctrl_pinmux_set(struct udevice *dev, uint pin_selector,
return 0;
}
+static int sunxi_pinctrl_get_pin_muxing(struct udevice *dev, uint pin_selector,
+ char *buf, int size)
+{
+ struct sunxi_pinctrl_plat *plat = dev_get_plat(dev);
+ int bank = pin_selector / SUNXI_GPIOS_PER_BANK;
+ int pin = pin_selector % SUNXI_GPIOS_PER_BANK;
+ int mux = sunxi_gpio_get_cfgbank(plat->base + bank, pin);
+
+ switch (mux) {
+ case SUNXI_GPIO_INPUT:
+ strlcpy(buf, "gpio input", size);
+ break;
+ case SUNXI_GPIO_OUTPUT:
+ strlcpy(buf, "gpio output", size);
+ break;
+ case SUNXI_GPIO_DISABLE:
+ strlcpy(buf, "disabled", size);
+ break;
+ default:
+ snprintf(buf, size, "function %d", mux);
+ break;
+ }
+
+ return 0;
+}
+
const struct pinctrl_ops sunxi_pinctrl_ops = {
.get_pins_count = sunxi_pinctrl_get_pins_count,
.get_pin_name = sunxi_pinctrl_get_pin_name,
@@ -73,6 +99,7 @@ const struct pinctrl_ops sunxi_pinctrl_ops = {
.get_function_name = sunxi_pinctrl_get_function_name,
.pinmux_set = sunxi_pinctrl_pinmux_set,
.set_state = pinctrl_generic_set_state,
+ .get_pin_muxing = sunxi_pinctrl_get_pin_muxing,
};
int sunxi_pinctrl_bind(struct udevice *dev)
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 04/23] sunxi: pinctrl: Implement pin configuration
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (2 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 03/23] sunxi: pinctrl: Implement get_pin_muxing function Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-24 19:53 ` Simon Glass
2021-10-21 4:55 ` [RFC PATCH 05/23] pinctrl: sunxi: Add UART pinmuxes Samuel Holland
` (17 subsequent siblings)
21 siblings, 1 reply; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
The sunxi pinctrl hardware has bias and drive control. Add driver
support for configuring those options.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/Kconfig | 1 +
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 53 +++++++++++++++++++++++++++
2 files changed, 54 insertions(+)
diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
index bd251c20c3..bb0ddeedc4 100644
--- a/drivers/pinctrl/sunxi/Kconfig
+++ b/drivers/pinctrl/sunxi/Kconfig
@@ -5,6 +5,7 @@ if ARCH_SUNXI
config PINCTRL_SUNXI
select PINCTRL_FULL
select PINCTRL_GENERIC
+ select PINCONF
select PINMUX
bool
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index e67c276a33..0ec3f7426c 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -66,6 +66,56 @@ static int sunxi_pinctrl_pinmux_set(struct udevice *dev, uint pin_selector,
return 0;
}
+static const struct pinconf_param sunxi_pinctrl_pinconf_params[] = {
+ { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
+ { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 2 },
+ { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
+ { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 10 },
+};
+
+static int sunxi_pinctrl_pinconf_set_pull(struct sunxi_pinctrl_plat *plat,
+ uint bank, uint pin, uint bias)
+{
+ struct sunxi_gpio *regs = &plat->base[bank];
+
+ sunxi_gpio_set_pull_bank(regs, pin, bias);
+
+ return 0;
+}
+
+static int sunxi_pinctrl_pinconf_set_drive(struct sunxi_pinctrl_plat *plat,
+ uint bank, uint pin, uint drive)
+{
+ struct sunxi_gpio *regs = &plat->base[bank];
+
+ if (drive < 10 || drive > 40)
+ return -EINVAL;
+
+ /* Convert mA to the register value, rounding down. */
+ sunxi_gpio_set_drv_bank(regs, pin, drive / 10 - 1);
+
+ return 0;
+}
+
+static int sunxi_pinctrl_pinconf_set(struct udevice *dev, uint pin_selector,
+ uint param, uint val)
+{
+ struct sunxi_pinctrl_plat *plat = dev_get_plat(dev);
+ int bank = pin_selector / SUNXI_GPIOS_PER_BANK;
+ int pin = pin_selector % SUNXI_GPIOS_PER_BANK;
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ case PIN_CONFIG_BIAS_PULL_UP:
+ return sunxi_pinctrl_pinconf_set_pull(plat, bank, pin, val);
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ return sunxi_pinctrl_pinconf_set_drive(plat, bank, pin, val);
+ }
+
+ return -EINVAL;
+}
+
static int sunxi_pinctrl_get_pin_muxing(struct udevice *dev, uint pin_selector,
char *buf, int size)
{
@@ -98,6 +148,9 @@ const struct pinctrl_ops sunxi_pinctrl_ops = {
.get_functions_count = sunxi_pinctrl_get_functions_count,
.get_function_name = sunxi_pinctrl_get_function_name,
.pinmux_set = sunxi_pinctrl_pinmux_set,
+ .pinconf_num_params = ARRAY_SIZE(sunxi_pinctrl_pinconf_params),
+ .pinconf_params = sunxi_pinctrl_pinconf_params,
+ .pinconf_set = sunxi_pinctrl_pinconf_set,
.set_state = pinctrl_generic_set_state,
.get_pin_muxing = sunxi_pinctrl_get_pin_muxing,
};
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 05/23] pinctrl: sunxi: Add UART pinmuxes
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (3 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 04/23] sunxi: pinctrl: Implement pin configuration Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y Samuel Holland
` (16 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This includes UART0 and R_UART (s_uart) on all supported platforms, plus
the additional UART configurations from arch/arm/mach-sunxi/board.c.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 5 +++++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 7 +++++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 7 +++++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 6 ++++++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 6 ++++++
drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 6 ++++++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 5 +++++
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 5 +++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 5 +++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 7 +++++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 7 +++++++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 7 +++++++
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 7 +++++++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 5 +++++
22 files changed, 93 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
index 3ade2d204e..b7d3413b8b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -9,6 +9,11 @@
static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 4 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PB22-PB23 */
+#endif
};
static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
index 971e441434..3bbca3a19f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun50i_a64_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc sun50i_a64_r_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
index 4494ce7cd7..978ad1d2a1 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -9,6 +9,13 @@
static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 4 }, /* PB8-PB9 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc sun50i_a64_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
index 442771d4bd..604ea89de2 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
@@ -9,6 +9,13 @@
static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PA4-PA5 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PA0-PA1 */
};
static const struct sunxi_pinctrl_desc sun50i_h5_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
index e60775f15e..d45e580ceb 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun50i_h6_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc sun50i_h6_r_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
index 9d64942ce0..389be2e577 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
@@ -9,6 +9,12 @@
static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PH0-PH1 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
};
static const struct sunxi_pinctrl_desc sun50i_h6_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
index e4cd60b70e..7fb7692239 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun50i_h616_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc sun50i_h616_r_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
index 1c9768087b..c2192098f7 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
@@ -9,6 +9,12 @@
static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PH0-PH1 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
};
static const struct sunxi_pinctrl_desc sun50i_h616_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
index d6ffa08c8f..fca7165fed 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
@@ -9,6 +9,12 @@
static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 4 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PB19-PB20 */
+#endif
+ { "uart1", 4 }, /* PG3-PG4 */
};
static const struct sunxi_pinctrl_desc sun5i_a13_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
index 9ae676b208..57182f1dc8 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun6i_a31_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
index 5b6ab37592..ca395fb701 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -9,6 +9,11 @@
static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PH20-PH21 */
+#endif
};
static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
index 25b4b57e14..b5714a63f4 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
@@ -9,6 +9,11 @@
static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 4 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PB22-PB23 */
+#endif
};
static const struct sunxi_pinctrl_desc sun7i_a20_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
index fafee0cbf9..e602808c38 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun8i_a23_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
index 40222ca10d..0325d8cc54 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
@@ -9,6 +9,11 @@
static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc sun8i_a23_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
index d275b5b7c2..259c9bbeb5 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
@@ -9,6 +9,13 @@
static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 3 }, /* PB0-PB1 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc sun8i_a33_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
index 4301132203..4daed78ac2 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun8i_a83t_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc sun8i_a83t_r_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index e916db3c80..531800e58e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -9,6 +9,13 @@
static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PB9-PB10 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
index 5c2df17f15..c05a30c8df 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun8i_h3_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 2 }, /* PL2-PL3 */
};
static const struct sunxi_pinctrl_desc sun8i_h3_r_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index 50a39ce4ad..41ecaa23e2 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -9,6 +9,13 @@
static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PA4-PA5 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PA0-PA1 */
};
static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
index 3b407c644f..df9f92f39d 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
@@ -9,6 +9,13 @@
static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 3 }, /* PF2-PF4 */
+#else
+ { "uart0", 3 }, /* PB8-PB9 */
+#endif
+ { "uart1", 2 }, /* PG6-PG7 */
+ { "uart2", 2 }, /* PB0-PB1 */
};
static const struct sunxi_pinctrl_desc sun8i_v3s_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
index da30e98969..cf46a06f8f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun9i_a80_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_uart", 3 }, /* PL0-PL1 */
};
static const struct sunxi_pinctrl_desc sun9i_a80_r_pinctrl_desc = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
index 6268c35ca1..e105adfec1 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
@@ -9,6 +9,11 @@
static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+#if IS_ENABLED(CONFIG_UART0_PORT_F)
+ { "uart0", 4 }, /* PF2-PF4 */
+#else
+ { "uart0", 2 }, /* PH12-PH13 */
+#endif
};
static const struct sunxi_pinctrl_desc sun9i_a80_pinctrl_desc = {
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (4 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 05/23] pinctrl: sunxi: Add UART pinmuxes Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-24 19:53 ` Simon Glass
2021-10-21 4:55 ` [RFC PATCH 07/23] pinctrl: sunxi: Add sun4i EMAC pinmuxes Samuel Holland
` (15 subsequent siblings)
21 siblings, 1 reply; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
When a pinctrl driver is available, it will take care of setting up
these pins. However, for now this code is still needed in SPL.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/mach-sunxi/board.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index b4ba2a72c4..59febc3ac1 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -78,6 +78,7 @@ ulong board_get_usable_ram_top(ulong total_size)
static int gpio_init(void)
{
__maybe_unused uint val;
+#if !CONFIG_IS_ENABLED(PINCTRL)
#if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F)
#if defined(CONFIG_MACH_SUN4I) || \
defined(CONFIG_MACH_SUN7I) || \
@@ -160,6 +161,7 @@ static int gpio_init(void)
#else
#error Unsupported console port number. Please fix pin mux settings in board.c
#endif
+#endif
#ifdef CONFIG_SUN50I_GEN_H6
/* Update PIO power bias configuration by copy hardware detected value */
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 07/23] pinctrl: sunxi: Add sun4i EMAC pinmuxes
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (5 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 08/23] net: sunxi_emac: Remove non-DM pin setup Samuel Holland
` (14 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
index b7d3413b8b..4a74496598 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -7,6 +7,7 @@
#include "pinctrl-sunxi.h"
static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = {
+ { "emac", 2 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
#if IS_ENABLED(CONFIG_UART0_PORT_F)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
index fca7165fed..22eb9b9f3b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
@@ -7,6 +7,7 @@
#include "pinctrl-sunxi.h"
static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = {
+ { "emac", 2 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
#if IS_ENABLED(CONFIG_UART0_PORT_F)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
index b5714a63f4..9134b26733 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
@@ -7,6 +7,7 @@
#include "pinctrl-sunxi.h"
static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
+ { "emac", 2 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
#if IS_ENABLED(CONFIG_UART0_PORT_F)
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 08/23] net: sunxi_emac: Remove non-DM pin setup
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (6 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 07/23] pinctrl: sunxi: Add sun4i EMAC pinmuxes Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-11-09 15:33 ` Heinrich Schuchardt
2021-10-21 4:55 ` [RFC PATCH 09/23] pinctrl: sunxi: Add sunxi GMAC pinmuxes Samuel Holland
` (13 subsequent siblings)
21 siblings, 1 reply; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 -
drivers/net/sunxi_emac.c | 5 -----
2 files changed, 6 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index fa99b1ca84..13bc85fecf 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -135,7 +135,6 @@ enum sunxi_gpio_number {
#define SUNXI_GPIO_OUTPUT 1
#define SUNXI_GPIO_DISABLE 7
-#define SUNXI_GPA_EMAC 2
#define SUN6I_GPA_GMAC 2
#define SUN7I_GPA_GMAC 5
#define SUN8I_H3_GPA_UART0 2
diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c
index 17ad88e732..9c68ee533b 100644
--- a/drivers/net/sunxi_emac.c
+++ b/drivers/net/sunxi_emac.c
@@ -17,7 +17,6 @@
#include <net.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
/* EMAC register */
struct emac_regs {
@@ -516,10 +515,6 @@ static int sunxi_emac_board_setup(struct udevice *dev,
/* Map SRAM to EMAC */
setbits_le32(&sram->ctrl1, 0x5 << 2);
- /* Configure pin mux settings for MII Ethernet */
- for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPA_EMAC);
-
/* Set up clock gating */
ret = clk_enable(&priv->clk);
if (ret) {
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 09/23] pinctrl: sunxi: Add sunxi GMAC pinmuxes
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (7 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 08/23] net: sunxi_emac: Remove non-DM pin setup Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 12/23] net: sun8i_emac: Remove non-DM pin setup Samuel Holland
` (12 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
index ca395fb701..b7aa9dabbe 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -7,6 +7,7 @@
#include "pinctrl-sunxi.h"
static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = {
+ { "gmac", 2 }, /* PA0-PA27 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
#if IS_ENABLED(CONFIG_UART0_PORT_F)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
index 9134b26733..a978fce733 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
@@ -8,6 +8,7 @@
static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
{ "emac", 2 }, /* PA0-PA17 */
+ { "gmac", 5 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
#if IS_ENABLED(CONFIG_UART0_PORT_F)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
index e105adfec1..70998d7b27 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
@@ -7,6 +7,7 @@
#include "pinctrl-sunxi.h"
static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = {
+ { "gmac", 2 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
#if IS_ENABLED(CONFIG_UART0_PORT_F)
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 12/23] net: sun8i_emac: Remove non-DM pin setup
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (8 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 09/23] pinctrl: sunxi: Add sunxi GMAC pinmuxes Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 13/23] pinctrl: sunxi: Add I2C pinmuxes Samuel Holland
` (11 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/net/sun8i_emac.c | 90 ----------------------------------------
1 file changed, 90 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 2e24d12214..b23faa228e 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -29,7 +29,6 @@
#include <miiphy.h>
#include <net.h>
#include <reset.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <wait_bit.h>
#define MDIO_CMD_MII_BUSY BIT(0)
@@ -81,13 +80,6 @@
#define AHB_GATE_OFFSET_EPHY 0
-/* IO mux settings */
-#define SUN8I_IOMUX_H3 2
-#define SUN8I_IOMUX_R40 5
-#define SUN8I_IOMUX_H6 5
-#define SUN8I_IOMUX_H616 2
-#define SUN8I_IOMUX 4
-
/* H3/A64 EMAC Register's offset */
#define EMAC_CTL0 0x00
#define EMAC_CTL0_FULL_DUPLEX BIT(0)
@@ -519,85 +511,6 @@ static int sun8i_emac_eth_start(struct udevice *dev)
return 0;
}
-static int parse_phy_pins(struct udevice *dev)
-{
- int offset;
- const char *pin_name;
- int drive, pull = SUN4I_PINCTRL_NO_PULL, i;
- u32 iomux;
-
- offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
- "pinctrl-0");
- if (offset < 0) {
- printf("WARNING: emac: cannot find pinctrl-0 node\n");
- return offset;
- }
-
- drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
- "drive-strength", ~0);
- if (drive != ~0) {
- if (drive <= 10)
- drive = SUN4I_PINCTRL_10_MA;
- else if (drive <= 20)
- drive = SUN4I_PINCTRL_20_MA;
- else if (drive <= 30)
- drive = SUN4I_PINCTRL_30_MA;
- else
- drive = SUN4I_PINCTRL_40_MA;
- }
-
- if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-up", NULL))
- pull = SUN4I_PINCTRL_PULL_UP;
- else if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-down", NULL))
- pull = SUN4I_PINCTRL_PULL_DOWN;
-
- /*
- * The GPIO pinmux value is an integration choice, so depends on the
- * SoC, not the EMAC variant.
- */
- if (IS_ENABLED(CONFIG_MACH_SUNXI_H3_H5))
- iomux = SUN8I_IOMUX_H3;
- else if (IS_ENABLED(CONFIG_MACH_SUN8I_R40))
- iomux = SUN8I_IOMUX_R40;
- else if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
- iomux = SUN8I_IOMUX_H6;
- else if (IS_ENABLED(CONFIG_MACH_SUN50I_H616))
- iomux = SUN8I_IOMUX_H616;
- else if (IS_ENABLED(CONFIG_MACH_SUN8I_A83T))
- iomux = SUN8I_IOMUX;
- else if (IS_ENABLED(CONFIG_MACH_SUN50I))
- iomux = SUN8I_IOMUX;
- else
- BUILD_BUG_ON_MSG(1, "missing pinmux value for Ethernet pins");
-
- for (i = 0; ; i++) {
- int pin;
-
- pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
- "pins", i, NULL);
- if (!pin_name)
- break;
-
- pin = sunxi_name_to_gpio(pin_name);
- if (pin < 0)
- continue;
-
- sunxi_gpio_set_cfgpin(pin, iomux);
-
- if (drive != ~0)
- sunxi_gpio_set_drv(pin, drive);
- if (pull != ~0)
- sunxi_gpio_set_pull(pin, pull);
- }
-
- if (!i) {
- printf("WARNING: emac: cannot find pins property\n");
- return -2;
- }
-
- return 0;
-}
-
static int sun8i_emac_eth_recv(struct udevice *dev, int flags, uchar **packetp)
{
struct emac_eth_dev *priv = dev_get_priv(dev);
@@ -965,9 +878,6 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev)
priv->interface = pdata->phy_interface;
- if (!priv->use_internal_phy)
- parse_phy_pins(dev);
-
sun8i_pdata->tx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
"allwinner,tx-delay-ps", 0);
if (sun8i_pdata->tx_delay_ps < 0 || sun8i_pdata->tx_delay_ps > 700)
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 13/23] pinctrl: sunxi: Add I2C pinmuxes
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (9 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 12/23] net: sun8i_emac: Remove non-DM pin setup Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 14/23] sunxi: Remove options and setup code for I2C2-I2C4 Samuel Holland
` (10 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
Where multiple options were available, the one matching board.c and the
device trees was chosen.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 2 ++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 2 ++
21 files changed, 35 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
index 4a74496598..0c3684cb6a 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = {
{ "emac", 2 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PB0-PB1 */
+ { "i2c1", 2 }, /* PB18-PB19 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
index 3bbca3a19f..27943bee46 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun50i_a64_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_i2c", 2 }, /* PL8-PL9 */
{ "s_uart", 2 }, /* PL2-PL3 */
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
index 91e34c032e..8b72e9d3cc 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
{ "emac", 4 }, /* PD8-PD23 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PH0-PH1 */
+ { "i2c1", 2 }, /* PH2-PH3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
index 6e37bd6b12..1a8dbd38b4 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = {
{ "emac", 2 }, /* PD0-PD17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PA11-PA12 */
+ { "i2c1", 2 }, /* PA18-PA19 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
index d45e580ceb..93057a9160 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun50i_h6_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_i2c", 3 }, /* PL0-PL1 */
{ "s_uart", 2 }, /* PL2-PL3 */
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
index ae05d08bb7..9f7e809160 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = {
{ "emac", 5 }, /* PD0-PD20 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PD25-PD26 */
+ { "i2c1", 4 }, /* PH5-PH6 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
index 7fb7692239..3084c2c22e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun50i_h616_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_i2c", 3 }, /* PL0-PL1 */
{ "s_uart", 2 }, /* PL2-PL3 */
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
index 22eb9b9f3b..6eef17f2fb 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = {
{ "emac", 2 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PB0-PB1 */
+ { "i2c1", 2 }, /* PB15-PB16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
index 57182f1dc8..3b11f76d3b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun6i_a31_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_i2c", 2 }, /* PL0-PL1 */
{ "s_uart", 2 }, /* PL2-PL3 */
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
index b7aa9dabbe..468b5d4a30 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = {
{ "gmac", 2 }, /* PA0-PA27 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PH14-PH15 */
+ { "i2c1", 2 }, /* PH16-PH17 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
index a978fce733..fabd4de3d1 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
@@ -11,6 +11,8 @@ static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
{ "gmac", 5 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PB0-PB1 */
+ { "i2c1", 2 }, /* PB18-PB19 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
index e602808c38..77f1ee4382 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun8i_a23_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_i2c", 3 }, /* PL0-PL1 */
{ "s_uart", 2 }, /* PL2-PL3 */
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
index 0325d8cc54..da790a8f14 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
@@ -9,6 +9,8 @@
static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PH2-PH3 */
+ { "i2c1", 2 }, /* PH4-PH5 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#endif
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
index 259c9bbeb5..c644f97816 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
@@ -9,6 +9,8 @@
static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PH2-PH3 */
+ { "i2c1", 2 }, /* PH4-PH5 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
index 4daed78ac2..b5ec485a83 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun8i_a83t_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_i2c", 2 }, /* PL8-PL9 */
{ "s_uart", 2 }, /* PL2-PL3 */
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index 265987c86e..1f3eea6c02 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = {
{ "gmac", 4 }, /* PD2-PD23 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PH0-PH1 */
+ { "i2c1", 2 }, /* PH2-PH3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
index c05a30c8df..176ae67d82 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c
@@ -9,6 +9,7 @@
static const struct sunxi_pinctrl_function sun8i_h3_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_i2c", 2 }, /* PL0-PL1 */
{ "s_uart", 2 }, /* PL2-PL3 */
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index fd164a5da0..e5862e1775 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = {
{ "emac", 2 }, /* PD0-PD17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PA11-PA12 */
+ { "i2c1", 3 }, /* PA18-PA19 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
index 8b241e3c30..d1db92c4f4 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = {
{ "emac", 4 }, /* PD0-PD17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PB6-PB7 */
+ { "i2c1", 2 }, /* PB8-PB9 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
index cf46a06f8f..b867089e3f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c
@@ -9,6 +9,8 @@
static const struct sunxi_pinctrl_function sun9i_a80_r_pinctrl_functions[] = {
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "s_i2c0", 2 }, /* PN0-PN1 */
+ { "s_i2c1", 3 }, /* PM8-PM9 */
{ "s_uart", 3 }, /* PL0-PL1 */
};
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
index 70998d7b27..f6b45127ca 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
@@ -10,6 +10,8 @@ static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = {
{ "gmac", 2 }, /* PA0-PA17 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "i2c0", 2 }, /* PH0-PH1 */
+ { "i2c1", 2 }, /* PH2-PH3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 14/23] sunxi: Remove options and setup code for I2C2-I2C4
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (10 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 13/23] pinctrl: sunxi: Add I2C pinmuxes Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 15/23] sunxi: Remove non-DM I2C clock/pin setup from U-Boot Samuel Holland
` (9 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
These options are not currently enabled anywhere. Any new users should
use DM clocks and pinctrl.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/include/asm/arch-sunxi/gpio.h | 9 -----
arch/arm/include/asm/arch-sunxi/i2c.h | 11 +-----
arch/arm/mach-sunxi/Kconfig | 22 ------------
board/sunxi/board.c | 48 --------------------------
4 files changed, 1 insertion(+), 89 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 2abc826840..7c44302b8b 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -141,8 +141,6 @@ enum sunxi_gpio_number {
#define SUN4I_GPB_TWI0 2
#define SUN4I_GPB_TWI1 2
#define SUN5I_GPB_TWI1 2
-#define SUN4I_GPB_TWI2 2
-#define SUN5I_GPB_TWI2 2
#define SUN8I_V3S_GPB_TWI0 2
#define SUN4I_GPB_UART0 2
#define SUN5I_GPB_UART0 2
@@ -162,9 +160,6 @@ enum sunxi_gpio_number {
#define SUNXI_GPD_LVDS0 3
#define SUNXI_GPD_PWM 2
-#define SUN8I_GPE_TWI2 3
-#define SUN50I_GPE_TWI2 3
-
#define SUNXI_GPF_SDC0 2
#define SUNXI_GPF_UART0 4
#define SUN8I_GPF_UART0 3
@@ -174,7 +169,6 @@ enum sunxi_gpio_number {
#define SUN6I_GPG_SDC1 2
#define SUN8I_GPG_SDC1 2
#define SUN8I_GPG_UART1 2
-#define SUN6I_GPG_TWI3 2
#define SUN5I_GPG_UART1 4
#define SUN6I_GPH_PWM 2
@@ -186,15 +180,12 @@ enum sunxi_gpio_number {
#define SUN6I_GPH_TWI1 2
#define SUN8I_GPH_TWI1 2
#define SUN50I_GPH_TWI1 2
-#define SUN6I_GPH_TWI2 2
#define SUN6I_GPH_UART0 2
#define SUN9I_GPH_UART0 2
#define SUN50I_H6_GPH_UART0 2
#define SUN50I_H616_GPH_UART0 2
#define SUNXI_GPI_SDC3 2
-#define SUN7I_GPI_TWI3 3
-#define SUN7I_GPI_TWI4 3
#define SUN6I_GPL0_R_P2WI_SCK 3
#define SUN6I_GPL1_R_P2WI_SDA 3
diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h b/arch/arm/include/asm/arch-sunxi/i2c.h
index 1cb2ba6b0a..3525f22e7d 100644
--- a/arch/arm/include/asm/arch-sunxi/i2c.h
+++ b/arch/arm/include/asm/arch-sunxi/i2c.h
@@ -13,17 +13,8 @@
#ifdef CONFIG_I2C1_ENABLE
#define CONFIG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE
#endif
-#ifdef CONFIG_I2C2_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_TWI2_BASE
-#endif
-#ifdef CONFIG_I2C3_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE
-#endif
-#ifdef CONFIG_I2C4_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE
-#endif
#ifdef CONFIG_R_I2C_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE5 SUNXI_R_TWI_BASE
+#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_R_TWI_BASE
#endif
/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 2c18cf02d1..24475a1f69 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -747,20 +747,6 @@ config I2C1_ENABLE
---help---
See I2C0_ENABLE help text.
-config I2C2_ENABLE
- bool "Enable I2C/TWI controller 2"
- select CMD_I2C
- ---help---
- See I2C0_ENABLE help text.
-
-if MACH_SUN6I || MACH_SUN7I
-config I2C3_ENABLE
- bool "Enable I2C/TWI controller 3"
- select CMD_I2C
- ---help---
- See I2C0_ENABLE help text.
-endif
-
if SUNXI_GEN_SUN6I || SUN50I_GEN_H6
config R_I2C_ENABLE
bool "Enable the PRCM I2C/TWI controller"
@@ -771,14 +757,6 @@ config R_I2C_ENABLE
Set this to y to enable the I2C controller which is part of the PRCM.
endif
-if MACH_SUN7I
-config I2C4_ENABLE
- bool "Enable I2C/TWI controller 4"
- select CMD_I2C
- ---help---
- See I2C0_ENABLE help text.
-endif
-
config AXP_GPIO
bool "Enable support for gpio-s on axp PMICs"
depends on AXP_PMIC_BUS
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 4f5747c34a..d7e0982557 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -104,54 +104,6 @@ void i2c_init_board(void)
#endif
#endif
-#ifdef CONFIG_I2C2_ENABLE
-#if defined(CONFIG_MACH_SUN4I) || \
- defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2);
- clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN5I)
- sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2);
- clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN6I)
- sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2);
- clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN8I)
- sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2);
- clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN50I)
- sunxi_gpio_set_cfgpin(SUNXI_GPE(14), SUN50I_GPE_TWI2);
- sunxi_gpio_set_cfgpin(SUNXI_GPE(15), SUN50I_GPE_TWI2);
- clock_twi_onoff(2, 1);
-#endif
-#endif
-
-#ifdef CONFIG_I2C3_ENABLE
-#if defined(CONFIG_MACH_SUN6I)
- sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3);
- sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3);
- clock_twi_onoff(3, 1);
-#elif defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
- sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
- clock_twi_onoff(3, 1);
-#endif
-#endif
-
-#ifdef CONFIG_I2C4_ENABLE
-#if defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4);
- sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4);
- clock_twi_onoff(4, 1);
-#endif
-#endif
-
#ifdef CONFIG_R_I2C_ENABLE
#ifdef CONFIG_MACH_SUN50I
clock_twi_onoff(5, 1);
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 15/23] sunxi: Remove non-DM I2C clock/pin setup from U-Boot
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (11 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 14/23] sunxi: Remove options and setup code for I2C2-I2C4 Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 16/23] i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C Samuel Holland
` (8 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This is now handled automatically by the clock and pinctrl drivers.
SPL still calls this function because it needes the non-DM code.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
board/sunxi/board.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index d7e0982557..d1fc95dfb2 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -204,14 +204,6 @@ int board_init(void)
}
}
-#if CONFIG_IS_ENABLED(DM_I2C)
- /*
- * Temporary workaround for enabling I2C clocks until proper sunxi DM
- * clk, reset and pinctrl drivers land.
- */
- i2c_init_board();
-#endif
-
#ifdef CONFIG_DM_MMC
/*
* Temporary workaround for enabling MMC clocks until a sunxi DM
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 16/23] i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (12 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 15/23] sunxi: Remove non-DM I2C clock/pin setup from U-Boot Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 17/23] i2c: sun8i_rsb: " Samuel Holland
` (7 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/i2c/sun6i_p2wi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/sun6i_p2wi.c b/drivers/i2c/sun6i_p2wi.c
index c9e1b3fcd5..d260067d96 100644
--- a/drivers/i2c/sun6i_p2wi.c
+++ b/drivers/i2c/sun6i_p2wi.c
@@ -105,9 +105,6 @@ static void sun6i_p2wi_init(struct sunxi_p2wi_reg *base)
/* Enable p2wi and PIO clk, and de-assert their resets */
prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_P2WI);
- sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN6I_GPL0_R_P2WI_SCK);
- sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN6I_GPL1_R_P2WI_SDA);
-
/* Reset p2wi controller and set clock to CLKIN(12)/8 = 1.5 MHz */
writel(P2WI_CTRL_RESET, &base->ctrl);
sdelay(0x100);
@@ -142,6 +139,9 @@ void p2wi_init(void)
{
struct sunxi_p2wi_reg *base = (struct sunxi_p2wi_reg *)SUN6I_P2WI_BASE;
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN6I_GPL0_R_P2WI_SCK);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN6I_GPL1_R_P2WI_SDA);
+
sun6i_p2wi_init(base);
}
#endif
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 17/23] i2c: sun8i_rsb: Only do non-DM pin setup for non-DM I2C
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (13 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 16/23] i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 18/23] pinctrl: sunxi: Add MMC pinmuxes Samuel Holland
` (6 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.
Clean up the code in the process: remove #ifdefs and recognize that the
pin configuration is the same for all sun8i/sun50i SoCs, not just those
which select CONFIG_MACH_SUN8I.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/i2c/sun8i_rsb.c | 40 ++++++++++++++++------------------------
1 file changed, 16 insertions(+), 24 deletions(-)
diff --git a/drivers/i2c/sun8i_rsb.c b/drivers/i2c/sun8i_rsb.c
index 716b245a00..20dc6ded4c 100644
--- a/drivers/i2c/sun8i_rsb.c
+++ b/drivers/i2c/sun8i_rsb.c
@@ -95,27 +95,6 @@ static int sun8i_rsb_set_device_address(struct sunxi_rsb_reg *base,
return sun8i_rsb_do_trans(base);
}
-static void sun8i_rsb_cfg_io(void)
-{
-#ifdef CONFIG_MACH_SUN8I
- sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB);
- sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB);
- sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
- sunxi_gpio_set_pull(SUNXI_GPL(1), 1);
- sunxi_gpio_set_drv(SUNXI_GPL(0), 2);
- sunxi_gpio_set_drv(SUNXI_GPL(1), 2);
-#elif defined CONFIG_MACH_SUN9I
- sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB);
- sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB);
- sunxi_gpio_set_pull(SUNXI_GPN(0), 1);
- sunxi_gpio_set_pull(SUNXI_GPN(1), 1);
- sunxi_gpio_set_drv(SUNXI_GPN(0), 2);
- sunxi_gpio_set_drv(SUNXI_GPN(1), 2);
-#else
-#error unsupported MACH_SUNXI
-#endif
-}
-
static void sun8i_rsb_set_clk(struct sunxi_rsb_reg *base)
{
u32 div = 0;
@@ -150,9 +129,6 @@ static int sun8i_rsb_init(struct sunxi_rsb_reg *base)
/* Enable RSB and PIO clk, and de-assert their resets */
prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_RSB);
- /* Setup external pins */
- sun8i_rsb_cfg_io();
-
writel(RSB_CTRL_SOFT_RST, &base->ctrl);
sun8i_rsb_set_clk(base);
@@ -185,6 +161,22 @@ int rsb_init(void)
{
struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
+ if (IS_ENABLED(CONFIG_MACH_SUN9I)) {
+ sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB);
+ sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB);
+ sunxi_gpio_set_pull(SUNXI_GPN(0), 1);
+ sunxi_gpio_set_pull(SUNXI_GPN(1), 1);
+ sunxi_gpio_set_drv(SUNXI_GPN(0), 2);
+ sunxi_gpio_set_drv(SUNXI_GPN(1), 2);
+ } else {
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB);
+ sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
+ sunxi_gpio_set_pull(SUNXI_GPL(1), 1);
+ sunxi_gpio_set_drv(SUNXI_GPL(0), 2);
+ sunxi_gpio_set_drv(SUNXI_GPL(1), 2);
+ }
+
return sun8i_rsb_init(base);
}
#endif
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 18/23] pinctrl: sunxi: Add MMC pinmuxes
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (14 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 17/23] i2c: sun8i_rsb: " Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 19/23] sunxi: Remove non-DM MMC pin setup Samuel Holland
` (5 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 8 ++++++++
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 4 ++++
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 7 +++++++
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 3 +++
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 3 +++
14 files changed, 52 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
index 0c3684cb6a..8690b62256 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -12,6 +12,14 @@ static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PB0-PB1 */
{ "i2c1", 2 }, /* PB18-PB19 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+#if IS_ENABLED(CONFIG_MMC1_PINS_PH)
+ { "mmc1", 5 }, /* PH22-PH27 */
+#else
+ { "mmc1", 4 }, /* PG0-PG5 */
+#endif
+ { "mmc2", 3 }, /* PC6-PC15 */
+ { "mmc3", 2 }, /* PI4-PI9 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
index 8b72e9d3cc..59afa04e2f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -12,6 +12,9 @@ static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PH0-PH1 */
{ "i2c1", 2 }, /* PH2-PH3 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC1-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
index 1a8dbd38b4..92ad8a200b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
@@ -12,6 +12,9 @@ static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PA11-PA12 */
{ "i2c1", 2 }, /* PA18-PA19 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC1-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
index 9f7e809160..d80886269c 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
@@ -12,6 +12,9 @@ static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PD25-PD26 */
{ "i2c1", 4 }, /* PH5-PH6 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC1-PC14 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
index bc75efea16..8e473f479b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
@@ -10,6 +10,9 @@ static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = {
{ "emac0", 2 }, /* PI0-PI16 */
{ "gpio_in", 0 },
{ "gpio_out", 1 },
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC0-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
index 6eef17f2fb..506e04dc98 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
@@ -12,6 +12,9 @@ static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PB0-PB1 */
{ "i2c1", 2 }, /* PB15-PB16 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG3-PG8 */
+ { "mmc2", 3 }, /* PC6-PC15 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
index 468b5d4a30..7cd0c41840 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -12,6 +12,10 @@ static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PH14-PH15 */
{ "i2c1", 2 }, /* PH16-PH17 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC6-PC15, PC24 */
+ { "mmc3", 4 }, /* PC6-PC15, PC24 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
index fabd4de3d1..8999a18035 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
@@ -13,6 +13,13 @@ static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PB0-PB1 */
{ "i2c1", 2 }, /* PB18-PB19 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+#if IS_ENABLED(CONFIG_MMC1_PINS_PH)
+ { "mmc1", 5 }, /* PH22-PH27 */
+#else
+ { "mmc1", 4 }, /* PG0-PG5 */
+#endif
+ { "mmc2", 3 }, /* PC5-PC15, PC24 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
index da790a8f14..5718b97ee0 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
@@ -11,6 +11,9 @@ static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PH2-PH3 */
{ "i2c1", 2 }, /* PH4-PH5 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC5-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#endif
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
index c644f97816..f980ac473c 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
@@ -11,6 +11,9 @@ static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PH2-PH3 */
{ "i2c1", 2 }, /* PH4-PH5 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC5-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index 1f3eea6c02..e52cfbd179 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -12,6 +12,9 @@ static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PH0-PH1 */
{ "i2c1", 2 }, /* PH2-PH3 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC5-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index e5862e1775..dbb3eb73ff 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -12,6 +12,9 @@ static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PA11-PA12 */
{ "i2c1", 3 }, /* PA18-PA19 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC5-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
index d1db92c4f4..463f451982 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
@@ -12,6 +12,9 @@ static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PB6-PB7 */
{ "i2c1", 2 }, /* PB8-PB9 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 2 }, /* PC0-PC10 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
index f6b45127ca..198327b933 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
@@ -12,6 +12,9 @@ static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = {
{ "gpio_out", 1 },
{ "i2c0", 2 }, /* PH0-PH1 */
{ "i2c1", 2 }, /* PH2-PH3 */
+ { "mmc0", 2 }, /* PF0-PF5 */
+ { "mmc1", 2 }, /* PG0-PG5 */
+ { "mmc2", 3 }, /* PC6-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 19/23] sunxi: Remove non-DM MMC pin setup
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (15 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 18/23] pinctrl: sunxi: Add MMC pinmuxes Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 20/23] pinctrl: sunxi: a64: Add the PWM pinmux Samuel Holland
` (4 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
board/sunxi/board.c | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index d1fc95dfb2..88f01484bd 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -204,17 +204,6 @@ int board_init(void)
}
}
-#ifdef CONFIG_DM_MMC
- /*
- * Temporary workaround for enabling MMC clocks until a sunxi DM
- * pinctrl driver lands.
- */
- mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT);
-#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
- mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA);
-#endif
-#endif /* CONFIG_DM_MMC */
-
return 0;
}
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 20/23] pinctrl: sunxi: a64: Add the PWM pinmux
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (16 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 19/23] sunxi: Remove non-DM MMC pin setup Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 21/23] pwm: sunxi: Remove non-DM pin setup Samuel Holland
` (3 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This is the only possible mux setting for the PWM peripheral.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
index 59afa04e2f..dae155cd13 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -15,6 +15,7 @@ static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC1-PC16 */
+ { "pwm", 2 }, /* PD22 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 21/23] pwm: sunxi: Remove non-DM pin setup
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (17 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 20/23] pinctrl: sunxi: a64: Add the PWM pinmux Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 22/23] pinctrl: sunxi: Add SPI0 pinmuxes Samuel Holland
` (2 subsequent siblings)
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 -
drivers/pwm/sunxi_pwm.c | 11 -----------
2 files changed, 12 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 7c44302b8b..4e3c39a640 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -158,7 +158,6 @@ enum sunxi_gpio_number {
#define SUNXI_GPD_LCD0 2
#define SUNXI_GPD_LVDS0 3
-#define SUNXI_GPD_PWM 2
#define SUNXI_GPF_SDC0 2
#define SUNXI_GPF_UART0 4
diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c
index e3d5ee456b..bb1bec05ec 100644
--- a/drivers/pwm/sunxi_pwm.c
+++ b/drivers/pwm/sunxi_pwm.c
@@ -13,7 +13,6 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/pwm.h>
-#include <asm/arch/gpio.h>
#include <power/regulator.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -45,14 +44,6 @@ static const u32 prescaler_table[] = {
1, /* 1111 */
};
-static int sunxi_pwm_config_pinmux(void)
-{
-#ifdef CONFIG_MACH_SUN50I
- sunxi_gpio_set_cfgpin(SUNXI_GPD(22), SUNXI_GPD_PWM);
-#endif
- return 0;
-}
-
static int sunxi_pwm_set_invert(struct udevice *dev, uint channel,
bool polarity)
{
@@ -137,8 +128,6 @@ static int sunxi_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
return 0;
}
- sunxi_pwm_config_pinmux();
-
if (priv->invert)
v &= ~SUNXI_PWM_CTRL_CH0_ACT_STA;
else
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 22/23] pinctrl: sunxi: Add SPI0 pinmuxes
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (18 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 21/23] pwm: sunxi: Remove non-DM pin setup Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 23/23] spi: sun4i_spi: Remove non-DM pin setup Samuel Holland
2021-11-05 13:00 ` [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Heinrich Schuchardt
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 1 +
drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 1 +
14 files changed, 14 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
index 8690b62256..52088d609e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -20,6 +20,7 @@ static const struct sunxi_pinctrl_function sun4i_a10_pinctrl_functions[] = {
#endif
{ "mmc2", 3 }, /* PC6-PC15 */
{ "mmc3", 2 }, /* PI4-PI9 */
+ { "spi0", 3 }, /* PC0-PC2, PC23 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
index dae155cd13..338e479a71 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c
@@ -16,6 +16,7 @@ static const struct sunxi_pinctrl_function sun50i_a64_pinctrl_functions[] = {
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC1-PC16 */
{ "pwm", 2 }, /* PD22 */
+ { "spi0", 4 }, /* PC0-PC3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
index 92ad8a200b..74a492aa00 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c
@@ -15,6 +15,7 @@ static const struct sunxi_pinctrl_function sun50i_h5_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC1-PC16 */
+ { "spi0", 3 }, /* PC0-PC3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
index d80886269c..b3b5228214 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
@@ -15,6 +15,7 @@ static const struct sunxi_pinctrl_function sun50i_h6_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC1-PC14 */
+ { "spi0", 4 }, /* PC0-PC7 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
index 8e473f479b..e2c956a630 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
@@ -13,6 +13,7 @@ static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC0-PC16 */
+ { "spi0", 4 }, /* PC0-PC7, PC15-PC16 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
index 506e04dc98..a70aaf7002 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
@@ -15,6 +15,7 @@ static const struct sunxi_pinctrl_function sun5i_a13_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG3-PG8 */
{ "mmc2", 3 }, /* PC6-PC15 */
+ { "spi0", 3 }, /* PC0-PC3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
index 7cd0c41840..7196f7ee21 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -16,6 +16,7 @@ static const struct sunxi_pinctrl_function sun6i_a31_pinctrl_functions[] = {
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC6-PC15, PC24 */
{ "mmc3", 4 }, /* PC6-PC15, PC24 */
+ { "spi0", 3 }, /* PC0-PC2, PC27 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
index 8999a18035..9f022278f1 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
@@ -20,6 +20,7 @@ static const struct sunxi_pinctrl_function sun7i_a20_pinctrl_functions[] = {
{ "mmc1", 4 }, /* PG0-PG5 */
#endif
{ "mmc2", 3 }, /* PC5-PC15, PC24 */
+ { "spi0", 3 }, /* PC0-PC2, PC23 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
index 5718b97ee0..eca21c5c3f 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
@@ -14,6 +14,7 @@ static const struct sunxi_pinctrl_function sun8i_a23_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC5-PC16 */
+ { "spi0", 3 }, /* PC0-PC3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#endif
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
index f980ac473c..c810914c4e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
@@ -14,6 +14,7 @@ static const struct sunxi_pinctrl_function sun8i_a33_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC5-PC16 */
+ { "spi0", 3 }, /* PC0-PC3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
index e52cfbd179..0e0cdfc464 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
@@ -15,6 +15,7 @@ static const struct sunxi_pinctrl_function sun8i_a83t_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC5-PC16 */
+ { "spi0", 3 }, /* PC0-PC3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index dbb3eb73ff..af57ae5f5b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -15,6 +15,7 @@ static const struct sunxi_pinctrl_function sun8i_h3_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC5-PC16 */
+ { "spi0", 3 }, /* PC0-PC3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
index 463f451982..8f26941940 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
@@ -15,6 +15,7 @@ static const struct sunxi_pinctrl_function sun8i_v3s_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 2 }, /* PC0-PC10 */
+ { "spi0", 3 }, /* PC0-PC3 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 3 }, /* PF2-PF4 */
#else
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
index 198327b933..1ee2356d78 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
@@ -15,6 +15,7 @@ static const struct sunxi_pinctrl_function sun9i_a80_pinctrl_functions[] = {
{ "mmc0", 2 }, /* PF0-PF5 */
{ "mmc1", 2 }, /* PG0-PG5 */
{ "mmc2", 3 }, /* PC6-PC16 */
+ { "spi0", 3 }, /* PC0-PC2, PC19 */
#if IS_ENABLED(CONFIG_UART0_PORT_F)
{ "uart0", 4 }, /* PF2-PF4 */
#else
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [RFC PATCH 23/23] spi: sun4i_spi: Remove non-DM pin setup
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (19 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 22/23] pinctrl: sunxi: Add SPI0 pinmuxes Samuel Holland
@ 2021-10-21 4:55 ` Samuel Holland
2021-11-05 13:00 ` [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Heinrich Schuchardt
21 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-21 4:55 UTC (permalink / raw)
To: u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Samuel Holland, Bharat Gooty, Heiko Schocher, Icenowy Zheng,
Jernej Skrabec, Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
drivers/spi/spi-sunxi.c | 83 -----------------------------------------
1 file changed, 83 deletions(-)
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index bc2f544e86..b6cd7ddafa 100644
--- a/drivers/spi/spi-sunxi.c
+++ b/drivers/spi/spi-sunxi.c
@@ -32,7 +32,6 @@
#include <linux/bitops.h>
#include <asm/bitops.h>
-#include <asm/gpio.h>
#include <asm/io.h>
#include <linux/iopoll.h>
@@ -180,86 +179,6 @@ static void sun4i_spi_set_cs(struct udevice *bus, u8 cs, bool enable)
writel(reg, SPI_REG(priv, SPI_TCR));
}
-static int sun4i_spi_parse_pins(struct udevice *dev)
-{
- const void *fdt = gd->fdt_blob;
- const char *pin_name;
- const fdt32_t *list;
- u32 phandle;
- int drive, pull = 0, pin, i;
- int offset;
- int size;
-
- list = fdt_getprop(fdt, dev_of_offset(dev), "pinctrl-0", &size);
- if (!list) {
- printf("WARNING: sun4i_spi: cannot find pinctrl-0 node\n");
- return -EINVAL;
- }
-
- while (size) {
- phandle = fdt32_to_cpu(*list++);
- size -= sizeof(*list);
-
- offset = fdt_node_offset_by_phandle(fdt, phandle);
- if (offset < 0)
- return offset;
-
- drive = fdt_getprop_u32_default_node(fdt, offset, 0,
- "drive-strength", 0);
- if (drive) {
- if (drive <= 10)
- drive = 0;
- else if (drive <= 20)
- drive = 1;
- else if (drive <= 30)
- drive = 2;
- else
- drive = 3;
- } else {
- drive = fdt_getprop_u32_default_node(fdt, offset, 0,
- "allwinner,drive",
- 0);
- drive = min(drive, 3);
- }
-
- if (fdt_get_property(fdt, offset, "bias-disable", NULL))
- pull = 0;
- else if (fdt_get_property(fdt, offset, "bias-pull-up", NULL))
- pull = 1;
- else if (fdt_get_property(fdt, offset, "bias-pull-down", NULL))
- pull = 2;
- else
- pull = fdt_getprop_u32_default_node(fdt, offset, 0,
- "allwinner,pull",
- 0);
- pull = min(pull, 2);
-
- for (i = 0; ; i++) {
- pin_name = fdt_stringlist_get(fdt, offset,
- "pins", i, NULL);
- if (!pin_name) {
- pin_name = fdt_stringlist_get(fdt, offset,
- "allwinner,pins",
- i, NULL);
- if (!pin_name)
- break;
- }
-
- pin = sunxi_name_to_gpio(pin_name);
- if (pin < 0)
- break;
-
- if (IS_ENABLED(CONFIG_MACH_SUN50I))
- sunxi_gpio_set_cfgpin(pin, SUN50I_GPC_SPI0);
- else
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0);
- sunxi_gpio_set_drv(pin, drive);
- sunxi_gpio_set_pull(pin, pull);
- }
- }
- return 0;
-}
-
static inline int sun4i_spi_set_clock(struct udevice *dev, bool enable)
{
struct sun4i_spi_priv *priv = dev_get_priv(dev);
@@ -506,8 +425,6 @@ static int sun4i_spi_probe(struct udevice *bus)
return ret;
}
- sun4i_spi_parse_pins(bus);
-
priv->variant = plat->variant;
priv->base = plat->base;
priv->freq = plat->max_hz;
--
2.32.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton
2021-10-21 4:55 ` [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton Samuel Holland
@ 2021-10-21 5:13 ` Sean Anderson
2021-10-22 3:55 ` Samuel Holland
0 siblings, 1 reply; 28+ messages in thread
From: Sean Anderson @ 2021-10-21 5:13 UTC (permalink / raw)
To: Samuel Holland, u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Bharat Gooty, Heiko Schocher, Icenowy Zheng, Jernej Skrabec,
Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
On 10/21/21 12:55 AM, Samuel Holland wrote:
> Create a do-nothing driver for each sunxi pin controller variant.
>
> Since only one driver can automatically bind to a DT node, since the
> GPIO driver already requires a manual binding process, and since the
> pinctrl driver needs access to some of the same information, refactor
> the GPIO driver to be bound by the pinctrl driver. This commit should
> cause no functional change.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>
> MAINTAINERS | 1 +
> arch/arm/Kconfig | 1 +
> arch/arm/include/asm/arch-sunxi/gpio.h | 5 +
> drivers/gpio/sunxi_gpio.c | 130 +-----------------
> drivers/pinctrl/Kconfig | 1 +
> drivers/pinctrl/Makefile | 2 +-
> drivers/pinctrl/sunxi/Kconfig | 120 ++++++++++++++++
> drivers/pinctrl/sunxi/Makefile | 26 ++++
> drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 33 +++++
> drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 33 +++++
> drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 33 +++++
> drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 33 +++++
> drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 29 ++++
> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 57 ++++++++
> drivers/pinctrl/sunxi/pinctrl-sunxi.h | 14 ++
> 32 files changed, 882 insertions(+), 129 deletions(-)
General question: why is this broken up into different U_BOOT_DRIVERs?
Couldn't this be done with one driver and one array of udevice_ids?
--Sean
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton
2021-10-21 5:13 ` Sean Anderson
@ 2021-10-22 3:55 ` Samuel Holland
0 siblings, 0 replies; 28+ messages in thread
From: Samuel Holland @ 2021-10-22 3:55 UTC (permalink / raw)
To: Sean Anderson, u-boot, Jagan Teki, Andre Przywara, Simon Glass
Cc: Bharat Gooty, Heiko Schocher, Icenowy Zheng, Jernej Skrabec,
Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang
Hi,
On 10/21/21 12:13 AM, Sean Anderson wrote:
>
> On 10/21/21 12:55 AM, Samuel Holland wrote:
>> Create a do-nothing driver for each sunxi pin controller variant.
>>
>> Since only one driver can automatically bind to a DT node, since the
>> GPIO driver already requires a manual binding process, and since the
>> pinctrl driver needs access to some of the same information, refactor
>> the GPIO driver to be bound by the pinctrl driver. This commit should
>> cause no functional change.
>>
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>>
>> MAINTAINERS | 1 +
>> arch/arm/Kconfig | 1 +
>> arch/arm/include/asm/arch-sunxi/gpio.h | 5 +
>> drivers/gpio/sunxi_gpio.c | 130 +-----------------
>> drivers/pinctrl/Kconfig | 1 +
>> drivers/pinctrl/Makefile | 2 +-
>> drivers/pinctrl/sunxi/Kconfig | 120 ++++++++++++++++
>> drivers/pinctrl/sunxi/Makefile | 26 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun50i-h616-r.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 33 +++++
>> drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 33 +++++
>> drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 33 +++++
>> drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 33 +++++
>> drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 29 ++++
>> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 57 ++++++++
>> drivers/pinctrl/sunxi/pinctrl-sunxi.h | 14 ++
>> 32 files changed, 882 insertions(+), 129 deletions(-)
>
> General question: why is this broken up into different U_BOOT_DRIVERs?
> Couldn't this be done with one driver and one array of udevice_ids?
It could be done with one driver, and that's how I originally did it.
But it required a large block of `extern` declarations in the local
header, and an #ifdef around each entry in .of_match, both of which
seemed less than ideal. (One example of this style is PINCTRL_PFC in
drivers/pinctrl/renesas.)
I do like the single-driver style from a memory usage perspective.
On the other hand, the one-driver-per-variant style is already used by
drivers/clk/sunxi.
I do not have a strong opinion either way; it is not much work to go
back to the single-driver style. I'll leave it up to the maintainers.
Regards,
Samuel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [RFC PATCH 04/23] sunxi: pinctrl: Implement pin configuration
2021-10-21 4:55 ` [RFC PATCH 04/23] sunxi: pinctrl: Implement pin configuration Samuel Holland
@ 2021-10-24 19:53 ` Simon Glass
0 siblings, 0 replies; 28+ messages in thread
From: Simon Glass @ 2021-10-24 19:53 UTC (permalink / raw)
To: Samuel Holland
Cc: U-Boot Mailing List, Jagan Teki, Andre Przywara, Bharat Gooty,
Heiko Schocher, Icenowy Zheng, Jernej Skrabec, Joe Hershberger,
Pratyush Yadav, Ramon Fried, Rayagonda Kokatanur, Yuan Fang
On Wed, 20 Oct 2021 at 22:55, Samuel Holland <samuel@sholland.org> wrote:
>
> The sunxi pinctrl hardware has bias and drive control. Add driver
> support for configuring those options.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>
> drivers/pinctrl/sunxi/Kconfig | 1 +
> drivers/pinctrl/sunxi/pinctrl-sunxi.c | 53 +++++++++++++++++++++++++++
> 2 files changed, 54 insertions(+)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [RFC PATCH 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y
2021-10-21 4:55 ` [RFC PATCH 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y Samuel Holland
@ 2021-10-24 19:53 ` Simon Glass
0 siblings, 0 replies; 28+ messages in thread
From: Simon Glass @ 2021-10-24 19:53 UTC (permalink / raw)
To: Samuel Holland
Cc: U-Boot Mailing List, Jagan Teki, Andre Przywara, Bharat Gooty,
Heiko Schocher, Icenowy Zheng, Jernej Skrabec, Joe Hershberger,
Pratyush Yadav, Ramon Fried, Rayagonda Kokatanur, Yuan Fang
On Wed, 20 Oct 2021 at 22:55, Samuel Holland <samuel@sholland.org> wrote:
>
> When a pinctrl driver is available, it will take care of setting up
> these pins. However, for now this code is still needed in SPL.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>
> arch/arm/mach-sunxi/board.c | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
` (20 preceding siblings ...)
2021-10-21 4:55 ` [RFC PATCH 23/23] spi: sun4i_spi: Remove non-DM pin setup Samuel Holland
@ 2021-11-05 13:00 ` Heinrich Schuchardt
21 siblings, 0 replies; 28+ messages in thread
From: Heinrich Schuchardt @ 2021-11-05 13:00 UTC (permalink / raw)
To: Samuel Holland
Cc: Bharat Gooty, Heiko Schocher, Icenowy Zheng, Jernej Skrabec,
Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang, u-boot, Jagan Teki, Simon Glass,
Andre Przywara
On 10/21/21 06:55, Samuel Holland wrote:
> This series resolves some longstanding TODOs by implementing a pinctrl
> driver for sunxi platforms and converting DM drivers to use it.
>
> I am sending this as RFC because I have only tested this on a limited
> amount of hardware, and there are quite a few magic numbers involved,
> so it is likely I missed something. Also, I'm not sure the how best to
> split up the patches by subsystem, or if that is necessary.
>
> This series depends on the sunxi-gpio series I just sent.
>
>
> Samuel Holland (23):
Dear Samuel,
I cannot find patches 10 and 11 in
https://lore.kernel.org/u-boot/20211021045540.31578-1-samuel@sholland.org/
https://patchwork.ozlabs.org/project/uboot/list/?series=268188
Instead of resending the whole series you could just send the missing
patches with
git send-email \
--in-reply-to="20211021045540.31578-1-samuel@sholland.org"
Best regards
Heinrich
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [RFC PATCH 08/23] net: sunxi_emac: Remove non-DM pin setup
2021-10-21 4:55 ` [RFC PATCH 08/23] net: sunxi_emac: Remove non-DM pin setup Samuel Holland
@ 2021-11-09 15:33 ` Heinrich Schuchardt
0 siblings, 0 replies; 28+ messages in thread
From: Heinrich Schuchardt @ 2021-11-09 15:33 UTC (permalink / raw)
To: Samuel Holland
Cc: Bharat Gooty, Heiko Schocher, Icenowy Zheng, Jernej Skrabec,
Joe Hershberger, Pratyush Yadav, Ramon Fried,
Rayagonda Kokatanur, Yuan Fang, Simon Glass, Jagan Teki,
Andre Przywara, u-boot
On 10/21/21 06:55, Samuel Holland wrote:
> This is now handled automatically by the pinctrl driver.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>
> arch/arm/include/asm/arch-sunxi/gpio.h | 1 -
> drivers/net/sunxi_emac.c | 5 -----
> 2 files changed, 6 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index fa99b1ca84..13bc85fecf 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -135,7 +135,6 @@ enum sunxi_gpio_number {
> #define SUNXI_GPIO_OUTPUT 1
> #define SUNXI_GPIO_DISABLE 7
>
> -#define SUNXI_GPA_EMAC 2
> #define SUN6I_GPA_GMAC 2
> #define SUN7I_GPA_GMAC 5
> #define SUN8I_H3_GPA_UART0 2
> diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c
> index 17ad88e732..9c68ee533b 100644
> --- a/drivers/net/sunxi_emac.c
> +++ b/drivers/net/sunxi_emac.c
> @@ -17,7 +17,6 @@
> #include <net.h>
> #include <asm/io.h>
> #include <asm/arch/clock.h>
> -#include <asm/arch/gpio.h>
>
> /* EMAC register */
> struct emac_regs {
> @@ -516,10 +515,6 @@ static int sunxi_emac_board_setup(struct udevice *dev,
> /* Map SRAM to EMAC */
> setbits_le32(&sram->ctrl1, 0x5 << 2);
>
> - /* Configure pin mux settings for MII Ethernet */
> - for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
> - sunxi_gpio_set_cfgpin(pin, SUNXI_GPA_EMAC);
> -
This leads to an error:
+drivers/net/sunxi_emac.c: In function 'sunxi_emac_board_setup':
+drivers/net/sunxi_emac.c:513:13: error: unused variable 'pin'
[-Werror=unused-variable]
+ 513 | int pin, ret;
+ | ^~~
Please, remove the unused variable.
Best regards
Heinrich
> /* Set up clock gating */
> ret = clk_enable(&priv->clk);
> if (ret) {
>
^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2021-11-09 15:33 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-21 4:55 [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton Samuel Holland
2021-10-21 5:13 ` Sean Anderson
2021-10-22 3:55 ` Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 02/23] sunxi: pinctrl: Implement pin muxing functions Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 03/23] sunxi: pinctrl: Implement get_pin_muxing function Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 04/23] sunxi: pinctrl: Implement pin configuration Samuel Holland
2021-10-24 19:53 ` Simon Glass
2021-10-21 4:55 ` [RFC PATCH 05/23] pinctrl: sunxi: Add UART pinmuxes Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y Samuel Holland
2021-10-24 19:53 ` Simon Glass
2021-10-21 4:55 ` [RFC PATCH 07/23] pinctrl: sunxi: Add sun4i EMAC pinmuxes Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 08/23] net: sunxi_emac: Remove non-DM pin setup Samuel Holland
2021-11-09 15:33 ` Heinrich Schuchardt
2021-10-21 4:55 ` [RFC PATCH 09/23] pinctrl: sunxi: Add sunxi GMAC pinmuxes Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 12/23] net: sun8i_emac: Remove non-DM pin setup Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 13/23] pinctrl: sunxi: Add I2C pinmuxes Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 14/23] sunxi: Remove options and setup code for I2C2-I2C4 Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 15/23] sunxi: Remove non-DM I2C clock/pin setup from U-Boot Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 16/23] i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 17/23] i2c: sun8i_rsb: " Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 18/23] pinctrl: sunxi: Add MMC pinmuxes Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 19/23] sunxi: Remove non-DM MMC pin setup Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 20/23] pinctrl: sunxi: a64: Add the PWM pinmux Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 21/23] pwm: sunxi: Remove non-DM pin setup Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 22/23] pinctrl: sunxi: Add SPI0 pinmuxes Samuel Holland
2021-10-21 4:55 ` [RFC PATCH 23/23] spi: sun4i_spi: Remove non-DM pin setup Samuel Holland
2021-11-05 13:00 ` [RFC PATCH 00/23] sunxi: Add and use a pinctrl driver Heinrich Schuchardt
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