* [PATCH 1/2] arm64: dts: imx8mp: add eqos node and alias
@ 2021-02-16 9:38 Marek Vasut
2021-02-16 9:38 ` [PATCH 2/2] arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP Marek Vasut
0 siblings, 1 reply; 4+ messages in thread
From: Marek Vasut @ 2021-02-16 9:38 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Dong Aisheng, Peng Fan, NXP Linux Team,
Teresa Remmet, Heiko Schocher, Shawn Guo
Add EQOS GMAC node per Documentation/devicetree/bindings/net/imx-dwmac.txt ,
leave out the nvmem entries as that is not yet available, so the MAC has to
be passed in via DT by the bootloader.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Teresa Remmet <t.remmet@phytec.de>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 60083e8aa4272..733961b7e2ec6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -18,6 +18,7 @@
aliases {
ethernet0 = &fec;
+ ethernet1 = &eqos;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
@@ -786,6 +787,28 @@
nvmem_macaddr_swap;
status = "disabled";
};
+
+ eqos: ethernet@30bf0000 {
+ compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a";
+ reg = <0x30bf0000 0x10000>;
+ interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "eth_wake_irq", "macirq";
+ clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
+ <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
+ <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
+ <&clk IMX8MP_CLK_ENET_QOS>;
+ clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
+ assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
+ <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
+ <&clk IMX8MP_CLK_ENET_QOS>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
+ <&clk IMX8MP_SYS_PLL2_100M>,
+ <&clk IMX8MP_SYS_PLL2_125M>;
+ assigned-clock-rates = <0>, <100000000>, <125000000>;
+ intf_mode = <&gpr 0x4>;
+ status = "disabled";
+ };
};
aips4: bus@32c00000 {
--
2.30.0
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^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP
2021-02-16 9:38 [PATCH 1/2] arm64: dts: imx8mp: add eqos node and alias Marek Vasut
@ 2021-02-16 9:38 ` Marek Vasut
2021-02-17 20:17 ` Teresa Remmet
0 siblings, 1 reply; 4+ messages in thread
From: Marek Vasut @ 2021-02-16 9:38 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Dong Aisheng, Peng Fan, NXP Linux Team,
Teresa Remmet, Heiko Schocher, Shawn Guo
The board has both MACs routed out, enable the EQOS.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Teresa Remmet <t.remmet@phytec.de>
---
.../dts/freescale/imx8mp-phycore-som.dtsi | 44 +++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
index 44a8c2337cee4..526197b6972c3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
@@ -38,6 +38,30 @@
cpu-supply = <&buck2>;
};
+&eqos {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_eqos>;
+ phy-mode = "rgmii-id";
+ phy-handle = <ðphy0>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
+ enet-phy-lane-no-swap;
+ };
+ };
+};
+
/* ethernet 1 */
&fec {
pinctrl-names = "default";
@@ -197,6 +221,26 @@
};
&iomuxc {
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3
+ MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3
+ MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91
+ MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91
+ MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91
+ MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91
+ MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91
+ MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91
+ MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f
+ MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f
+ MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f
+ MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f
+ MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
+ MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f
+ MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x10
+ >;
+ };
+
pinctrl_fec: fecgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3
--
2.30.0
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 2/2] arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP
2021-02-16 9:38 ` [PATCH 2/2] arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP Marek Vasut
@ 2021-02-17 20:17 ` Teresa Remmet
2021-02-28 21:14 ` Marek Vasut
0 siblings, 1 reply; 4+ messages in thread
From: Teresa Remmet @ 2021-02-17 20:17 UTC (permalink / raw)
To: linux-arm-kernel, marex; +Cc: aisheng.dong, peng.fan, hs, shawnguo, linux-imx
Hello Marek,
Am Dienstag, den 16.02.2021, 10:38 +0100 schrieb Marek Vasut:
> The board has both MACs routed out, enable the EQOS.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Dong Aisheng <aisheng.dong@nxp.com>
> Cc: Heiko Schocher <hs@denx.de>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Teresa Remmet <t.remmet@phytec.de>
> ---
> .../dts/freescale/imx8mp-phycore-som.dtsi | 44
> +++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> index 44a8c2337cee4..526197b6972c3 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
> @@ -38,6 +38,30 @@
> cpu-supply = <&buck2>;
> };
>
> +&eqos {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_eqos>;
> + phy-mode = "rgmii-id";
> + phy-handle = <ðphy0>;
> + status = "okay";
> +
> + mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy0: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0x1>;
> + ti,rx-internal-delay =
> <DP83867_RGMIIDCTL_1_50_NS>;
> + ti,tx-internal-delay =
> <DP83867_RGMIIDCTL_1_50_NS>;
> + ti,fifo-depth =
> <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
> + enet-phy-lane-no-swap;
> + };
> + };
> +};
I would prefer having this added to imx8mp-phyboard-pollux-rdk.dts.
The phy of eqos is populated on the carrier board and not on the SoM.
Boards using the same SoM should not need to patch in the imx8mp-phycore-som.dtsi
to make it fit for their selected phy.
Thanks!
Regards,
Teresa
> +
> /* ethernet 1 */
> &fec {
> pinctrl-names = "default";
> @@ -197,6 +221,26 @@
> };
>
> &iomuxc {
> + pinctrl_eqos: eqosgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC
> 0x3
> + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO
> 0x3
> + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0
> 0x91
> + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1
> 0x91
> + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2
> 0x91
> + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3
> 0x91
> + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENER
> ATE_RX_CLK 0x91
> + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL
> 0x91
> + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0
> 0x1f
> + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1
> 0x1f
> + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2
> 0x1f
> + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3
> 0x1f
> + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL
> 0x1f
> + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENER
> ATE_TX_CLK 0x1f
> + MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20
> 0x10
> + >;
> + };
> +
> pinctrl_fec: fecgrp {
> fsl,pins = <
> MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH 2/2] arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP
2021-02-17 20:17 ` Teresa Remmet
@ 2021-02-28 21:14 ` Marek Vasut
0 siblings, 0 replies; 4+ messages in thread
From: Marek Vasut @ 2021-02-28 21:14 UTC (permalink / raw)
To: Teresa Remmet, linux-arm-kernel
Cc: aisheng.dong, peng.fan, hs, shawnguo, linux-imx
On 2/17/21 9:17 PM, Teresa Remmet wrote:
> Hello Marek,
Hello Teresa,
> Am Dienstag, den 16.02.2021, 10:38 +0100 schrieb Marek Vasut:
>> The board has both MACs routed out, enable the EQOS.
[...]
>> --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
>> @@ -38,6 +38,30 @@
>> cpu-supply = <&buck2>;
>> };
>>
>> +&eqos {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_eqos>;
>> + phy-mode = "rgmii-id";
>> + phy-handle = <ðphy0>;
>> + status = "okay";
>> +
>> + mdio {
>> + compatible = "snps,dwmac-mdio";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + ethphy0: ethernet-phy@1 {
>> + compatible = "ethernet-phy-ieee802.3-c22";
>> + reg = <0x1>;
>> + ti,rx-internal-delay =
>> <DP83867_RGMIIDCTL_1_50_NS>;
>> + ti,tx-internal-delay =
>> <DP83867_RGMIIDCTL_1_50_NS>;
>> + ti,fifo-depth =
>> <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
>> + ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
>> + enet-phy-lane-no-swap;
>> + };
>> + };
>> +};
>
> I would prefer having this added to imx8mp-phyboard-pollux-rdk.dts.
> The phy of eqos is populated on the carrier board and not on the SoM.
> Boards using the same SoM should not need to patch in the imx8mp-phycore-som.dtsi
> to make it fit for their selected phy.
All right, V2 is coming soon.
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^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-02-28 21:16 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2021-02-16 9:38 [PATCH 1/2] arm64: dts: imx8mp: add eqos node and alias Marek Vasut
2021-02-16 9:38 ` [PATCH 2/2] arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP Marek Vasut
2021-02-17 20:17 ` Teresa Remmet
2021-02-28 21:14 ` Marek Vasut
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