[PATCH] arm64: zynqmp: Add resets property to sdhci nodes

[PATCH] arm64: zynqmp: Add resets property to sdhci nodes

[Michal Simek]

From: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>

Add "resets" property to sdhci nodes.
resets property is used to reset the SD host controller when
dynamic configuration support is enabled.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm/dts/zynqmp.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 755a4ed2e515..c44260885023 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -742,6 +742,7 @@
 			#clock-cells = <1>;
 			clock-output-names = "clk_out_sd0", "clk_in_sd0";
 			power-domains = <&zynqmp_firmware PD_SD_0>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_SDIO0>;
 		};
 
 		sdhci1: mmc@ff170000 {
@@ -758,6 +759,7 @@
 			#clock-cells = <1>;
 			clock-output-names = "clk_out_sd1", "clk_in_sd1";
 			power-domains = <&zynqmp_firmware PD_SD_1>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_SDIO1>;
 		};
 
 		smmu: iommu@fd800000 {
-- 
2.35.1

Re: [PATCH] arm64: zynqmp: Add resets property to sdhci nodes

[Michal Simek]

po 28. 2. 2022 v 15:59 odesílatel Michal Simek <michal.simek@xilinx.com> napsal:
>
> From: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
>
> Add "resets" property to sdhci nodes.
> resets property is used to reset the SD host controller when
> dynamic configuration support is enabled.
>
> Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
>  arch/arm/dts/zynqmp.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
> index 755a4ed2e515..c44260885023 100644
> --- a/arch/arm/dts/zynqmp.dtsi
> +++ b/arch/arm/dts/zynqmp.dtsi
> @@ -742,6 +742,7 @@
>                         #clock-cells = <1>;
>                         clock-output-names = "clk_out_sd0", "clk_in_sd0";
>                         power-domains = <&zynqmp_firmware PD_SD_0>;
> +                       resets = <&zynqmp_reset ZYNQMP_RESET_SDIO0>;
>                 };
>
>                 sdhci1: mmc@ff170000 {
> @@ -758,6 +759,7 @@
>                         #clock-cells = <1>;
>                         clock-output-names = "clk_out_sd1", "clk_in_sd1";
>                         power-domains = <&zynqmp_firmware PD_SD_1>;
> +                       resets = <&zynqmp_reset ZYNQMP_RESET_SDIO1>;
>                 };
>
>                 smmu: iommu@fd800000 {
> --
> 2.35.1
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs