* [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups
@ 2019-02-26 19:33 Markus Armbruster
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 01/11] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02 Markus Armbruster
` (11 more replies)
0 siblings, 12 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:33 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc
Alex Bennée posted this patch to address an XXX comment in
pflash_cfi01_realize() the other day:
Subject: [PATCH v2] hw/block: report when pflash backing file isn't aligned
Message-Id: <20190215122808.22301-1-alex.bennee@linaro.org>
https://lists.nongnu.org/archive/html/qemu-devel/2019-02/msg04166.html
Review led me to look into its callers. Most of them are pleasantly
boring: they create flash memory of some fixed size at some fixed
address. A few are more creative, and some of the creative ones look
quite broken to me. Fix them, and clean up some along the way.
v2:
* PATCH 01+10: Style cleanups [checkpatch]
* PATCH 02: Rewritten [Peter, Philippe]
* PATCH 03+04: New [Philippe]
* PATCH 06: Commit message improved, FIXME added, accidental
replacement of 64 * KiB by 65536 backed out [Zoltan]
* PATCH 07: Style tweak [Alex, David]
* PATCH 08: Commit message typo [Philippe]
* PATCH 11: Commit message typo [László]
* Old PATCH 10 dropped [Max, Peter]
Markus Armbruster (11):
pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02
pflash_cfi01: Do not exit() on guest aborting "write to buffer"
pflash_cfi01: Log use of flawed "write to buffer"
pflash: Rename *CFI_PFLASH* to *PFLASH_CFI*
hw: Use PFLASH_CFI0{1,2} and TYPE_PFLASH_CFI0{1,2}
sam460ex: Don't size flash memory to match backing image
ppc405_boards: Don't size flash memory to match backing image
r2d: Flash memory creation is confused about size, mark FIXME
mips_malta: Clean up definition of flash memory size somewhat
pflash: Clean up after commit 368a354f02b part 1
pflash: Clean up after commit 368a354f02b part 2
hw/arm/collie.c | 9 +-
hw/arm/digic_boards.c | 3 +-
hw/arm/gumstix.c | 8 +-
hw/arm/mainstone.c | 4 +-
hw/arm/musicpal.c | 8 +-
hw/arm/omap_sx1.c | 8 +-
hw/arm/versatilepb.c | 3 +-
hw/arm/vexpress.c | 10 +-
hw/arm/virt.c | 3 +-
hw/arm/xilinx_zynq.c | 5 +-
hw/arm/z2.c | 5 +-
hw/block/pflash_cfi01.c | 123 ++++++++++++-----------
hw/block/pflash_cfi02.c | 79 ++++++++-------
hw/i386/pc_sysfw.c | 10 +-
hw/lm32/lm32_boards.c | 8 +-
hw/lm32/milkymist.c | 4 +-
hw/microblaze/petalogix_ml605_mmu.c | 5 +-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 4 +-
hw/mips/mips_malta.c | 15 ++-
hw/mips/mips_r4k.c | 4 +-
hw/ppc/ppc405_boards.c | 57 ++++-------
hw/ppc/sam460ex.c | 41 +++++---
hw/ppc/virtex_ml507.c | 4 +-
hw/sh4/r2d.c | 11 +-
hw/xtensa/xtfpga.c | 12 +--
include/hw/block/flash.h | 57 +++++++----
26 files changed, 257 insertions(+), 243 deletions(-)
--
2.17.2
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 01/11] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
@ 2019-02-26 19:33 ` Markus Armbruster
2019-03-05 12:22 ` Philippe Mathieu-Daudé
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer" Markus Armbruster
` (10 subsequent siblings)
11 siblings, 1 reply; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:33 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc
flash.h's incomplete struct pflash_t is completed both in
pflash_cfi01.c and in pflash_cfi02.c. The complete types are
incompatible. This can hide type errors, such as passing a pflash_t
created with pflash_cfi02_register() to pflash_cfi01_get_memory().
Furthermore, POSIX reserves typedef names ending with _t.
Rename the two structs to PFlashCFI01 and PFlashCFI02.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
hw/arm/vexpress.c | 8 ++--
hw/block/pflash_cfi01.c | 89 +++++++++++++++++++++-------------------
hw/block/pflash_cfi02.c | 71 +++++++++++++++++---------------
hw/i386/pc_sysfw.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/xtensa/xtfpga.c | 10 ++---
include/hw/block/flash.h | 53 ++++++++++++++----------
7 files changed, 125 insertions(+), 110 deletions(-)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index c02d18ee61..ed46d2e730 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -512,8 +512,8 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt)
/* Open code a private version of pflash registration since we
* need to set non-default device width for VExpress platform.
*/
-static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
- DriveInfo *di)
+static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name,
+ DriveInfo *di)
{
DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
@@ -536,7 +536,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
- return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
+ return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
}
static void vexpress_common_init(MachineState *machine)
@@ -548,7 +548,7 @@ static void vexpress_common_init(MachineState *machine)
qemu_irq pic[64];
uint32_t sys_id;
DriveInfo *dinfo;
- pflash_t *pflash0;
+ PFlashCFI01 *pflash0;
I2CBus *i2c;
ram_addr_t vram_size, sram_size;
MemoryRegion *sysmem = get_system_memory();
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index bffb4c40e7..a51ac9f399 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -65,12 +65,13 @@ do { \
#define DPRINTF(fmt, ...) do { } while (0)
#endif
-#define CFI_PFLASH01(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH01)
+#define CFI_PFLASH01(obj) \
+ OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01)
#define PFLASH_BE 0
#define PFLASH_SECURE 1
-struct pflash_t {
+struct PFlashCFI01 {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
@@ -109,17 +110,17 @@ static const VMStateDescription vmstate_pflash = {
.minimum_version_id = 1,
.post_load = pflash_post_load,
.fields = (VMStateField[]) {
- VMSTATE_UINT8(wcycle, pflash_t),
- VMSTATE_UINT8(cmd, pflash_t),
- VMSTATE_UINT8(status, pflash_t),
- VMSTATE_UINT64(counter, pflash_t),
+ VMSTATE_UINT8(wcycle, PFlashCFI01),
+ VMSTATE_UINT8(cmd, PFlashCFI01),
+ VMSTATE_UINT8(status, PFlashCFI01),
+ VMSTATE_UINT64(counter, PFlashCFI01),
VMSTATE_END_OF_LIST()
}
};
static void pflash_timer (void *opaque)
{
- pflash_t *pfl = opaque;
+ PFlashCFI01 *pfl = opaque;
trace_pflash_timer_expired(pfl->cmd);
/* Reset flash */
@@ -133,7 +134,7 @@ static void pflash_timer (void *opaque)
* If this code is called we know we have a device_width set for
* this flash.
*/
-static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)
+static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr offset)
{
int i;
uint32_t resp = 0;
@@ -193,7 +194,7 @@ static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)
/* Perform a device id query based on the bank width of the flash. */
-static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
+static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hwaddr offset)
{
int i;
uint32_t resp;
@@ -241,7 +242,7 @@ static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
return resp;
}
-static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
+static uint32_t pflash_data_read(PFlashCFI01 *pfl, hwaddr offset,
int width, int be)
{
uint8_t *p;
@@ -284,8 +285,8 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
return ret;
}
-static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
- int width, int be)
+static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr offset,
+ int width, int be)
{
hwaddr boff;
uint32_t ret;
@@ -398,7 +399,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
}
/* update flash content on disk */
-static void pflash_update(pflash_t *pfl, int offset,
+static void pflash_update(PFlashCFI01 *pfl, int offset,
int size)
{
int offset_end;
@@ -412,7 +413,7 @@ static void pflash_update(pflash_t *pfl, int offset,
}
}
-static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
+static inline void pflash_data_write(PFlashCFI01 *pfl, hwaddr offset,
uint32_t value, int width, int be)
{
uint8_t *p = pfl->storage;
@@ -448,7 +449,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
}
-static void pflash_write(pflash_t *pfl, hwaddr offset,
+static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
uint32_t value, int width, int be)
{
uint8_t *p;
@@ -654,7 +655,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_t *value,
unsigned len, MemTxAttrs attrs)
{
- pflash_t *pfl = opaque;
+ PFlashCFI01 *pfl = opaque;
bool be = !!(pfl->features & (1 << PFLASH_BE));
if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
@@ -668,7 +669,7 @@ static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_
static MemTxResult pflash_mem_write_with_attrs(void *opaque, hwaddr addr, uint64_t value,
unsigned len, MemTxAttrs attrs)
{
- pflash_t *pfl = opaque;
+ PFlashCFI01 *pfl = opaque;
bool be = !!(pfl->features & (1 << PFLASH_BE));
if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
@@ -687,7 +688,7 @@ static const MemoryRegionOps pflash_cfi01_ops = {
static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
{
- pflash_t *pfl = CFI_PFLASH01(dev);
+ PFlashCFI01 *pfl = CFI_PFLASH01(dev);
uint64_t total_len;
int ret;
uint64_t blocks_per_device, sector_len_per_device, device_len;
@@ -864,14 +865,14 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
}
static Property pflash_cfi01_properties[] = {
- DEFINE_PROP_DRIVE("drive", struct pflash_t, blk),
+ DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk),
/* num-blocks is the number of blocks actually visible to the guest,
* ie the total size of the device divided by the sector length.
* If we're emulating flash devices wired in parallel the actual
* number of blocks per indvidual device will differ.
*/
- DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0),
- DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0),
+ DEFINE_PROP_UINT32("num-blocks", PFlashCFI01, nb_blocs, 0),
+ DEFINE_PROP_UINT64("sector-length", PFlashCFI01, sector_len, 0),
/* width here is the overall width of this QEMU device in bytes.
* The QEMU device may be emulating a number of flash devices
* wired up in parallel; the width of each individual flash
@@ -888,17 +889,17 @@ static Property pflash_cfi01_properties[] = {
* 16 bit devices making up a 32 bit wide QEMU device. This
* is deprecated for new uses of this device.
*/
- DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0),
- DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0),
- DEFINE_PROP_UINT8("max-device-width", struct pflash_t, max_device_width, 0),
- DEFINE_PROP_BIT("big-endian", struct pflash_t, features, PFLASH_BE, 0),
- DEFINE_PROP_BIT("secure", struct pflash_t, features, PFLASH_SECURE, 0),
- DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0),
- DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0),
- DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0),
- DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0),
- DEFINE_PROP_STRING("name", struct pflash_t, name),
- DEFINE_PROP_BOOL("old-multiple-chip-handling", struct pflash_t,
+ DEFINE_PROP_UINT8("width", PFlashCFI01, bank_width, 0),
+ DEFINE_PROP_UINT8("device-width", PFlashCFI01, device_width, 0),
+ DEFINE_PROP_UINT8("max-device-width", PFlashCFI01, max_device_width, 0),
+ DEFINE_PROP_BIT("big-endian", PFlashCFI01, features, PFLASH_BE, 0),
+ DEFINE_PROP_BIT("secure", PFlashCFI01, features, PFLASH_SECURE, 0),
+ DEFINE_PROP_UINT16("id0", PFlashCFI01, ident0, 0),
+ DEFINE_PROP_UINT16("id1", PFlashCFI01, ident1, 0),
+ DEFINE_PROP_UINT16("id2", PFlashCFI01, ident2, 0),
+ DEFINE_PROP_UINT16("id3", PFlashCFI01, ident3, 0),
+ DEFINE_PROP_STRING("name", PFlashCFI01, name),
+ DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01,
old_multiple_chip_handling, false),
DEFINE_PROP_END_OF_LIST(),
};
@@ -917,7 +918,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
static const TypeInfo pflash_cfi01_info = {
.name = TYPE_CFI_PFLASH01,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(struct pflash_t),
+ .instance_size = sizeof(PFlashCFI01),
.class_init = pflash_cfi01_class_init,
};
@@ -928,13 +929,15 @@ static void pflash_cfi01_register_types(void)
type_init(pflash_cfi01_register_types)
-pflash_t *pflash_cfi01_register(hwaddr base,
- DeviceState *qdev, const char *name,
- hwaddr size,
- BlockBackend *blk,
- uint32_t sector_len, int nb_blocs,
- int bank_width, uint16_t id0, uint16_t id1,
- uint16_t id2, uint16_t id3, int be)
+PFlashCFI01 *pflash_cfi01_register(hwaddr base,
+ DeviceState *qdev, const char *name,
+ hwaddr size,
+ BlockBackend *blk,
+ uint32_t sector_len, int nb_blocs,
+ int bank_width,
+ uint16_t id0, uint16_t id1,
+ uint16_t id2, uint16_t id3,
+ int be)
{
DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);
@@ -956,14 +959,14 @@ pflash_t *pflash_cfi01_register(hwaddr base,
return CFI_PFLASH01(dev);
}
-MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl)
+MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl)
{
return &fl->mem;
}
static void postload_update_cb(void *opaque, int running, RunState state)
{
- pflash_t *pfl = opaque;
+ PFlashCFI01 *pfl = opaque;
/* This is called after bdrv_invalidate_cache_all. */
qemu_del_vm_change_state_handler(pfl->vmstate);
@@ -975,7 +978,7 @@ static void postload_update_cb(void *opaque, int running, RunState state)
static int pflash_post_load(void *opaque, int version_id)
{
- pflash_t *pfl = opaque;
+ PFlashCFI01 *pfl = opaque;
if (!pfl->ro) {
pfl->vmstate = qemu_add_vm_change_state_handler(postload_update_cb,
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index 0f8b7b8c7b..9f8486e4cf 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -57,9 +57,10 @@ do { \
#define PFLASH_LAZY_ROMD_THRESHOLD 42
-#define CFI_PFLASH02(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH02)
+#define CFI_PFLASH02(obj) \
+ OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02)
-struct pflash_t {
+struct PFlashCFI02 {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
@@ -101,7 +102,7 @@ struct pflash_t {
/*
* Set up replicated mappings of the same region.
*/
-static void pflash_setup_mappings(pflash_t *pfl)
+static void pflash_setup_mappings(PFlashCFI02 *pfl)
{
unsigned i;
hwaddr size = memory_region_size(&pfl->orig_mem);
@@ -115,7 +116,7 @@ static void pflash_setup_mappings(pflash_t *pfl)
}
}
-static void pflash_register_memory(pflash_t *pfl, int rom_mode)
+static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode)
{
memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode);
pfl->rom_mode = rom_mode;
@@ -123,7 +124,7 @@ static void pflash_register_memory(pflash_t *pfl, int rom_mode)
static void pflash_timer (void *opaque)
{
- pflash_t *pfl = opaque;
+ PFlashCFI02 *pfl = opaque;
trace_pflash_timer_expired(pfl->cmd);
/* Reset flash */
@@ -137,8 +138,8 @@ static void pflash_timer (void *opaque)
pfl->cmd = 0;
}
-static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
- int width, int be)
+static uint32_t pflash_read(PFlashCFI02 *pfl, hwaddr offset,
+ int width, int be)
{
hwaddr boff;
uint32_t ret;
@@ -246,7 +247,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
}
/* update flash content on disk */
-static void pflash_update(pflash_t *pfl, int offset,
+static void pflash_update(PFlashCFI02 *pfl, int offset,
int size)
{
int offset_end;
@@ -260,8 +261,8 @@ static void pflash_update(pflash_t *pfl, int offset,
}
}
-static void pflash_write (pflash_t *pfl, hwaddr offset,
- uint32_t value, int width, int be)
+static void pflash_write(PFlashCFI02 *pfl, hwaddr offset,
+ uint32_t value, int width, int be)
{
hwaddr boff;
uint8_t *p;
@@ -533,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le = {
static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
{
- pflash_t *pfl = CFI_PFLASH02(dev);
+ PFlashCFI02 *pfl = CFI_PFLASH02(dev);
uint32_t chip_len;
int ret;
Error *local_err = NULL;
@@ -679,19 +680,19 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
}
static Property pflash_cfi02_properties[] = {
- DEFINE_PROP_DRIVE("drive", struct pflash_t, blk),
- DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0),
- DEFINE_PROP_UINT32("sector-length", struct pflash_t, sector_len, 0),
- DEFINE_PROP_UINT8("width", struct pflash_t, width, 0),
- DEFINE_PROP_UINT8("mappings", struct pflash_t, mappings, 0),
- DEFINE_PROP_UINT8("big-endian", struct pflash_t, be, 0),
- DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0),
- DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0),
- DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0),
- DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0),
- DEFINE_PROP_UINT16("unlock-addr0", struct pflash_t, unlock_addr0, 0),
- DEFINE_PROP_UINT16("unlock-addr1", struct pflash_t, unlock_addr1, 0),
- DEFINE_PROP_STRING("name", struct pflash_t, name),
+ DEFINE_PROP_DRIVE("drive", PFlashCFI02, blk),
+ DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, nb_blocs, 0),
+ DEFINE_PROP_UINT32("sector-length", PFlashCFI02, sector_len, 0),
+ DEFINE_PROP_UINT8("width", PFlashCFI02, width, 0),
+ DEFINE_PROP_UINT8("mappings", PFlashCFI02, mappings, 0),
+ DEFINE_PROP_UINT8("big-endian", PFlashCFI02, be, 0),
+ DEFINE_PROP_UINT16("id0", PFlashCFI02, ident0, 0),
+ DEFINE_PROP_UINT16("id1", PFlashCFI02, ident1, 0),
+ DEFINE_PROP_UINT16("id2", PFlashCFI02, ident2, 0),
+ DEFINE_PROP_UINT16("id3", PFlashCFI02, ident3, 0),
+ DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0),
+ DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0),
+ DEFINE_PROP_STRING("name", PFlashCFI02, name),
DEFINE_PROP_END_OF_LIST(),
};
@@ -707,7 +708,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
static const TypeInfo pflash_cfi02_info = {
.name = TYPE_CFI_PFLASH02,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(struct pflash_t),
+ .instance_size = sizeof(PFlashCFI02),
.class_init = pflash_cfi02_class_init,
};
@@ -718,15 +719,17 @@ static void pflash_cfi02_register_types(void)
type_init(pflash_cfi02_register_types)
-pflash_t *pflash_cfi02_register(hwaddr base,
- DeviceState *qdev, const char *name,
- hwaddr size,
- BlockBackend *blk, uint32_t sector_len,
- int nb_blocs, int nb_mappings, int width,
- uint16_t id0, uint16_t id1,
- uint16_t id2, uint16_t id3,
- uint16_t unlock_addr0, uint16_t unlock_addr1,
- int be)
+PFlashCFI02 *pflash_cfi02_register(hwaddr base,
+ DeviceState *qdev, const char *name,
+ hwaddr size,
+ BlockBackend *blk,
+ uint32_t sector_len, int nb_blocs,
+ int nb_mappings, int width,
+ uint16_t id0, uint16_t id1,
+ uint16_t id2, uint16_t id3,
+ uint16_t unlock_addr0,
+ uint16_t unlock_addr1,
+ int be)
{
DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH02);
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 091e22dd60..67e55342f6 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -111,7 +111,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
char *fatal_errmsg = NULL;
hwaddr phys_addr = 0x100000000ULL;
int sector_bits, sector_size;
- pflash_t *system_flash;
+ PFlashCFI01 *system_flash;
MemoryRegion *flash_mem;
char name[64];
void *flash_ptr;
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 7a403ef1ce..172ee033af 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1189,7 +1189,7 @@ void mips_malta_init(MachineState *machine)
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
char *filename;
- pflash_t *fl;
+ PFlashCFI01 *fl;
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *ram_high = g_new(MemoryRegion, 1);
MemoryRegion *ram_low_preio = g_new(MemoryRegion, 1);
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index ab3e52b415..3d59a7a356 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -162,9 +162,9 @@ static void xtfpga_net_init(MemoryRegion *address_space,
memory_region_add_subregion(address_space, buffers, ram);
}
-static pflash_t *xtfpga_flash_init(MemoryRegion *address_space,
- const XtfpgaBoardDesc *board,
- DriveInfo *dinfo, int be)
+static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space,
+ const XtfpgaBoardDesc *board,
+ DriveInfo *dinfo, int be)
{
SysBusDevice *s;
DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
@@ -181,7 +181,7 @@ static pflash_t *xtfpga_flash_init(MemoryRegion *address_space,
s = SYS_BUS_DEVICE(dev);
memory_region_add_subregion(address_space, board->flash->base,
sysbus_mmio_get_region(s, 0));
- return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
+ return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
}
static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
@@ -229,7 +229,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
XtensaMxPic *mx_pic = NULL;
qemu_irq *extints;
DriveInfo *dinfo;
- pflash_t *flash = NULL;
+ PFlashCFI01 *flash = NULL;
QemuOpts *machine_opts = qemu_get_machine_opts();
const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");
const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
index 67c3aa329e..51d8f60c65 100644
--- a/include/hw/block/flash.h
+++ b/include/hw/block/flash.h
@@ -5,32 +5,41 @@
#include "exec/memory.h"
-#define TYPE_CFI_PFLASH01 "cfi.pflash01"
-#define TYPE_CFI_PFLASH02 "cfi.pflash02"
-
-typedef struct pflash_t pflash_t;
-
/* pflash_cfi01.c */
-pflash_t *pflash_cfi01_register(hwaddr base,
- DeviceState *qdev, const char *name,
- hwaddr size,
- BlockBackend *blk,
- uint32_t sector_len, int nb_blocs, int width,
- uint16_t id0, uint16_t id1,
- uint16_t id2, uint16_t id3, int be);
+
+#define TYPE_CFI_PFLASH01 "cfi.pflash01"
+
+typedef struct PFlashCFI01 PFlashCFI01;
+
+PFlashCFI01 *pflash_cfi01_register(hwaddr base,
+ DeviceState *qdev, const char *name,
+ hwaddr size,
+ BlockBackend *blk,
+ uint32_t sector_len, int nb_blocs,
+ int width,
+ uint16_t id0, uint16_t id1,
+ uint16_t id2, uint16_t id3,
+ int be);
+MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
/* pflash_cfi02.c */
-pflash_t *pflash_cfi02_register(hwaddr base,
- DeviceState *qdev, const char *name,
- hwaddr size,
- BlockBackend *blk, uint32_t sector_len,
- int nb_blocs, int nb_mappings, int width,
- uint16_t id0, uint16_t id1,
- uint16_t id2, uint16_t id3,
- uint16_t unlock_addr0, uint16_t unlock_addr1,
- int be);
-MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl);
+#define TYPE_CFI_PFLASH02 "cfi.pflash02"
+
+typedef struct PFlashCFI02 PFlashCFI02;
+
+PFlashCFI02 *pflash_cfi02_register(hwaddr base,
+ DeviceState *qdev, const char *name,
+ hwaddr size,
+ BlockBackend *blk,
+ uint32_t sector_len, int nb_blocs,
+ int nb_mappings,
+ int width,
+ uint16_t id0, uint16_t id1,
+ uint16_t id2, uint16_t id3,
+ uint16_t unlock_addr0,
+ uint16_t unlock_addr1,
+ int be);
/* nand.c */
DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id);
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer"
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 01/11] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02 Markus Armbruster
@ 2019-02-26 19:33 ` Markus Armbruster
2019-02-26 23:59 ` Philippe Mathieu-Daudé
2019-02-27 11:09 ` Alex Bennée
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed " Markus Armbruster
` (9 subsequent siblings)
11 siblings, 2 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:33 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc
When a guest tries to abort "write to buffer" (command 0xE8), we print
"PFLASH: Possible BUG - Write block confirm", then exit(1). Letting
the guest terminate QEMU is not a good idea. Instead, LOG_UNIMP we
screwed up, then reset the device.
Macro PFLASH_BUG() is now unused; delete it.
Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
hw/block/pflash_cfi01.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index a51ac9f399..e6d933a06d 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -49,12 +49,6 @@
#include "sysemu/sysemu.h"
#include "trace.h"
-#define PFLASH_BUG(fmt, ...) \
-do { \
- fprintf(stderr, "PFLASH: Possible BUG - " fmt, ## __VA_ARGS__); \
- exit(1); \
-} while(0)
-
/* #define PFLASH_DEBUG */
#ifdef PFLASH_DEBUG
#define DPRINTF(fmt, ...) \
@@ -623,8 +617,11 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
pfl->wcycle = 0;
pfl->status |= 0x80;
} else {
- DPRINTF("%s: unknown command for \"write block\"\n", __func__);
- PFLASH_BUG("Write block confirm");
+ qemu_log_mask(LOG_UNIMP,
+ "%s: Aborting write to buffer not implemented,"
+ " the data is already written to storage!\n"
+ "Flash device reset into READ mode.\n",
+ __func__);
goto reset_flash;
}
break;
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed "write to buffer"
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 01/11] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02 Markus Armbruster
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer" Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-02-26 23:57 ` Philippe Mathieu-Daudé
2019-02-27 11:30 ` Alex Bennée
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI* Markus Armbruster
` (8 subsequent siblings)
11 siblings, 2 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc
Our implementation of "write to buffer" (command 0xE8) is flawed.
LOG_UNIMP its use, and add some FIXME comments.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
hw/block/pflash_cfi01.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index e6d933a06d..d381f14e3c 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -502,6 +502,10 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
break;
case 0xe8: /* Write to buffer */
DPRINTF("%s: Write to buffer\n", __func__);
+ /* FIXME should save @offset, @width for case 1+ */
+ qemu_log_mask(LOG_UNIMP,
+ "%s: Write to buffer emulation is flawed\n",
+ __func__);
pfl->status |= 0x80; /* Ready! */
break;
case 0xf0: /* Probe for AMD flash */
@@ -545,6 +549,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
/* Mask writeblock size based on device width, or bank width if
* device width not specified.
*/
+ /* FIXME check @offset, @width */
if (pfl->device_width) {
value = extract32(value, 0, pfl->device_width * 8);
} else {
@@ -582,7 +587,13 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
case 2:
switch (pfl->cmd) {
case 0xe8: /* Block write */
+ /* FIXME check @offset, @width */
if (!pfl->ro) {
+ /*
+ * FIXME writing straight to memory is *wrong*. We
+ * should write to a buffer, and flush it to memory
+ * only on confirm command (see below).
+ */
pflash_data_write(pfl, offset, value, width, be);
} else {
pfl->status |= 0x10; /* Programming error */
@@ -598,6 +609,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
pfl->wcycle++;
if (!pfl->ro) {
/* Flush the entire write buffer onto backing storage. */
+ /* FIXME premature! */
pflash_update(pfl, offset & mask, pfl->writeblock_size);
} else {
pfl->status |= 0x10; /* Programming error */
@@ -614,6 +626,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
switch (pfl->cmd) {
case 0xe8: /* Block write */
if (cmd == 0xd0) {
+ /* FIXME this is where we should write out the buffer */
pfl->wcycle = 0;
pfl->status |= 0x80;
} else {
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI*
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (2 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed " Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-02-27 0:00 ` Philippe Mathieu-Daudé
2019-02-27 11:09 ` Alex Bennée
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 05/11] hw: Use PFLASH_CFI0{1, 2} and TYPE_PFLASH_CFI0{1, 2} Markus Armbruster
` (7 subsequent siblings)
11 siblings, 2 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc
pflash_cfi01.c and pflash_cfi02.c start their identifiers with
pflash_cfi01_ and pflash_cfi02_ respectively, except for
CFI_PFLASH01(), TYPE_CFI_PFLASH01, CFI_PFLASH02(), TYPE_CFI_PFLASH02.
Rename for consistency.
Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
hw/block/pflash_cfi01.c | 12 ++++++------
hw/block/pflash_cfi02.c | 12 ++++++------
include/hw/block/flash.h | 4 ++--
3 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index d381f14e3c..f75f0a6998 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -59,8 +59,8 @@ do { \
#define DPRINTF(fmt, ...) do { } while (0)
#endif
-#define CFI_PFLASH01(obj) \
- OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01)
+#define PFLASH_CFI01(obj) \
+ OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01)
#define PFLASH_BE 0
#define PFLASH_SECURE 1
@@ -698,7 +698,7 @@ static const MemoryRegionOps pflash_cfi01_ops = {
static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
{
- PFlashCFI01 *pfl = CFI_PFLASH01(dev);
+ PFlashCFI01 *pfl = PFLASH_CFI01(dev);
uint64_t total_len;
int ret;
uint64_t blocks_per_device, sector_len_per_device, device_len;
@@ -926,7 +926,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
static const TypeInfo pflash_cfi01_info = {
- .name = TYPE_CFI_PFLASH01,
+ .name = TYPE_PFLASH_CFI01,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(PFlashCFI01),
.class_init = pflash_cfi01_class_init,
@@ -949,7 +949,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
uint16_t id2, uint16_t id3,
int be)
{
- DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);
+ DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01);
if (blk) {
qdev_prop_set_drive(dev, "drive", blk, &error_abort);
@@ -966,7 +966,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
- return CFI_PFLASH01(dev);
+ return PFLASH_CFI01(dev);
}
MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl)
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index 9f8486e4cf..c0869fc417 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -57,8 +57,8 @@ do { \
#define PFLASH_LAZY_ROMD_THRESHOLD 42
-#define CFI_PFLASH02(obj) \
- OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02)
+#define PFLASH_CFI02(obj) \
+ OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02)
struct PFlashCFI02 {
/*< private >*/
@@ -534,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le = {
static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
{
- PFlashCFI02 *pfl = CFI_PFLASH02(dev);
+ PFlashCFI02 *pfl = PFLASH_CFI02(dev);
uint32_t chip_len;
int ret;
Error *local_err = NULL;
@@ -706,7 +706,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo pflash_cfi02_info = {
- .name = TYPE_CFI_PFLASH02,
+ .name = TYPE_PFLASH_CFI02,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(PFlashCFI02),
.class_init = pflash_cfi02_class_init,
@@ -731,7 +731,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
uint16_t unlock_addr1,
int be)
{
- DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH02);
+ DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI02);
if (blk) {
qdev_prop_set_drive(dev, "drive", blk, &error_abort);
@@ -751,5 +751,5 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
- return CFI_PFLASH02(dev);
+ return PFLASH_CFI02(dev);
}
diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
index 51d8f60c65..333005d9ff 100644
--- a/include/hw/block/flash.h
+++ b/include/hw/block/flash.h
@@ -7,7 +7,7 @@
/* pflash_cfi01.c */
-#define TYPE_CFI_PFLASH01 "cfi.pflash01"
+#define TYPE_PFLASH_CFI01 "cfi.pflash01"
typedef struct PFlashCFI01 PFlashCFI01;
@@ -24,7 +24,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
/* pflash_cfi02.c */
-#define TYPE_CFI_PFLASH02 "cfi.pflash02"
+#define TYPE_PFLASH_CFI02 "cfi.pflash02"
typedef struct PFlashCFI02 PFlashCFI02;
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 05/11] hw: Use PFLASH_CFI0{1, 2} and TYPE_PFLASH_CFI0{1, 2}
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (3 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI* Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image Markus Armbruster
` (6 subsequent siblings)
11 siblings, 0 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc
We have two open-coded copies of macro PFLASH_CFI01(). Move the macro
to the header, so we can ditch the copies. Move PFLASH_CFI02() to the
header for symmetry.
We define macros TYPE_PFLASH_CFI01 and TYPE_PFLASH_CFI02 for type name
strings, then mostly use the strings. If the macros are worth
defining, they are worth using. Replace the strings by the macros.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
hw/arm/vexpress.c | 4 ++--
hw/arm/virt.c | 3 ++-
hw/block/pflash_cfi01.c | 3 ---
hw/block/pflash_cfi02.c | 3 ---
hw/xtensa/xtfpga.c | 4 ++--
include/hw/block/flash.h | 4 ++++
6 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index ed46d2e730..f07134c424 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -515,7 +515,7 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt)
static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name,
DriveInfo *di)
{
- DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
+ DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01);
if (di) {
qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(di),
@@ -536,7 +536,7 @@ static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name,
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
- return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
+ return PFLASH_CFI01(dev);
}
static void vexpress_common_init(MachineState *machine)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 99c2b6e60d..f2e5fc1ce1 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -34,6 +34,7 @@
#include "hw/arm/arm.h"
#include "hw/arm/primecell.h"
#include "hw/arm/virt.h"
+#include "hw/block/flash.h"
#include "hw/vfio/vfio-calxeda-xgmac.h"
#include "hw/vfio/vfio-amd-xgbe.h"
#include "hw/display/ramfb.h"
@@ -874,7 +875,7 @@ static void create_one_flash(const char *name, hwaddr flashbase,
* parameters as the flash devices on the Versatile Express board.
*/
DriveInfo *dinfo = drive_get_next(IF_PFLASH);
- DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
+ DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
const uint64_t sectorlength = 256 * 1024;
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index f75f0a6998..1c99aa6e4a 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -59,9 +59,6 @@ do { \
#define DPRINTF(fmt, ...) do { } while (0)
#endif
-#define PFLASH_CFI01(obj) \
- OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01)
-
#define PFLASH_BE 0
#define PFLASH_SECURE 1
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index c0869fc417..5ef40154b9 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -57,9 +57,6 @@ do { \
#define PFLASH_LAZY_ROMD_THRESHOLD 42
-#define PFLASH_CFI02(obj) \
- OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02)
-
struct PFlashCFI02 {
/*< private >*/
SysBusDevice parent_obj;
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index 3d59a7a356..e05ef75a75 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -167,7 +167,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space,
DriveInfo *dinfo, int be)
{
SysBusDevice *s;
- DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
+ DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01);
qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo),
&error_abort);
@@ -181,7 +181,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space,
s = SYS_BUS_DEVICE(dev);
memory_region_add_subregion(address_space, board->flash->base,
sysbus_mmio_get_region(s, 0));
- return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
+ return PFLASH_CFI01(dev);
}
static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
index 333005d9ff..aeea3ca99d 100644
--- a/include/hw/block/flash.h
+++ b/include/hw/block/flash.h
@@ -8,6 +8,8 @@
/* pflash_cfi01.c */
#define TYPE_PFLASH_CFI01 "cfi.pflash01"
+#define PFLASH_CFI01(obj) \
+ OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01)
typedef struct PFlashCFI01 PFlashCFI01;
@@ -25,6 +27,8 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
/* pflash_cfi02.c */
#define TYPE_PFLASH_CFI02 "cfi.pflash02"
+#define PFLASH_CFI02(obj) \
+ OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02)
typedef struct PFlashCFI02 PFlashCFI02;
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (4 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 05/11] hw: Use PFLASH_CFI0{1, 2} and TYPE_PFLASH_CFI0{1, 2} Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-02-26 22:30 ` BALATON Zoltan
` (2 more replies)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 07/11] ppc405_boards: " Markus Armbruster
` (5 subsequent siblings)
11 siblings, 3 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc, BALATON Zoltan
Machine "sam460ex" maps its flash memory at address 0xFFF00000. When
no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM
get mapped on top of its second half. Else, it's the size of the
image rounded up to the next multiple of 64KiB.
The rounding is actually useless: pflash_cfi01_realize() fails with
"failed to read the initial flash content" unless it's a no-op.
I have no idea what happens when the pflash's size exceeds 1MiB.
Useful outcomes seem unlikely.
I guess memory at the end of the address space remains unmapped when
it's smaller than 1MiB. Again, useful outcomes seem unlikely.
The physical hardware appears to have 512KiB of flash memory:
https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf
For now, just set the flash memory size to 1MiB regardless of image
size, and document the mess.
Cc: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++---------------
1 file changed, 26 insertions(+), 15 deletions(-)
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 75250d49e4..0c919529f8 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -91,32 +91,43 @@ struct boot_info {
static int sam460ex_load_uboot(void)
{
+ /*
+ * This first creates 1MiB of flash memory mapped at the end of
+ * the 32-bit address space (0xFFF00000..0xFFFFFFFF).
+ *
+ * If_PFLASH unit 0 is defined, the flash memory is initialized
+ * from that block backend.
+ *
+ * Else, it's initialized to zero. And then 512KiB of ROM get
+ * mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
+ * initialized from u-boot-sam460-20100605.bin.
+ *
+ * This doesn't smell right.
+ *
+ * The physical hardware appears to have 512KiB flash memory.
+ *
+ * TODO Figure out what we really need here, and clean this up.
+ */
+
DriveInfo *dinfo;
- BlockBackend *blk = NULL;
- hwaddr base = FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32);
- long bios_size = FLASH_SIZE;
- int fl_sectors;
dinfo = drive_get(IF_PFLASH, 0, 0);
- if (dinfo) {
- blk = blk_by_legacy_dinfo(dinfo);
- bios_size = blk_getlength(blk);
- }
- fl_sectors = (bios_size + 65535) >> 16;
-
- if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size,
- blk, 64 * KiB, fl_sectors,
+ if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
+ NULL, "sam460ex.flash", FLASH_SIZE,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ 64 * KiB, FLASH_SIZE / (64 * KiB),
1, 0x89, 0x18, 0x0000, 0x0, 1)) {
error_report("Error registering flash memory");
/* XXX: return an error instead? */
exit(1);
}
- if (!blk) {
+ if (!dinfo) {
/*error_report("No flash image given with the 'pflash' parameter,"
" using default u-boot image");*/
- base = UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32);
- rom_add_file_fixed(UBOOT_FILENAME, base, -1);
+ rom_add_file_fixed(UBOOT_FILENAME,
+ UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
+ -1);
}
return 0;
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 07/11] ppc405_boards: Don't size flash memory to match backing image
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (5 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-02-27 10:35 ` Alex Bennée
2019-03-05 19:23 ` Philippe Mathieu-Daudé
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 08/11] r2d: Flash memory creation is confused about size, mark FIXME Markus Armbruster
` (4 subsequent siblings)
11 siblings, 2 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc, David Gibson
Machine "ref405ep" maps its flash memory at address 2^32 - image size.
Image size is rounded up to the next multiple of 64KiB. Useless,
because pflash_cfi02_realize() fails with "failed to read the initial
flash content" unless the rounding is a no-op.
If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then
other stuff. No idea how that would play out, but a useful outcomes
seem unlikely.
Map the flash memory at fixed address 0xFFF80000 with size 512KiB,
regardless of image size, to match the physical hardware.
Machine "taihu" maps its boot flash memory similarly. The code even
has a comment /* XXX: should check that size is 2MB */, followed by
disabled code to adjust the size to 2MiB regardless of image size.
Its code to map its application flash memory looks the same, except
there the XXX comment asks for 32MiB, and the code to adjust the size
isn't disabled. Note that pflash_cfi02_realize() fails with "failed
to read the initial flash content" for images smaller than 32MiB.
Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB,
to match the physical hardware. Delete dead code from application
flash mapping, and simplify some.
Cc: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/ppc405_boards.c | 51 +++++++++++++-----------------------------
1 file changed, 15 insertions(+), 36 deletions(-)
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index f47b15f10e..672717ef1b 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -158,7 +158,7 @@ static void ref405ep_init(MachineState *machine)
target_ulong kernel_base, initrd_base;
long kernel_size, initrd_size;
int linux_boot;
- int fl_idx, fl_sectors, len;
+ int len;
DriveInfo *dinfo;
MemoryRegion *sysmem = get_system_memory();
@@ -185,26 +185,19 @@ static void ref405ep_init(MachineState *machine)
#ifdef DEBUG_BOARD_INIT
printf("%s: register BIOS\n", __func__);
#endif
- fl_idx = 0;
#ifdef USE_FLASH_BIOS
- dinfo = drive_get(IF_PFLASH, 0, fl_idx);
+ dinfo = drive_get(IF_PFLASH, 0, 0);
if (dinfo) {
- BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
-
- bios_size = blk_getlength(blk);
- fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
- printf("Register parallel flash %d size %lx"
- " at addr %lx '%s' %d\n",
- fl_idx, bios_size, -bios_size,
- blk_name(blk), fl_sectors);
+ printf("Register parallel flash\n");
#endif
+ bios_size = 8 * MiB;
pflash_cfi02_register((uint32_t)(-bios_size),
NULL, "ef405ep.bios", bios_size,
- blk, 65536, fl_sectors, 1,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ 64 * KiB, bios_size / (64 * KiB), 1,
2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
- fl_idx++;
} else
#endif
{
@@ -455,7 +448,7 @@ static void taihu_405ep_init(MachineState *machine)
target_ulong kernel_base, initrd_base;
long kernel_size, initrd_size;
int linux_boot;
- int fl_idx, fl_sectors;
+ int fl_idx;
DriveInfo *dinfo;
/* RAM is soldered to the board so the size cannot be changed */
@@ -486,21 +479,14 @@ static void taihu_405ep_init(MachineState *machine)
#if defined(USE_FLASH_BIOS)
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
if (dinfo) {
- BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
-
- bios_size = blk_getlength(blk);
- /* XXX: should check that size is 2MB */
- // bios_size = 2 * 1024 * 1024;
- fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
- printf("Register parallel flash %d size %lx"
- " at addr %lx '%s' %d\n",
- fl_idx, bios_size, -bios_size,
- blk_name(blk), fl_sectors);
+ printf("Register boot flash\n");
#endif
- pflash_cfi02_register((uint32_t)(-bios_size),
+ bios_size = 2 * MiB;
+ pflash_cfi02_register(0xFFE00000,
NULL, "taihu_405ep.bios", bios_size,
- blk, 65536, fl_sectors, 1,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ 64 * KiB, bios_size / (64 * KiB), 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
@@ -536,20 +522,13 @@ static void taihu_405ep_init(MachineState *machine)
/* Register Linux flash */
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
if (dinfo) {
- BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
-
- bios_size = blk_getlength(blk);
- /* XXX: should check that size is 32MB */
bios_size = 32 * MiB;
- fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
- printf("Register parallel flash %d size %lx"
- " at addr " TARGET_FMT_lx " '%s'\n",
- fl_idx, bios_size, (target_ulong)0xfc000000,
- blk_name(blk));
+ printf("Register application flash\n"
#endif
pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size,
- blk, 65536, fl_sectors, 1,
+ dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
+ 64 * KiB, bios_size / (64 * KiB), 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 08/11] r2d: Flash memory creation is confused about size, mark FIXME
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (6 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 07/11] ppc405_boards: " Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-03-05 17:48 ` Philippe Mathieu-Daudé
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 09/11] mips_malta: Clean up definition of flash memory size somewhat Markus Armbruster
` (3 subsequent siblings)
11 siblings, 1 reply; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc, Magnus Damm
pflash_cfi02_register() takes a size in bytes, a block size in bytes
and a number of blocks. r2d_init() passes FLASH_SIZE, 16 * KiB,
FLASH_SIZE >> 16. Does not compute: size doesn't match block size *
number of blocks. The latter happens to win. I tried to find
documentation on the physical hardware, no luck.
For now, adjust the byte size passed to match the actual size created,
and add a FIXME comment.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
hw/sh4/r2d.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index dcdb3728cb..ed18d1f351 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -290,7 +290,14 @@ static void r2d_init(MachineState *machine)
/* onboard flash memory */
dinfo = drive_get(IF_PFLASH, 0, 0);
- pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
+ /*
+ * FIXME The code is confused about the size of the flash. It
+ * used to pass FLASH_SIZE bytes, in FLASH_SIZE >> 16 blocks of
+ * 16KiB each, which does not compute, but creates one of
+ * FLASH_SIZE / 4 bytes anyway. The current code does so too, but
+ * whether it's the right size is anybody's guess.
+ */
+ pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE / 4,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
16 * KiB, FLASH_SIZE >> 16,
1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 09/11] mips_malta: Clean up definition of flash memory size somewhat
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (7 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 08/11] r2d: Flash memory creation is confused about size, mark FIXME Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-02-27 11:28 ` Alex Bennée
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 10/11] pflash: Clean up after commit 368a354f02b part 1 Markus Armbruster
` (2 subsequent siblings)
11 siblings, 1 reply; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel
Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc,
Aurelien Jarno, Aleksandar Rikalo
pflash_cfi01_register() takes a size in bytes, a block size in bytes
and a number of blocks. mips_malta_init() passes BIOS_SIZE, 65536,
FLASH_SIZE >> 16. Actually consistent only because BIOS_SIZE (defined
in include/hw/mips/bios.h as (4 * MiB)) matches FLASH_SIZE (defined
locally as 0x400000). Confusing all the same.
Pass FLASH_SIZE instead of BIOS_SIZE.
There are more uses of BIOS_SIZE, but I don't sufficiently understand
them to attempt cleanup.
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
---
hw/mips/mips_malta.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 172ee033af..c2a5c65a24 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1269,12 +1269,12 @@ void mips_malta_init(MachineState *machine)
if (dinfo) {
printf("Register parallel flash %d size " TARGET_FMT_lx " at "
"addr %08llx '%s' %x\n",
- fl_idx, bios_size, FLASH_ADDRESS,
+ fl_idx, FLASH_SIZE, FLASH_ADDRESS,
blk_name(dinfo->bdrv), fl_sectors);
}
#endif
fl = pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios",
- BIOS_SIZE,
+ FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
65536, fl_sectors,
4, 0x0000, 0x0000, 0x0000, 0x0000, be);
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 10/11] pflash: Clean up after commit 368a354f02b part 1
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (8 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 09/11] mips_malta: Clean up definition of flash memory size somewhat Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-03-05 13:29 ` Philippe Mathieu-Daudé
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2 Markus Armbruster
2019-02-26 19:56 ` [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Alex Bennée
11 siblings, 1 reply; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc
QOMification left parameter @qdev unused in pflash_cfi01_register()
and pflash_cfi02_register(). All callers pass NULL. Remove.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
hw/arm/collie.c | 4 ++--
hw/arm/digic_boards.c | 2 +-
hw/arm/gumstix.c | 4 ++--
hw/arm/mainstone.c | 2 +-
hw/arm/musicpal.c | 4 ++--
hw/arm/omap_sx1.c | 4 ++--
hw/arm/versatilepb.c | 2 +-
hw/arm/xilinx_zynq.c | 2 +-
hw/arm/z2.c | 3 +--
hw/block/pflash_cfi01.c | 2 +-
hw/block/pflash_cfi02.c | 2 +-
hw/i386/pc_sysfw.c | 2 +-
hw/lm32/lm32_boards.c | 4 ++--
hw/lm32/milkymist.c | 2 +-
hw/microblaze/petalogix_ml605_mmu.c | 3 +--
hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/mips/mips_r4k.c | 2 +-
hw/ppc/ppc405_boards.c | 6 +++---
hw/ppc/sam460ex.c | 2 +-
hw/ppc/virtex_ml507.c | 2 +-
hw/sh4/r2d.c | 2 +-
include/hw/block/flash.h | 4 ++--
23 files changed, 31 insertions(+), 33 deletions(-)
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index 48b732c176..cbc4400f8e 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -36,12 +36,12 @@ static void collie_init(MachineState *machine)
s = sa1110_init(sysmem, collie_binfo.ram_size, machine->cpu_type);
dinfo = drive_get(IF_PFLASH, 0, 0);
- pflash_cfi01_register(SA_CS0, NULL, "collie.fl1", 0x02000000,
+ pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
(64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
dinfo = drive_get(IF_PFLASH, 0, 1);
- pflash_cfi01_register(SA_CS1, NULL, "collie.fl2", 0x02000000,
+ pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
(64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 9f11dcd11f..15a00a1be3 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -129,7 +129,7 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr,
#define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024)
#define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024)
- pflash_cfi02_register(addr, NULL, "pflash", FLASH_K8P3215UQB_SIZE,
+ pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE,
NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE,
DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c
index 56cb763c4e..304dbeab2f 100644
--- a/hw/arm/gumstix.c
+++ b/hw/arm/gumstix.c
@@ -72,7 +72,7 @@ static void connex_init(MachineState *machine)
#else
be = 0;
#endif
- if (!pflash_cfi01_register(0x00000000, NULL, "connext.rom", connex_rom,
+ if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
sector_len, connex_rom / sector_len,
2, 0, 0, 0, 0, be)) {
@@ -109,7 +109,7 @@ static void verdex_init(MachineState *machine)
#else
be = 0;
#endif
- if (!pflash_cfi01_register(0x00000000, NULL, "verdex.rom", verdex_rom,
+ if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
sector_len, verdex_rom / sector_len,
2, 0, 0, 0, 0, be)) {
diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
index 0beb5c426b..2a1c1072db 100644
--- a/hw/arm/mainstone.c
+++ b/hw/arm/mainstone.c
@@ -148,7 +148,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
exit(1);
}
- if (!pflash_cfi01_register(mainstone_flash_base[i], NULL,
+ if (!pflash_cfi01_register(mainstone_flash_base[i],
i ? "mainstone.flash1" : "mainstone.flash0",
MAINSTONE_FLASH,
blk_by_legacy_dinfo(dinfo),
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index d22532a11c..cc780dfb37 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1636,14 +1636,14 @@ static void musicpal_init(MachineState *machine)
* image is smaller than 32 MB.
*/
#ifdef TARGET_WORDS_BIGENDIAN
- pflash_cfi02_register(0x100000000ULL-MP_FLASH_SIZE_MAX, NULL,
+ pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
"musicpal.flash", flash_size,
blk, 0x10000, (flash_size + 0xffff) >> 16,
MP_FLASH_SIZE_MAX / flash_size,
2, 0x00BF, 0x236D, 0x0000, 0x0000,
0x5555, 0x2AAA, 1);
#else
- pflash_cfi02_register(0x100000000ULL-MP_FLASH_SIZE_MAX, NULL,
+ pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
"musicpal.flash", flash_size,
blk, 0x10000, (flash_size + 0xffff) >> 16,
MP_FLASH_SIZE_MAX / flash_size,
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index 84550f0236..b1128777cf 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -152,7 +152,7 @@ static void sx1_init(MachineState *machine, const int version)
#endif
if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
- if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL,
+ if (!pflash_cfi01_register(OMAP_CS0_BASE,
"omap_sx1.flash0-1", flash_size,
blk_by_legacy_dinfo(dinfo),
sector_size, flash_size / sector_size,
@@ -176,7 +176,7 @@ static void sx1_init(MachineState *machine, const int version)
memory_region_add_subregion(address_space,
OMAP_CS1_BASE + flash1_size, &cs[1]);
- if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL,
+ if (!pflash_cfi01_register(OMAP_CS1_BASE,
"omap_sx1.flash1-1", flash1_size,
blk_by_legacy_dinfo(dinfo),
sector_size, flash1_size / sector_size,
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 22b09a1e61..82c5277462 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -365,7 +365,7 @@ static void versatile_init(MachineState *machine, int board_id)
/* 0x34000000 NOR Flash */
dinfo = drive_get(IF_PFLASH, 0, 0);
- if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, NULL, "versatile.flash",
+ if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, "versatile.flash",
VERSATILE_FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
VERSATILE_FLASH_SECT_SIZE,
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 57497b0c4d..1fa4a77728 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -205,7 +205,7 @@ static void zynq_init(MachineState *machine)
DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
/* AMD */
- pflash_cfi02_register(0xe2000000, NULL, "zynq.pflash", FLASH_SIZE,
+ pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
FLASH_SECTOR_SIZE,
FLASH_SIZE/FLASH_SECTOR_SIZE, 1,
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index 697a822f1e..54e6caee9f 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -324,8 +324,7 @@ static void z2_init(MachineState *machine)
exit(1);
}
- if (!pflash_cfi01_register(Z2_FLASH_BASE,
- NULL, "z2.flash0", Z2_FLASH_SIZE,
+ if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
sector_len, Z2_FLASH_SIZE / sector_len,
4, 0, 0, 0, 0, be)) {
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 1c99aa6e4a..bd42487c0a 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -937,7 +937,7 @@ static void pflash_cfi01_register_types(void)
type_init(pflash_cfi01_register_types)
PFlashCFI01 *pflash_cfi01_register(hwaddr base,
- DeviceState *qdev, const char *name,
+ const char *name,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len, int nb_blocs,
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index 5ef40154b9..c261ebff72 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -717,7 +717,7 @@ static void pflash_cfi02_register_types(void)
type_init(pflash_cfi02_register_types)
PFlashCFI02 *pflash_cfi02_register(hwaddr base,
- DeviceState *qdev, const char *name,
+ const char *name,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len, int nb_blocs,
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 67e55342f6..9a5be54a85 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -160,7 +160,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
/* pflash_cfi01_register() creates a deep copy of the name */
snprintf(name, sizeof name, "system.flash%d", unit);
- system_flash = pflash_cfi01_register(phys_addr, NULL /* qdev */, name,
+ system_flash = pflash_cfi01_register(phys_addr, name,
size, blk, sector_size,
size >> sector_bits,
1 /* width */,
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index 05157f8eab..f726355309 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -114,7 +114,7 @@ static void lm32_evr_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
/* Spansion S29NS128P */
- pflash_cfi02_register(flash_base, NULL, "lm32_evr.flash", flash_size,
+ pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
flash_sector_size, flash_size / flash_sector_size,
1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
@@ -207,7 +207,7 @@ static void lm32_uclinux_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
/* Spansion S29NS128P */
- pflash_cfi02_register(flash_base, NULL, "lm32_uclinux.flash", flash_size,
+ pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
flash_sector_size, flash_size / flash_sector_size,
1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index b080cf1ca9..ece7e3b699 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -121,7 +121,7 @@ milkymist_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
/* Numonyx JS28F256J3F105 */
- pflash_cfi01_register(flash_base, NULL, "milkymist.flash", flash_size,
+ pflash_cfi01_register(flash_base, "milkymist.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
flash_sector_size, flash_size / flash_sector_size,
2, 0x00, 0x89, 0x00, 0x1d, 1);
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index c730878d25..74bcc14cda 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -107,8 +107,7 @@ petalogix_ml605_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
/* 5th parameter 2 means bank-width
* 10th paremeter 0 means little-endian */
- pflash_cfi01_register(FLASH_BASEADDR,
- NULL, "petalogix_ml605.flash", FLASH_SIZE,
+ pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, FLASH_SIZE >> 16,
2, 0x89, 0x18, 0x0000, 0x0, 0);
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index b9f0b0d06e..a07b7f8edf 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -88,7 +88,7 @@ petalogix_s3adsp1800_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(FLASH_BASEADDR,
- NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
+ "petalogix_s3adsp1800.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index c2a5c65a24..fdf1434b28 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1273,7 +1273,7 @@ void mips_malta_init(MachineState *machine)
blk_name(dinfo->bdrv), fl_sectors);
}
#endif
- fl = pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios",
+ fl = pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios",
FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
65536, fl_sectors,
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index a015a6d14e..0b9df466e7 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -235,7 +235,7 @@ void mips_r4k_init(MachineState *machine)
load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
} else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
uint32_t mips_rom = 0x00400000;
- if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
+ if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
blk_by_legacy_dinfo(dinfo),
sector_len, mips_rom / sector_len,
4, 0, 0, 0, 0, be)) {
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index 672717ef1b..dfaea45898 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -193,7 +193,7 @@ static void ref405ep_init(MachineState *machine)
#endif
bios_size = 8 * MiB;
pflash_cfi02_register((uint32_t)(-bios_size),
- NULL, "ef405ep.bios", bios_size,
+ "ef405ep.bios", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, bios_size / (64 * KiB), 1,
2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
@@ -484,7 +484,7 @@ static void taihu_405ep_init(MachineState *machine)
#endif
bios_size = 2 * MiB;
pflash_cfi02_register(0xFFE00000,
- NULL, "taihu_405ep.bios", bios_size,
+ "taihu_405ep.bios", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, bios_size / (64 * KiB), 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
@@ -526,7 +526,7 @@ static void taihu_405ep_init(MachineState *machine)
#ifdef DEBUG_BOARD_INIT
printf("Register application flash\n"
#endif
- pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size,
+ pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, bios_size / (64 * KiB), 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 0c919529f8..ad36cb12c8 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -113,7 +113,7 @@ static int sam460ex_load_uboot(void)
dinfo = drive_get(IF_PFLASH, 0, 0);
if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
- NULL, "sam460ex.flash", FLASH_SIZE,
+ "sam460ex.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, FLASH_SIZE / (64 * KiB),
1, 0x89, 0x18, 0x0000, 0x0, 1)) {
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index 5a711cb3d9..d2085a839c 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -227,7 +227,7 @@ static void virtex_init(MachineState *machine)
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
- pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE,
+ pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index ed18d1f351..abd3b67c28 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -297,7 +297,7 @@ static void r2d_init(MachineState *machine)
* FLASH_SIZE / 4 bytes anyway. The current code does so too, but
* whether it's the right size is anybody's guess.
*/
- pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE / 4,
+ pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE / 4,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
16 * KiB, FLASH_SIZE >> 16,
1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
index aeea3ca99d..3e48901c84 100644
--- a/include/hw/block/flash.h
+++ b/include/hw/block/flash.h
@@ -14,7 +14,7 @@
typedef struct PFlashCFI01 PFlashCFI01;
PFlashCFI01 *pflash_cfi01_register(hwaddr base,
- DeviceState *qdev, const char *name,
+ const char *name,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len, int nb_blocs,
@@ -33,7 +33,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
typedef struct PFlashCFI02 PFlashCFI02;
PFlashCFI02 *pflash_cfi02_register(hwaddr base,
- DeviceState *qdev, const char *name,
+ const char *name,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len, int nb_blocs,
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (9 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 10/11] pflash: Clean up after commit 368a354f02b part 1 Markus Armbruster
@ 2019-02-26 19:34 ` Markus Armbruster
2019-02-27 1:11 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
2019-03-05 13:55 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-02-26 19:56 ` [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Alex Bennée
11 siblings, 2 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-26 19:34 UTC (permalink / raw)
To: qemu-devel; +Cc: alex.bennee, lersek, kwolf, mreitz, qemu-block, qemu-ppc
QOMification left parameter @size unused in pflash_cfi01_register()
and pflash_cfi02_register(). Obviously, @size should match
@sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
callers satisfy this.
Remove @nb_blocs and compute it from @size and @sector_len.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
hw/arm/collie.c | 5 +++--
hw/arm/digic_boards.c | 1 -
hw/arm/gumstix.c | 4 ++--
hw/arm/mainstone.c | 2 +-
hw/arm/musicpal.c | 4 ++--
hw/arm/omap_sx1.c | 4 ++--
hw/arm/versatilepb.c | 1 -
hw/arm/xilinx_zynq.c | 3 +--
hw/arm/z2.c | 2 +-
hw/block/pflash_cfi01.c | 5 +++--
hw/block/pflash_cfi02.c | 5 +++--
hw/i386/pc_sysfw.c | 6 +-----
hw/lm32/lm32_boards.c | 4 ++--
hw/lm32/milkymist.c | 2 +-
hw/microblaze/petalogix_ml605_mmu.c | 2 +-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
hw/mips/mips_malta.c | 7 +++----
hw/mips/mips_r4k.c | 2 +-
hw/ppc/ppc405_boards.c | 6 +++---
hw/ppc/sam460ex.c | 2 +-
hw/ppc/virtex_ml507.c | 2 +-
hw/sh4/r2d.c | 2 +-
include/hw/block/flash.h | 4 ++--
23 files changed, 36 insertions(+), 41 deletions(-)
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index cbc4400f8e..7c9c0615f0 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -9,6 +9,7 @@
* GNU GPL, version 2 or (at your option) any later version.
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "hw/boards.h"
@@ -38,12 +39,12 @@ static void collie_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
+ 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
dinfo = drive_get(IF_PFLASH, 0, 1);
pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
+ 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
sysbus_create_simple("scoop", 0x40800000, NULL);
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 15a00a1be3..304e4d1a29 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -131,7 +131,6 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr,
pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE,
NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
- FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE,
DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
4,
0x00EC, 0x007E, 0x0003, 0x0001,
diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c
index 304dbeab2f..2e526218f4 100644
--- a/hw/arm/gumstix.c
+++ b/hw/arm/gumstix.c
@@ -74,7 +74,7 @@ static void connex_init(MachineState *machine)
#endif
if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- sector_len, connex_rom / sector_len,
+ sector_len,
2, 0, 0, 0, 0, be)) {
error_report("Error registering flash memory");
exit(1);
@@ -111,7 +111,7 @@ static void verdex_init(MachineState *machine)
#endif
if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- sector_len, verdex_rom / sector_len,
+ sector_len,
2, 0, 0, 0, 0, be)) {
error_report("Error registering flash memory");
exit(1);
diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
index 2a1c1072db..6e15ba9663 100644
--- a/hw/arm/mainstone.c
+++ b/hw/arm/mainstone.c
@@ -152,7 +152,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
i ? "mainstone.flash1" : "mainstone.flash0",
MAINSTONE_FLASH,
blk_by_legacy_dinfo(dinfo),
- sector_len, MAINSTONE_FLASH / sector_len,
+ sector_len,
4, 0, 0, 0, 0, be)) {
error_report("Error registering flash memory");
exit(1);
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index cc780dfb37..0f4f02df8e 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1638,14 +1638,14 @@ static void musicpal_init(MachineState *machine)
#ifdef TARGET_WORDS_BIGENDIAN
pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
"musicpal.flash", flash_size,
- blk, 0x10000, (flash_size + 0xffff) >> 16,
+ blk, 0x10000,
MP_FLASH_SIZE_MAX / flash_size,
2, 0x00BF, 0x236D, 0x0000, 0x0000,
0x5555, 0x2AAA, 1);
#else
pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
"musicpal.flash", flash_size,
- blk, 0x10000, (flash_size + 0xffff) >> 16,
+ blk, 0x10000,
MP_FLASH_SIZE_MAX / flash_size,
2, 0x00BF, 0x236D, 0x0000, 0x0000,
0x5555, 0x2AAA, 0);
diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
index b1128777cf..b269a5e1c2 100644
--- a/hw/arm/omap_sx1.c
+++ b/hw/arm/omap_sx1.c
@@ -155,7 +155,7 @@ static void sx1_init(MachineState *machine, const int version)
if (!pflash_cfi01_register(OMAP_CS0_BASE,
"omap_sx1.flash0-1", flash_size,
blk_by_legacy_dinfo(dinfo),
- sector_size, flash_size / sector_size,
+ sector_size,
4, 0, 0, 0, 0, be)) {
fprintf(stderr, "qemu: Error registering flash memory %d.\n",
fl_idx);
@@ -179,7 +179,7 @@ static void sx1_init(MachineState *machine, const int version)
if (!pflash_cfi01_register(OMAP_CS1_BASE,
"omap_sx1.flash1-1", flash1_size,
blk_by_legacy_dinfo(dinfo),
- sector_size, flash1_size / sector_size,
+ sector_size,
4, 0, 0, 0, 0, be)) {
fprintf(stderr, "qemu: Error registering flash memory %d.\n",
fl_idx);
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 82c5277462..d67181810a 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -369,7 +369,6 @@ static void versatile_init(MachineState *machine, int board_id)
VERSATILE_FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
VERSATILE_FLASH_SECT_SIZE,
- VERSATILE_FLASH_SIZE / VERSATILE_FLASH_SECT_SIZE,
4, 0x0089, 0x0018, 0x0000, 0x0, 0)) {
fprintf(stderr, "qemu: Error registering flash memory.\n");
}
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 1fa4a77728..f36cfcfd4a 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -207,8 +207,7 @@ static void zynq_init(MachineState *machine)
/* AMD */
pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- FLASH_SECTOR_SIZE,
- FLASH_SIZE/FLASH_SECTOR_SIZE, 1,
+ FLASH_SECTOR_SIZE, 1,
1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
0);
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index 54e6caee9f..fb073ec2f5 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -326,7 +326,7 @@ static void z2_init(MachineState *machine)
if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- sector_len, Z2_FLASH_SIZE / sector_len,
+ sector_len,
4, 0, 0, 0, 0, be)) {
error_report("Error registering flash memory");
exit(1);
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index bd42487c0a..9d1c356eb6 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -940,7 +940,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
const char *name,
hwaddr size,
BlockBackend *blk,
- uint32_t sector_len, int nb_blocs,
+ uint32_t sector_len,
int bank_width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3,
@@ -951,7 +951,8 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
if (blk) {
qdev_prop_set_drive(dev, "drive", blk, &error_abort);
}
- qdev_prop_set_uint32(dev, "num-blocks", nb_blocs);
+ assert(size % sector_len == 0);
+ qdev_prop_set_uint32(dev, "num-blocks", size / sector_len);
qdev_prop_set_uint64(dev, "sector-length", sector_len);
qdev_prop_set_uint8(dev, "width", bank_width);
qdev_prop_set_bit(dev, "big-endian", !!be);
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index c261ebff72..33779ce807 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -720,7 +720,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
const char *name,
hwaddr size,
BlockBackend *blk,
- uint32_t sector_len, int nb_blocs,
+ uint32_t sector_len,
int nb_mappings, int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3,
@@ -733,7 +733,8 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
if (blk) {
qdev_prop_set_drive(dev, "drive", blk, &error_abort);
}
- qdev_prop_set_uint32(dev, "num-blocks", nb_blocs);
+ assert(size % sector_len == 0);
+ qdev_prop_set_uint32(dev, "num-blocks", size / sector_len);
qdev_prop_set_uint32(dev, "sector-length", sector_len);
qdev_prop_set_uint8(dev, "width", width);
qdev_prop_set_uint8(dev, "mappings", nb_mappings);
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 9a5be54a85..34727c5b1f 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -110,16 +110,13 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
int64_t size;
char *fatal_errmsg = NULL;
hwaddr phys_addr = 0x100000000ULL;
- int sector_bits, sector_size;
+ uint32_t sector_size = 4096;
PFlashCFI01 *system_flash;
MemoryRegion *flash_mem;
char name[64];
void *flash_ptr;
int ret, flash_size;
- sector_bits = 12;
- sector_size = 1 << sector_bits;
-
for (unit = 0;
(unit < FLASH_MAP_UNIT_MAX &&
(pflash_drv = drive_get(IF_PFLASH, 0, unit)) != NULL);
@@ -162,7 +159,6 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
snprintf(name, sizeof name, "system.flash%d", unit);
system_flash = pflash_cfi01_register(phys_addr, name,
size, blk, sector_size,
- size >> sector_bits,
1 /* width */,
0x0000 /* id0 */,
0x0000 /* id1 */,
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index f726355309..09f411ed07 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -116,7 +116,7 @@ static void lm32_evr_init(MachineState *machine)
/* Spansion S29NS128P */
pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- flash_sector_size, flash_size / flash_sector_size,
+ flash_sector_size,
1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
/* create irq lines */
@@ -209,7 +209,7 @@ static void lm32_uclinux_init(MachineState *machine)
/* Spansion S29NS128P */
pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- flash_sector_size, flash_size / flash_sector_size,
+ flash_sector_size,
1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
/* create irq lines */
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index ece7e3b699..46b0f51fdf 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -123,7 +123,7 @@ milkymist_init(MachineState *machine)
/* Numonyx JS28F256J3F105 */
pflash_cfi01_register(flash_base, "milkymist.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- flash_sector_size, flash_size / flash_sector_size,
+ flash_sector_size,
2, 0x00, 0x89, 0x00, 0x1d, 1);
/* create irq lines */
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 74bcc14cda..46904d2012 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -109,7 +109,7 @@ petalogix_ml605_init(MachineState *machine)
* 10th paremeter 0 means little-endian */
pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, FLASH_SIZE >> 16,
+ 64 * KiB,
2, 0x89, 0x18, 0x0000, 0x0, 0);
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index a07b7f8edf..027c31fdcc 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -90,7 +90,7 @@ petalogix_s3adsp1800_init(MachineState *machine)
pflash_cfi01_register(FLASH_BASEADDR,
"petalogix_s3adsp1800.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, FLASH_SIZE >> 16,
+ 64 * KiB,
1, 0x89, 0x18, 0x0000, 0x0, 1);
dev = qdev_create(NULL, "xlnx.xps-intc");
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index fdf1434b28..647d4a2dac 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1208,7 +1208,6 @@ void mips_malta_init(MachineState *machine)
DriveInfo *dinfo;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
int fl_idx = 0;
- int fl_sectors = bios_size >> 16;
int be;
DeviceState *dev = qdev_create(NULL, TYPE_MIPS_MALTA);
@@ -1268,15 +1267,15 @@ void mips_malta_init(MachineState *machine)
#ifdef DEBUG_BOARD_INIT
if (dinfo) {
printf("Register parallel flash %d size " TARGET_FMT_lx " at "
- "addr %08llx '%s' %x\n",
+ "addr %08llx '%s'\n",
fl_idx, FLASH_SIZE, FLASH_ADDRESS,
- blk_name(dinfo->bdrv), fl_sectors);
+ blk_name(dinfo->bdrv));
}
#endif
fl = pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios",
FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 65536, fl_sectors,
+ 65536,
4, 0x0000, 0x0000, 0x0000, 0x0000, be);
bios = pflash_cfi01_get_memory(fl);
fl_idx++;
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index 0b9df466e7..acfd59c17a 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -237,7 +237,7 @@ void mips_r4k_init(MachineState *machine)
uint32_t mips_rom = 0x00400000;
if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
blk_by_legacy_dinfo(dinfo),
- sector_len, mips_rom / sector_len,
+ sector_len,
4, 0, 0, 0, 0, be)) {
fprintf(stderr, "qemu: Error registering flash memory.\n");
}
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index dfaea45898..1dd5c8b797 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -195,7 +195,7 @@ static void ref405ep_init(MachineState *machine)
pflash_cfi02_register((uint32_t)(-bios_size),
"ef405ep.bios", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, bios_size / (64 * KiB), 1,
+ 64 * KiB, 1,
2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
} else
@@ -486,7 +486,7 @@ static void taihu_405ep_init(MachineState *machine)
pflash_cfi02_register(0xFFE00000,
"taihu_405ep.bios", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, bios_size / (64 * KiB), 1,
+ 64 * KiB, 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
@@ -528,7 +528,7 @@ static void taihu_405ep_init(MachineState *machine)
#endif
pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, bios_size / (64 * KiB), 1,
+ 64 * KiB, 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index ad36cb12c8..1de0a1b47c 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -115,7 +115,7 @@ static int sam460ex_load_uboot(void)
if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
"sam460ex.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, FLASH_SIZE / (64 * KiB),
+ 64 * KiB,
1, 0x89, 0x18, 0x0000, 0x0, 1)) {
error_report("Error registering flash memory");
/* XXX: return an error instead? */
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index d2085a839c..4f86c22968 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -229,7 +229,7 @@ static void virtex_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, FLASH_SIZE >> 16,
+ 64 * KiB,
1, 0x89, 0x18, 0x0000, 0x0, 1);
cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index abd3b67c28..5e6953537c 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -299,7 +299,7 @@ static void r2d_init(MachineState *machine)
*/
pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE / 4,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 16 * KiB, FLASH_SIZE >> 16,
+ 16 * KiB,
1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
0x555, 0x2aa, 0);
diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
index 3e48901c84..914932eaec 100644
--- a/include/hw/block/flash.h
+++ b/include/hw/block/flash.h
@@ -17,7 +17,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
const char *name,
hwaddr size,
BlockBackend *blk,
- uint32_t sector_len, int nb_blocs,
+ uint32_t sector_len,
int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3,
@@ -36,7 +36,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
const char *name,
hwaddr size,
BlockBackend *blk,
- uint32_t sector_len, int nb_blocs,
+ uint32_t sector_len,
int nb_mappings,
int width,
uint16_t id0, uint16_t id1,
--
2.17.2
^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
` (10 preceding siblings ...)
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2 Markus Armbruster
@ 2019-02-26 19:56 ` Alex Bennée
2019-02-27 6:57 ` Markus Armbruster
11 siblings, 1 reply; 43+ messages in thread
From: Alex Bennée @ 2019-02-26 19:56 UTC (permalink / raw)
To: Markus Armbruster; +Cc: qemu-devel, lersek, kwolf, mreitz, qemu-block, qemu-ppc
Markus Armbruster <armbru@redhat.com> writes:
> Alex Bennée posted this patch to address an XXX comment in
> pflash_cfi01_realize() the other day:
If I send you v5 will you include that in your series?
>
> Subject: [PATCH v2] hw/block: report when pflash backing file isn't aligned
> Message-Id: <20190215122808.22301-1-alex.bennee@linaro.org>
> https://lists.nongnu.org/archive/html/qemu-devel/2019-02/msg04166.html
>
> Review led me to look into its callers. Most of them are pleasantly
> boring: they create flash memory of some fixed size at some fixed
> address. A few are more creative, and some of the creative ones look
> quite broken to me. Fix them, and clean up some along the way.
>
> v2:
> * PATCH 01+10: Style cleanups [checkpatch]
> * PATCH 02: Rewritten [Peter, Philippe]
> * PATCH 03+04: New [Philippe]
> * PATCH 06: Commit message improved, FIXME added, accidental
> replacement of 64 * KiB by 65536 backed out [Zoltan]
> * PATCH 07: Style tweak [Alex, David]
> * PATCH 08: Commit message typo [Philippe]
> * PATCH 11: Commit message typo [László]
> * Old PATCH 10 dropped [Max, Peter]
>
> Markus Armbruster (11):
> pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02
> pflash_cfi01: Do not exit() on guest aborting "write to buffer"
> pflash_cfi01: Log use of flawed "write to buffer"
> pflash: Rename *CFI_PFLASH* to *PFLASH_CFI*
> hw: Use PFLASH_CFI0{1,2} and TYPE_PFLASH_CFI0{1,2}
> sam460ex: Don't size flash memory to match backing image
> ppc405_boards: Don't size flash memory to match backing image
> r2d: Flash memory creation is confused about size, mark FIXME
> mips_malta: Clean up definition of flash memory size somewhat
> pflash: Clean up after commit 368a354f02b part 1
> pflash: Clean up after commit 368a354f02b part 2
>
> hw/arm/collie.c | 9 +-
> hw/arm/digic_boards.c | 3 +-
> hw/arm/gumstix.c | 8 +-
> hw/arm/mainstone.c | 4 +-
> hw/arm/musicpal.c | 8 +-
> hw/arm/omap_sx1.c | 8 +-
> hw/arm/versatilepb.c | 3 +-
> hw/arm/vexpress.c | 10 +-
> hw/arm/virt.c | 3 +-
> hw/arm/xilinx_zynq.c | 5 +-
> hw/arm/z2.c | 5 +-
> hw/block/pflash_cfi01.c | 123 ++++++++++++-----------
> hw/block/pflash_cfi02.c | 79 ++++++++-------
> hw/i386/pc_sysfw.c | 10 +-
> hw/lm32/lm32_boards.c | 8 +-
> hw/lm32/milkymist.c | 4 +-
> hw/microblaze/petalogix_ml605_mmu.c | 5 +-
> hw/microblaze/petalogix_s3adsp1800_mmu.c | 4 +-
> hw/mips/mips_malta.c | 15 ++-
> hw/mips/mips_r4k.c | 4 +-
> hw/ppc/ppc405_boards.c | 57 ++++-------
> hw/ppc/sam460ex.c | 41 +++++---
> hw/ppc/virtex_ml507.c | 4 +-
> hw/sh4/r2d.c | 11 +-
> hw/xtensa/xtfpga.c | 12 +--
> include/hw/block/flash.h | 57 +++++++----
> 26 files changed, 257 insertions(+), 243 deletions(-)
--
Alex Bennée
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image Markus Armbruster
@ 2019-02-26 22:30 ` BALATON Zoltan
2019-02-27 11:04 ` Alex Bennée
2019-03-05 19:12 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 43+ messages in thread
From: BALATON Zoltan @ 2019-02-26 22:30 UTC (permalink / raw)
To: Markus Armbruster; +Cc: qemu-devel, alex.bennee, qemu-ppc
On Tue, 26 Feb 2019, Markus Armbruster wrote:
> Machine "sam460ex" maps its flash memory at address 0xFFF00000. When
> no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM
> get mapped on top of its second half. Else, it's the size of the
> image rounded up to the next multiple of 64KiB.
>
> The rounding is actually useless: pflash_cfi01_realize() fails with
> "failed to read the initial flash content" unless it's a no-op.
>
> I have no idea what happens when the pflash's size exceeds 1MiB.
> Useful outcomes seem unlikely.
>
> I guess memory at the end of the address space remains unmapped when
> it's smaller than 1MiB. Again, useful outcomes seem unlikely.
>
> The physical hardware appears to have 512KiB of flash memory:
> https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf
>
> For now, just set the flash memory size to 1MiB regardless of image
> size, and document the mess.
>
> Cc: BALATON Zoltan <balaton@eik.bme.hu>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Regards,
BALATON Zoltan
> ---
> hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++---------------
> 1 file changed, 26 insertions(+), 15 deletions(-)
>
> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
> index 75250d49e4..0c919529f8 100644
> --- a/hw/ppc/sam460ex.c
> +++ b/hw/ppc/sam460ex.c
> @@ -91,32 +91,43 @@ struct boot_info {
>
> static int sam460ex_load_uboot(void)
> {
> + /*
> + * This first creates 1MiB of flash memory mapped at the end of
> + * the 32-bit address space (0xFFF00000..0xFFFFFFFF).
> + *
> + * If_PFLASH unit 0 is defined, the flash memory is initialized
> + * from that block backend.
> + *
> + * Else, it's initialized to zero. And then 512KiB of ROM get
> + * mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
> + * initialized from u-boot-sam460-20100605.bin.
> + *
> + * This doesn't smell right.
> + *
> + * The physical hardware appears to have 512KiB flash memory.
> + *
> + * TODO Figure out what we really need here, and clean this up.
> + */
> +
> DriveInfo *dinfo;
> - BlockBackend *blk = NULL;
> - hwaddr base = FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32);
> - long bios_size = FLASH_SIZE;
> - int fl_sectors;
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> - if (dinfo) {
> - blk = blk_by_legacy_dinfo(dinfo);
> - bios_size = blk_getlength(blk);
> - }
> - fl_sectors = (bios_size + 65535) >> 16;
> -
> - if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size,
> - blk, 64 * KiB, fl_sectors,
> + if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
> + NULL, "sam460ex.flash", FLASH_SIZE,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, FLASH_SIZE / (64 * KiB),
> 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
> error_report("Error registering flash memory");
> /* XXX: return an error instead? */
> exit(1);
> }
>
> - if (!blk) {
> + if (!dinfo) {
> /*error_report("No flash image given with the 'pflash' parameter,"
> " using default u-boot image");*/
> - base = UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32);
> - rom_add_file_fixed(UBOOT_FILENAME, base, -1);
> + rom_add_file_fixed(UBOOT_FILENAME,
> + UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
> + -1);
> }
>
> return 0;
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed "write to buffer"
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed " Markus Armbruster
@ 2019-02-26 23:57 ` Philippe Mathieu-Daudé
2019-02-27 11:30 ` Alex Bennée
1 sibling, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-02-26 23:57 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel
Cc: kwolf, qemu-block, alex.bennee, mreitz, qemu-ppc, lersek
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> Our implementation of "write to buffer" (command 0xE8) is flawed.
> LOG_UNIMP its use, and add some FIXME comments.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> ---
> hw/block/pflash_cfi01.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index e6d933a06d..d381f14e3c 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -502,6 +502,10 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> break;
> case 0xe8: /* Write to buffer */
> DPRINTF("%s: Write to buffer\n", __func__);
> + /* FIXME should save @offset, @width for case 1+ */
> + qemu_log_mask(LOG_UNIMP,
> + "%s: Write to buffer emulation is flawed\n",
> + __func__);
> pfl->status |= 0x80; /* Ready! */
> break;
> case 0xf0: /* Probe for AMD flash */
> @@ -545,6 +549,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> /* Mask writeblock size based on device width, or bank width if
> * device width not specified.
> */
> + /* FIXME check @offset, @width */
> if (pfl->device_width) {
> value = extract32(value, 0, pfl->device_width * 8);
> } else {
> @@ -582,7 +587,13 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> case 2:
> switch (pfl->cmd) {
> case 0xe8: /* Block write */
> + /* FIXME check @offset, @width */
> if (!pfl->ro) {
> + /*
> + * FIXME writing straight to memory is *wrong*. We
> + * should write to a buffer, and flush it to memory
> + * only on confirm command (see below).
> + */
> pflash_data_write(pfl, offset, value, width, be);
> } else {
> pfl->status |= 0x10; /* Programming error */
> @@ -598,6 +609,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> pfl->wcycle++;
> if (!pfl->ro) {
> /* Flush the entire write buffer onto backing storage. */
> + /* FIXME premature! */
> pflash_update(pfl, offset & mask, pfl->writeblock_size);
> } else {
> pfl->status |= 0x10; /* Programming error */
> @@ -614,6 +626,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> switch (pfl->cmd) {
> case 0xe8: /* Block write */
> if (cmd == 0xd0) {
> + /* FIXME this is where we should write out the buffer */
Thanks for all those comments.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
BTW I'm OK to fix that during next dev window.
Regards,
Phil.
> pfl->wcycle = 0;
> pfl->status |= 0x80;
> } else {
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer"
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer" Markus Armbruster
@ 2019-02-26 23:59 ` Philippe Mathieu-Daudé
2019-02-27 11:09 ` Alex Bennée
1 sibling, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-02-26 23:59 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel
Cc: kwolf, qemu-block, alex.bennee, mreitz, qemu-ppc, lersek
On 2/26/19 8:33 PM, Markus Armbruster wrote:
> When a guest tries to abort "write to buffer" (command 0xE8), we print
> "PFLASH: Possible BUG - Write block confirm", then exit(1). Letting
> the guest terminate QEMU is not a good idea. Instead, LOG_UNIMP we
> screwed up, then reset the device.
>
> Macro PFLASH_BUG() is now unused; delete it.
>
> Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> hw/block/pflash_cfi01.c | 13 +++++--------
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index a51ac9f399..e6d933a06d 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -49,12 +49,6 @@
> #include "sysemu/sysemu.h"
> #include "trace.h"
>
> -#define PFLASH_BUG(fmt, ...) \
> -do { \
> - fprintf(stderr, "PFLASH: Possible BUG - " fmt, ## __VA_ARGS__); \
> - exit(1); \
> -} while(0)
> -
> /* #define PFLASH_DEBUG */
> #ifdef PFLASH_DEBUG
> #define DPRINTF(fmt, ...) \
> @@ -623,8 +617,11 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> pfl->wcycle = 0;
> pfl->status |= 0x80;
> } else {
> - DPRINTF("%s: unknown command for \"write block\"\n", __func__);
> - PFLASH_BUG("Write block confirm");
> + qemu_log_mask(LOG_UNIMP,
> + "%s: Aborting write to buffer not implemented,"
> + " the data is already written to storage!\n"
> + "Flash device reset into READ mode.\n",
> + __func__);
> goto reset_flash;
> }
> break;
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI*
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI* Markus Armbruster
@ 2019-02-27 0:00 ` Philippe Mathieu-Daudé
2019-02-27 11:09 ` Alex Bennée
1 sibling, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-02-27 0:00 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel
Cc: kwolf, qemu-block, alex.bennee, mreitz, qemu-ppc, lersek
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> pflash_cfi01.c and pflash_cfi02.c start their identifiers with
> pflash_cfi01_ and pflash_cfi02_ respectively, except for
> CFI_PFLASH01(), TYPE_CFI_PFLASH01, CFI_PFLASH02(), TYPE_CFI_PFLASH02.
> Rename for consistency.
>
> Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> ---
> hw/block/pflash_cfi01.c | 12 ++++++------
> hw/block/pflash_cfi02.c | 12 ++++++------
> include/hw/block/flash.h | 4 ++--
> 3 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index d381f14e3c..f75f0a6998 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -59,8 +59,8 @@ do { \
> #define DPRINTF(fmt, ...) do { } while (0)
> #endif
>
> -#define CFI_PFLASH01(obj) \
> - OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01)
> +#define PFLASH_CFI01(obj) \
> + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01)
>
> #define PFLASH_BE 0
> #define PFLASH_SECURE 1
> @@ -698,7 +698,7 @@ static const MemoryRegionOps pflash_cfi01_ops = {
>
> static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
> {
> - PFlashCFI01 *pfl = CFI_PFLASH01(dev);
> + PFlashCFI01 *pfl = PFLASH_CFI01(dev);
> uint64_t total_len;
> int ret;
> uint64_t blocks_per_device, sector_len_per_device, device_len;
> @@ -926,7 +926,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
>
>
> static const TypeInfo pflash_cfi01_info = {
> - .name = TYPE_CFI_PFLASH01,
> + .name = TYPE_PFLASH_CFI01,
> .parent = TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(PFlashCFI01),
> .class_init = pflash_cfi01_class_init,
> @@ -949,7 +949,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> uint16_t id2, uint16_t id3,
> int be)
> {
> - DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);
> + DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01);
>
> if (blk) {
> qdev_prop_set_drive(dev, "drive", blk, &error_abort);
> @@ -966,7 +966,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> qdev_init_nofail(dev);
>
> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
> - return CFI_PFLASH01(dev);
> + return PFLASH_CFI01(dev);
> }
>
> MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl)
> diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
> index 9f8486e4cf..c0869fc417 100644
> --- a/hw/block/pflash_cfi02.c
> +++ b/hw/block/pflash_cfi02.c
> @@ -57,8 +57,8 @@ do { \
>
> #define PFLASH_LAZY_ROMD_THRESHOLD 42
>
> -#define CFI_PFLASH02(obj) \
> - OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02)
> +#define PFLASH_CFI02(obj) \
> + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02)
>
> struct PFlashCFI02 {
> /*< private >*/
> @@ -534,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le = {
>
> static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
> {
> - PFlashCFI02 *pfl = CFI_PFLASH02(dev);
> + PFlashCFI02 *pfl = PFLASH_CFI02(dev);
> uint32_t chip_len;
> int ret;
> Error *local_err = NULL;
> @@ -706,7 +706,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
> }
>
> static const TypeInfo pflash_cfi02_info = {
> - .name = TYPE_CFI_PFLASH02,
> + .name = TYPE_PFLASH_CFI02,
> .parent = TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(PFlashCFI02),
> .class_init = pflash_cfi02_class_init,
> @@ -731,7 +731,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> uint16_t unlock_addr1,
> int be)
> {
> - DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH02);
> + DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI02);
>
> if (blk) {
> qdev_prop_set_drive(dev, "drive", blk, &error_abort);
> @@ -751,5 +751,5 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> qdev_init_nofail(dev);
>
> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
> - return CFI_PFLASH02(dev);
> + return PFLASH_CFI02(dev);
> }
> diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
> index 51d8f60c65..333005d9ff 100644
> --- a/include/hw/block/flash.h
> +++ b/include/hw/block/flash.h
> @@ -7,7 +7,7 @@
>
> /* pflash_cfi01.c */
>
> -#define TYPE_CFI_PFLASH01 "cfi.pflash01"
> +#define TYPE_PFLASH_CFI01 "cfi.pflash01"
>
> typedef struct PFlashCFI01 PFlashCFI01;
>
> @@ -24,7 +24,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
>
> /* pflash_cfi02.c */
>
> -#define TYPE_CFI_PFLASH02 "cfi.pflash02"
> +#define TYPE_PFLASH_CFI02 "cfi.pflash02"
>
> typedef struct PFlashCFI02 PFlashCFI02;
>
>
Thanks!
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2 Markus Armbruster
@ 2019-02-27 1:11 ` BALATON Zoltan
2019-02-27 6:57 ` Markus Armbruster
2019-03-05 13:55 ` [Qemu-devel] " Philippe Mathieu-Daudé
1 sibling, 1 reply; 43+ messages in thread
From: BALATON Zoltan @ 2019-02-27 1:11 UTC (permalink / raw)
To: Markus Armbruster
Cc: qemu-devel, kwolf, qemu-block, alex.bennee, mreitz, qemu-ppc, lersek
On Tue, 26 Feb 2019, Markus Armbruster wrote:
> QOMification left parameter @size unused in pflash_cfi01_register()
> and pflash_cfi02_register(). Obviously, @size should match
> @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
> callers satisfy this.
>
> Remove @nb_blocs and compute it from @size and @sector_len.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/arm/collie.c | 5 +++--
> hw/arm/digic_boards.c | 1 -
> hw/arm/gumstix.c | 4 ++--
> hw/arm/mainstone.c | 2 +-
> hw/arm/musicpal.c | 4 ++--
> hw/arm/omap_sx1.c | 4 ++--
> hw/arm/versatilepb.c | 1 -
> hw/arm/xilinx_zynq.c | 3 +--
> hw/arm/z2.c | 2 +-
> hw/block/pflash_cfi01.c | 5 +++--
> hw/block/pflash_cfi02.c | 5 +++--
> hw/i386/pc_sysfw.c | 6 +-----
> hw/lm32/lm32_boards.c | 4 ++--
> hw/lm32/milkymist.c | 2 +-
> hw/microblaze/petalogix_ml605_mmu.c | 2 +-
> hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
> hw/mips/mips_malta.c | 7 +++----
> hw/mips/mips_r4k.c | 2 +-
> hw/ppc/ppc405_boards.c | 6 +++---
> hw/ppc/sam460ex.c | 2 +-
> hw/ppc/virtex_ml507.c | 2 +-
> hw/sh4/r2d.c | 2 +-
> include/hw/block/flash.h | 4 ++--
> 23 files changed, 36 insertions(+), 41 deletions(-)
>
> diff --git a/hw/arm/collie.c b/hw/arm/collie.c
> index cbc4400f8e..7c9c0615f0 100644
> --- a/hw/arm/collie.c
> +++ b/hw/arm/collie.c
> @@ -9,6 +9,7 @@
> * GNU GPL, version 2 or (at your option) any later version.
> */
> #include "qemu/osdep.h"
> +#include "qemu/units.h"
> #include "hw/hw.h"
> #include "hw/sysbus.h"
> #include "hw/boards.h"
> @@ -38,12 +39,12 @@ static void collie_init(MachineState *machine)
> dinfo = drive_get(IF_PFLASH, 0, 0);
> pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
> + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
>
> dinfo = drive_get(IF_PFLASH, 0, 1);
> pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
> + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
>
> sysbus_create_simple("scoop", 0x40800000, NULL);
>
> diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
> index 15a00a1be3..304e4d1a29 100644
> --- a/hw/arm/digic_boards.c
> +++ b/hw/arm/digic_boards.c
> @@ -131,7 +131,6 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr,
>
> pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE,
> NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
> - FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE,
> DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
> 4,
> 0x00EC, 0x007E, 0x0003, 0x0001,
> diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c
> index 304dbeab2f..2e526218f4 100644
> --- a/hw/arm/gumstix.c
> +++ b/hw/arm/gumstix.c
> @@ -74,7 +74,7 @@ static void connex_init(MachineState *machine)
> #endif
> if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - sector_len, connex_rom / sector_len,
> + sector_len,
> 2, 0, 0, 0, 0, be)) {
I'd say you could also reformat and join next line during this change to
avoid short lines in the middle (also for all other similar changes
below). But I have no strong feelings about that so I don't mind. (This
might be easier to review the patch this way but the resulting code will
look ugly.)
Regards,
BALATON Zoltan
> error_report("Error registering flash memory");
> exit(1);
> @@ -111,7 +111,7 @@ static void verdex_init(MachineState *machine)
> #endif
> if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - sector_len, verdex_rom / sector_len,
> + sector_len,
> 2, 0, 0, 0, 0, be)) {
> error_report("Error registering flash memory");
> exit(1);
> diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
> index 2a1c1072db..6e15ba9663 100644
> --- a/hw/arm/mainstone.c
> +++ b/hw/arm/mainstone.c
> @@ -152,7 +152,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
> i ? "mainstone.flash1" : "mainstone.flash0",
> MAINSTONE_FLASH,
> blk_by_legacy_dinfo(dinfo),
> - sector_len, MAINSTONE_FLASH / sector_len,
> + sector_len,
> 4, 0, 0, 0, 0, be)) {
> error_report("Error registering flash memory");
> exit(1);
> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
> index cc780dfb37..0f4f02df8e 100644
> --- a/hw/arm/musicpal.c
> +++ b/hw/arm/musicpal.c
> @@ -1638,14 +1638,14 @@ static void musicpal_init(MachineState *machine)
> #ifdef TARGET_WORDS_BIGENDIAN
> pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
> "musicpal.flash", flash_size,
> - blk, 0x10000, (flash_size + 0xffff) >> 16,
> + blk, 0x10000,
> MP_FLASH_SIZE_MAX / flash_size,
> 2, 0x00BF, 0x236D, 0x0000, 0x0000,
> 0x5555, 0x2AAA, 1);
> #else
> pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
> "musicpal.flash", flash_size,
> - blk, 0x10000, (flash_size + 0xffff) >> 16,
> + blk, 0x10000,
> MP_FLASH_SIZE_MAX / flash_size,
> 2, 0x00BF, 0x236D, 0x0000, 0x0000,
> 0x5555, 0x2AAA, 0);
> diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
> index b1128777cf..b269a5e1c2 100644
> --- a/hw/arm/omap_sx1.c
> +++ b/hw/arm/omap_sx1.c
> @@ -155,7 +155,7 @@ static void sx1_init(MachineState *machine, const int version)
> if (!pflash_cfi01_register(OMAP_CS0_BASE,
> "omap_sx1.flash0-1", flash_size,
> blk_by_legacy_dinfo(dinfo),
> - sector_size, flash_size / sector_size,
> + sector_size,
> 4, 0, 0, 0, 0, be)) {
> fprintf(stderr, "qemu: Error registering flash memory %d.\n",
> fl_idx);
> @@ -179,7 +179,7 @@ static void sx1_init(MachineState *machine, const int version)
> if (!pflash_cfi01_register(OMAP_CS1_BASE,
> "omap_sx1.flash1-1", flash1_size,
> blk_by_legacy_dinfo(dinfo),
> - sector_size, flash1_size / sector_size,
> + sector_size,
> 4, 0, 0, 0, 0, be)) {
> fprintf(stderr, "qemu: Error registering flash memory %d.\n",
> fl_idx);
> diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
> index 82c5277462..d67181810a 100644
> --- a/hw/arm/versatilepb.c
> +++ b/hw/arm/versatilepb.c
> @@ -369,7 +369,6 @@ static void versatile_init(MachineState *machine, int board_id)
> VERSATILE_FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> VERSATILE_FLASH_SECT_SIZE,
> - VERSATILE_FLASH_SIZE / VERSATILE_FLASH_SECT_SIZE,
> 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) {
> fprintf(stderr, "qemu: Error registering flash memory.\n");
> }
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index 1fa4a77728..f36cfcfd4a 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -207,8 +207,7 @@ static void zynq_init(MachineState *machine)
> /* AMD */
> pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - FLASH_SECTOR_SIZE,
> - FLASH_SIZE/FLASH_SECTOR_SIZE, 1,
> + FLASH_SECTOR_SIZE, 1,
> 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
> 0);
>
> diff --git a/hw/arm/z2.c b/hw/arm/z2.c
> index 54e6caee9f..fb073ec2f5 100644
> --- a/hw/arm/z2.c
> +++ b/hw/arm/z2.c
> @@ -326,7 +326,7 @@ static void z2_init(MachineState *machine)
>
> if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - sector_len, Z2_FLASH_SIZE / sector_len,
> + sector_len,
> 4, 0, 0, 0, 0, be)) {
> error_report("Error registering flash memory");
> exit(1);
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index bd42487c0a..9d1c356eb6 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -940,7 +940,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> const char *name,
> hwaddr size,
> BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> + uint32_t sector_len,
> int bank_width,
> uint16_t id0, uint16_t id1,
> uint16_t id2, uint16_t id3,
> @@ -951,7 +951,8 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> if (blk) {
> qdev_prop_set_drive(dev, "drive", blk, &error_abort);
> }
> - qdev_prop_set_uint32(dev, "num-blocks", nb_blocs);
> + assert(size % sector_len == 0);
> + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len);
> qdev_prop_set_uint64(dev, "sector-length", sector_len);
> qdev_prop_set_uint8(dev, "width", bank_width);
> qdev_prop_set_bit(dev, "big-endian", !!be);
> diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
> index c261ebff72..33779ce807 100644
> --- a/hw/block/pflash_cfi02.c
> +++ b/hw/block/pflash_cfi02.c
> @@ -720,7 +720,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> const char *name,
> hwaddr size,
> BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> + uint32_t sector_len,
> int nb_mappings, int width,
> uint16_t id0, uint16_t id1,
> uint16_t id2, uint16_t id3,
> @@ -733,7 +733,8 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> if (blk) {
> qdev_prop_set_drive(dev, "drive", blk, &error_abort);
> }
> - qdev_prop_set_uint32(dev, "num-blocks", nb_blocs);
> + assert(size % sector_len == 0);
> + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len);
> qdev_prop_set_uint32(dev, "sector-length", sector_len);
> qdev_prop_set_uint8(dev, "width", width);
> qdev_prop_set_uint8(dev, "mappings", nb_mappings);
> diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
> index 9a5be54a85..34727c5b1f 100644
> --- a/hw/i386/pc_sysfw.c
> +++ b/hw/i386/pc_sysfw.c
> @@ -110,16 +110,13 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
> int64_t size;
> char *fatal_errmsg = NULL;
> hwaddr phys_addr = 0x100000000ULL;
> - int sector_bits, sector_size;
> + uint32_t sector_size = 4096;
> PFlashCFI01 *system_flash;
> MemoryRegion *flash_mem;
> char name[64];
> void *flash_ptr;
> int ret, flash_size;
>
> - sector_bits = 12;
> - sector_size = 1 << sector_bits;
> -
> for (unit = 0;
> (unit < FLASH_MAP_UNIT_MAX &&
> (pflash_drv = drive_get(IF_PFLASH, 0, unit)) != NULL);
> @@ -162,7 +159,6 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
> snprintf(name, sizeof name, "system.flash%d", unit);
> system_flash = pflash_cfi01_register(phys_addr, name,
> size, blk, sector_size,
> - size >> sector_bits,
> 1 /* width */,
> 0x0000 /* id0 */,
> 0x0000 /* id1 */,
> diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
> index f726355309..09f411ed07 100644
> --- a/hw/lm32/lm32_boards.c
> +++ b/hw/lm32/lm32_boards.c
> @@ -116,7 +116,7 @@ static void lm32_evr_init(MachineState *machine)
> /* Spansion S29NS128P */
> pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - flash_sector_size, flash_size / flash_sector_size,
> + flash_sector_size,
> 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
>
> /* create irq lines */
> @@ -209,7 +209,7 @@ static void lm32_uclinux_init(MachineState *machine)
> /* Spansion S29NS128P */
> pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - flash_sector_size, flash_size / flash_sector_size,
> + flash_sector_size,
> 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
>
> /* create irq lines */
> diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
> index ece7e3b699..46b0f51fdf 100644
> --- a/hw/lm32/milkymist.c
> +++ b/hw/lm32/milkymist.c
> @@ -123,7 +123,7 @@ milkymist_init(MachineState *machine)
> /* Numonyx JS28F256J3F105 */
> pflash_cfi01_register(flash_base, "milkymist.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - flash_sector_size, flash_size / flash_sector_size,
> + flash_sector_size,
> 2, 0x00, 0x89, 0x00, 0x1d, 1);
>
> /* create irq lines */
> diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
> index 74bcc14cda..46904d2012 100644
> --- a/hw/microblaze/petalogix_ml605_mmu.c
> +++ b/hw/microblaze/petalogix_ml605_mmu.c
> @@ -109,7 +109,7 @@ petalogix_ml605_init(MachineState *machine)
> * 10th paremeter 0 means little-endian */
> pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, FLASH_SIZE >> 16,
> + 64 * KiB,
> 2, 0x89, 0x18, 0x0000, 0x0, 0);
>
>
> diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
> index a07b7f8edf..027c31fdcc 100644
> --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
> +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
> @@ -90,7 +90,7 @@ petalogix_s3adsp1800_init(MachineState *machine)
> pflash_cfi01_register(FLASH_BASEADDR,
> "petalogix_s3adsp1800.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, FLASH_SIZE >> 16,
> + 64 * KiB,
> 1, 0x89, 0x18, 0x0000, 0x0, 1);
>
> dev = qdev_create(NULL, "xlnx.xps-intc");
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index fdf1434b28..647d4a2dac 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -1208,7 +1208,6 @@ void mips_malta_init(MachineState *machine)
> DriveInfo *dinfo;
> DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
> int fl_idx = 0;
> - int fl_sectors = bios_size >> 16;
> int be;
>
> DeviceState *dev = qdev_create(NULL, TYPE_MIPS_MALTA);
> @@ -1268,15 +1267,15 @@ void mips_malta_init(MachineState *machine)
> #ifdef DEBUG_BOARD_INIT
> if (dinfo) {
> printf("Register parallel flash %d size " TARGET_FMT_lx " at "
> - "addr %08llx '%s' %x\n",
> + "addr %08llx '%s'\n",
> fl_idx, FLASH_SIZE, FLASH_ADDRESS,
> - blk_name(dinfo->bdrv), fl_sectors);
> + blk_name(dinfo->bdrv));
> }
> #endif
> fl = pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios",
> FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 65536, fl_sectors,
> + 65536,
> 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
> bios = pflash_cfi01_get_memory(fl);
> fl_idx++;
> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
> index 0b9df466e7..acfd59c17a 100644
> --- a/hw/mips/mips_r4k.c
> +++ b/hw/mips/mips_r4k.c
> @@ -237,7 +237,7 @@ void mips_r4k_init(MachineState *machine)
> uint32_t mips_rom = 0x00400000;
> if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
> blk_by_legacy_dinfo(dinfo),
> - sector_len, mips_rom / sector_len,
> + sector_len,
> 4, 0, 0, 0, 0, be)) {
> fprintf(stderr, "qemu: Error registering flash memory.\n");
> }
> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
> index dfaea45898..1dd5c8b797 100644
> --- a/hw/ppc/ppc405_boards.c
> +++ b/hw/ppc/ppc405_boards.c
> @@ -195,7 +195,7 @@ static void ref405ep_init(MachineState *machine)
> pflash_cfi02_register((uint32_t)(-bios_size),
> "ef405ep.bios", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, bios_size / (64 * KiB), 1,
> + 64 * KiB, 1,
> 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> } else
> @@ -486,7 +486,7 @@ static void taihu_405ep_init(MachineState *machine)
> pflash_cfi02_register(0xFFE00000,
> "taihu_405ep.bios", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, bios_size / (64 * KiB), 1,
> + 64 * KiB, 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> fl_idx++;
> @@ -528,7 +528,7 @@ static void taihu_405ep_init(MachineState *machine)
> #endif
> pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, bios_size / (64 * KiB), 1,
> + 64 * KiB, 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> fl_idx++;
> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
> index ad36cb12c8..1de0a1b47c 100644
> --- a/hw/ppc/sam460ex.c
> +++ b/hw/ppc/sam460ex.c
> @@ -115,7 +115,7 @@ static int sam460ex_load_uboot(void)
> if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
> "sam460ex.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, FLASH_SIZE / (64 * KiB),
> + 64 * KiB,
> 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
> error_report("Error registering flash memory");
> /* XXX: return an error instead? */
> diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
> index d2085a839c..4f86c22968 100644
> --- a/hw/ppc/virtex_ml507.c
> +++ b/hw/ppc/virtex_ml507.c
> @@ -229,7 +229,7 @@ static void virtex_init(MachineState *machine)
> dinfo = drive_get(IF_PFLASH, 0, 0);
> pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, FLASH_SIZE >> 16,
> + 64 * KiB,
> 1, 0x89, 0x18, 0x0000, 0x0, 1);
>
> cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
> diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
> index abd3b67c28..5e6953537c 100644
> --- a/hw/sh4/r2d.c
> +++ b/hw/sh4/r2d.c
> @@ -299,7 +299,7 @@ static void r2d_init(MachineState *machine)
> */
> pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE / 4,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 16 * KiB, FLASH_SIZE >> 16,
> + 16 * KiB,
> 1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
> 0x555, 0x2aa, 0);
>
> diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
> index 3e48901c84..914932eaec 100644
> --- a/include/hw/block/flash.h
> +++ b/include/hw/block/flash.h
> @@ -17,7 +17,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> const char *name,
> hwaddr size,
> BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> + uint32_t sector_len,
> int width,
> uint16_t id0, uint16_t id1,
> uint16_t id2, uint16_t id3,
> @@ -36,7 +36,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> const char *name,
> hwaddr size,
> BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> + uint32_t sector_len,
> int nb_mappings,
> int width,
> uint16_t id0, uint16_t id1,
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2
2019-02-27 1:11 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
@ 2019-02-27 6:57 ` Markus Armbruster
0 siblings, 0 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-02-27 6:57 UTC (permalink / raw)
To: BALATON Zoltan
Cc: kwolf, qemu-block, lersek, qemu-devel, mreitz, qemu-ppc, alex.bennee
BALATON Zoltan <balaton@eik.bme.hu> writes:
> On Tue, 26 Feb 2019, Markus Armbruster wrote:
>> QOMification left parameter @size unused in pflash_cfi01_register()
>> and pflash_cfi02_register(). Obviously, @size should match
>> @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
>> callers satisfy this.
>>
>> Remove @nb_blocs and compute it from @size and @sector_len.
>>
>> Signed-off-by: Markus Armbruster <armbru@redhat.com>
>> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
>> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
[...]
>> diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c
>> index 304dbeab2f..2e526218f4 100644
>> --- a/hw/arm/gumstix.c
>> +++ b/hw/arm/gumstix.c
>> @@ -74,7 +74,7 @@ static void connex_init(MachineState *machine)
>> #endif
>> if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom,
>> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
>> - sector_len, connex_rom / sector_len,
>> + sector_len,
>> 2, 0, 0, 0, 0, be)) {
>
> I'd say you could also reformat and join next line during this change
> to avoid short lines in the middle (also for all other similar changes
> below). But I have no strong feelings about that so I don't
> mind. (This might be easier to review the patch this way but the
> resulting code will look ugly.)
Will do, thanks!
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups
2019-02-26 19:56 ` [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Alex Bennée
@ 2019-02-27 6:57 ` Markus Armbruster
2019-02-27 11:30 ` Alex Bennée
0 siblings, 1 reply; 43+ messages in thread
From: Markus Armbruster @ 2019-02-27 6:57 UTC (permalink / raw)
To: Alex Bennée; +Cc: kwolf, qemu-block, qemu-devel, mreitz, qemu-ppc, lersek
Alex Bennée <alex.bennee@linaro.org> writes:
> Markus Armbruster <armbru@redhat.com> writes:
>
>> Alex Bennée posted this patch to address an XXX comment in
>> pflash_cfi01_realize() the other day:
>
> If I send you v5 will you include that in your series?
Sure!
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 07/11] ppc405_boards: Don't size flash memory to match backing image
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 07/11] ppc405_boards: " Markus Armbruster
@ 2019-02-27 10:35 ` Alex Bennée
2019-03-07 7:01 ` Markus Armbruster
2019-03-05 19:23 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 43+ messages in thread
From: Alex Bennée @ 2019-02-27 10:35 UTC (permalink / raw)
To: Markus Armbruster
Cc: qemu-devel, lersek, kwolf, mreitz, qemu-block, qemu-ppc, David Gibson
Markus Armbruster <armbru@redhat.com> writes:
> Machine "ref405ep" maps its flash memory at address 2^32 - image size.
> Image size is rounded up to the next multiple of 64KiB. Useless,
> because pflash_cfi02_realize() fails with "failed to read the initial
> flash content" unless the rounding is a no-op.
>
> If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then
> other stuff. No idea how that would play out, but a useful outcomes
> seem unlikely.
>
> Map the flash memory at fixed address 0xFFF80000 with size 512KiB,
> regardless of image size, to match the physical hardware.
>
> Machine "taihu" maps its boot flash memory similarly. The code even
> has a comment /* XXX: should check that size is 2MB */, followed by
> disabled code to adjust the size to 2MiB regardless of image size.
>
> Its code to map its application flash memory looks the same, except
> there the XXX comment asks for 32MiB, and the code to adjust the size
> isn't disabled. Note that pflash_cfi02_realize() fails with "failed
> to read the initial flash content" for images smaller than 32MiB.
>
> Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB,
> to match the physical hardware. Delete dead code from application
> flash mapping, and simplify some.
It seems to me the DEBUG_BOARD_INIT code is probably out of date cruft
that could be excised all together. But that doesn't stop this being
useful:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/ppc/ppc405_boards.c | 51 +++++++++++++-----------------------------
> 1 file changed, 15 insertions(+), 36 deletions(-)
>
> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
> index f47b15f10e..672717ef1b 100644
> --- a/hw/ppc/ppc405_boards.c
> +++ b/hw/ppc/ppc405_boards.c
> @@ -158,7 +158,7 @@ static void ref405ep_init(MachineState *machine)
> target_ulong kernel_base, initrd_base;
> long kernel_size, initrd_size;
> int linux_boot;
> - int fl_idx, fl_sectors, len;
> + int len;
> DriveInfo *dinfo;
> MemoryRegion *sysmem = get_system_memory();
>
> @@ -185,26 +185,19 @@ static void ref405ep_init(MachineState *machine)
> #ifdef DEBUG_BOARD_INIT
> printf("%s: register BIOS\n", __func__);
> #endif
> - fl_idx = 0;
> #ifdef USE_FLASH_BIOS
> - dinfo = drive_get(IF_PFLASH, 0, fl_idx);
> + dinfo = drive_get(IF_PFLASH, 0, 0);
> if (dinfo) {
> - BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
> -
> - bios_size = blk_getlength(blk);
> - fl_sectors = (bios_size + 65535) >> 16;
> #ifdef DEBUG_BOARD_INIT
> - printf("Register parallel flash %d size %lx"
> - " at addr %lx '%s' %d\n",
> - fl_idx, bios_size, -bios_size,
> - blk_name(blk), fl_sectors);
> + printf("Register parallel flash\n");
> #endif
> + bios_size = 8 * MiB;
> pflash_cfi02_register((uint32_t)(-bios_size),
> NULL, "ef405ep.bios", bios_size,
> - blk, 65536, fl_sectors, 1,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, bios_size / (64 * KiB), 1,
> 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> - fl_idx++;
> } else
> #endif
> {
> @@ -455,7 +448,7 @@ static void taihu_405ep_init(MachineState *machine)
> target_ulong kernel_base, initrd_base;
> long kernel_size, initrd_size;
> int linux_boot;
> - int fl_idx, fl_sectors;
> + int fl_idx;
> DriveInfo *dinfo;
>
> /* RAM is soldered to the board so the size cannot be changed */
> @@ -486,21 +479,14 @@ static void taihu_405ep_init(MachineState *machine)
> #if defined(USE_FLASH_BIOS)
> dinfo = drive_get(IF_PFLASH, 0, fl_idx);
> if (dinfo) {
> - BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
> -
> - bios_size = blk_getlength(blk);
> - /* XXX: should check that size is 2MB */
> - // bios_size = 2 * 1024 * 1024;
> - fl_sectors = (bios_size + 65535) >> 16;
> #ifdef DEBUG_BOARD_INIT
> - printf("Register parallel flash %d size %lx"
> - " at addr %lx '%s' %d\n",
> - fl_idx, bios_size, -bios_size,
> - blk_name(blk), fl_sectors);
> + printf("Register boot flash\n");
> #endif
> - pflash_cfi02_register((uint32_t)(-bios_size),
> + bios_size = 2 * MiB;
> + pflash_cfi02_register(0xFFE00000,
> NULL, "taihu_405ep.bios", bios_size,
> - blk, 65536, fl_sectors, 1,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, bios_size / (64 * KiB), 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> fl_idx++;
> @@ -536,20 +522,13 @@ static void taihu_405ep_init(MachineState *machine)
> /* Register Linux flash */
> dinfo = drive_get(IF_PFLASH, 0, fl_idx);
> if (dinfo) {
> - BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
> -
> - bios_size = blk_getlength(blk);
> - /* XXX: should check that size is 32MB */
> bios_size = 32 * MiB;
> - fl_sectors = (bios_size + 65535) >> 16;
> #ifdef DEBUG_BOARD_INIT
> - printf("Register parallel flash %d size %lx"
> - " at addr " TARGET_FMT_lx " '%s'\n",
> - fl_idx, bios_size, (target_ulong)0xfc000000,
> - blk_name(blk));
> + printf("Register application flash\n"
> #endif
> pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size,
> - blk, 65536, fl_sectors, 1,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, bios_size / (64 * KiB), 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> fl_idx++;
--
Alex Bennée
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image Markus Armbruster
2019-02-26 22:30 ` BALATON Zoltan
@ 2019-02-27 11:04 ` Alex Bennée
2019-03-05 19:12 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 43+ messages in thread
From: Alex Bennée @ 2019-02-27 11:04 UTC (permalink / raw)
To: Markus Armbruster
Cc: qemu-devel, lersek, kwolf, mreitz, qemu-block, qemu-ppc, BALATON Zoltan
Markus Armbruster <armbru@redhat.com> writes:
> Machine "sam460ex" maps its flash memory at address 0xFFF00000. When
> no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM
> get mapped on top of its second half. Else, it's the size of the
> image rounded up to the next multiple of 64KiB.
>
> The rounding is actually useless: pflash_cfi01_realize() fails with
> "failed to read the initial flash content" unless it's a no-op.
>
> I have no idea what happens when the pflash's size exceeds 1MiB.
> Useful outcomes seem unlikely.
>
> I guess memory at the end of the address space remains unmapped when
> it's smaller than 1MiB. Again, useful outcomes seem unlikely.
>
> The physical hardware appears to have 512KiB of flash memory:
> https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf
>
> For now, just set the flash memory size to 1MiB regardless of image
> size, and document the mess.
>
> Cc: BALATON Zoltan <balaton@eik.bme.hu>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++---------------
> 1 file changed, 26 insertions(+), 15 deletions(-)
>
> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
> index 75250d49e4..0c919529f8 100644
> --- a/hw/ppc/sam460ex.c
> +++ b/hw/ppc/sam460ex.c
> @@ -91,32 +91,43 @@ struct boot_info {
>
> static int sam460ex_load_uboot(void)
> {
> + /*
> + * This first creates 1MiB of flash memory mapped at the end of
> + * the 32-bit address space (0xFFF00000..0xFFFFFFFF).
> + *
> + * If_PFLASH unit 0 is defined, the flash memory is initialized
> + * from that block backend.
> + *
> + * Else, it's initialized to zero. And then 512KiB of ROM get
> + * mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
> + * initialized from u-boot-sam460-20100605.bin.
> + *
> + * This doesn't smell right.
> + *
> + * The physical hardware appears to have 512KiB flash memory.
> + *
> + * TODO Figure out what we really need here, and clean this up.
> + */
> +
> DriveInfo *dinfo;
> - BlockBackend *blk = NULL;
> - hwaddr base = FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32);
> - long bios_size = FLASH_SIZE;
> - int fl_sectors;
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> - if (dinfo) {
> - blk = blk_by_legacy_dinfo(dinfo);
> - bios_size = blk_getlength(blk);
> - }
> - fl_sectors = (bios_size + 65535) >> 16;
> -
> - if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size,
> - blk, 64 * KiB, fl_sectors,
> + if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
> + NULL, "sam460ex.flash", FLASH_SIZE,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, FLASH_SIZE / (64 * KiB),
> 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
> error_report("Error registering flash memory");
> /* XXX: return an error instead? */
> exit(1);
> }
>
> - if (!blk) {
> + if (!dinfo) {
> /*error_report("No flash image given with the 'pflash' parameter,"
> " using default u-boot image");*/
> - base = UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32);
> - rom_add_file_fixed(UBOOT_FILENAME, base, -1);
> + rom_add_file_fixed(UBOOT_FILENAME,
> + UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
> + -1);
> }
>
> return 0;
--
Alex Bennée
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer"
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer" Markus Armbruster
2019-02-26 23:59 ` Philippe Mathieu-Daudé
@ 2019-02-27 11:09 ` Alex Bennée
1 sibling, 0 replies; 43+ messages in thread
From: Alex Bennée @ 2019-02-27 11:09 UTC (permalink / raw)
To: Markus Armbruster; +Cc: qemu-devel, lersek, kwolf, mreitz, qemu-block, qemu-ppc
Markus Armbruster <armbru@redhat.com> writes:
> When a guest tries to abort "write to buffer" (command 0xE8), we print
> "PFLASH: Possible BUG - Write block confirm", then exit(1). Letting
> the guest terminate QEMU is not a good idea. Instead, LOG_UNIMP we
> screwed up, then reset the device.
>
> Macro PFLASH_BUG() is now unused; delete it.
>
> Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/block/pflash_cfi01.c | 13 +++++--------
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index a51ac9f399..e6d933a06d 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -49,12 +49,6 @@
> #include "sysemu/sysemu.h"
> #include "trace.h"
>
> -#define PFLASH_BUG(fmt, ...) \
> -do { \
> - fprintf(stderr, "PFLASH: Possible BUG - " fmt, ## __VA_ARGS__); \
> - exit(1); \
> -} while(0)
> -
> /* #define PFLASH_DEBUG */
> #ifdef PFLASH_DEBUG
> #define DPRINTF(fmt, ...) \
> @@ -623,8 +617,11 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> pfl->wcycle = 0;
> pfl->status |= 0x80;
> } else {
> - DPRINTF("%s: unknown command for \"write block\"\n", __func__);
> - PFLASH_BUG("Write block confirm");
> + qemu_log_mask(LOG_UNIMP,
> + "%s: Aborting write to buffer not implemented,"
> + " the data is already written to storage!\n"
> + "Flash device reset into READ mode.\n",
> + __func__);
> goto reset_flash;
> }
> break;
--
Alex Bennée
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI*
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI* Markus Armbruster
2019-02-27 0:00 ` Philippe Mathieu-Daudé
@ 2019-02-27 11:09 ` Alex Bennée
1 sibling, 0 replies; 43+ messages in thread
From: Alex Bennée @ 2019-02-27 11:09 UTC (permalink / raw)
To: Markus Armbruster; +Cc: qemu-devel, lersek, kwolf, mreitz, qemu-block, qemu-ppc
Markus Armbruster <armbru@redhat.com> writes:
> pflash_cfi01.c and pflash_cfi02.c start their identifiers with
> pflash_cfi01_ and pflash_cfi02_ respectively, except for
> CFI_PFLASH01(), TYPE_CFI_PFLASH01, CFI_PFLASH02(), TYPE_CFI_PFLASH02.
> Rename for consistency.
>
> Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/block/pflash_cfi01.c | 12 ++++++------
> hw/block/pflash_cfi02.c | 12 ++++++------
> include/hw/block/flash.h | 4 ++--
> 3 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index d381f14e3c..f75f0a6998 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -59,8 +59,8 @@ do { \
> #define DPRINTF(fmt, ...) do { } while (0)
> #endif
>
> -#define CFI_PFLASH01(obj) \
> - OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01)
> +#define PFLASH_CFI01(obj) \
> + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01)
>
> #define PFLASH_BE 0
> #define PFLASH_SECURE 1
> @@ -698,7 +698,7 @@ static const MemoryRegionOps pflash_cfi01_ops = {
>
> static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
> {
> - PFlashCFI01 *pfl = CFI_PFLASH01(dev);
> + PFlashCFI01 *pfl = PFLASH_CFI01(dev);
> uint64_t total_len;
> int ret;
> uint64_t blocks_per_device, sector_len_per_device, device_len;
> @@ -926,7 +926,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
>
>
> static const TypeInfo pflash_cfi01_info = {
> - .name = TYPE_CFI_PFLASH01,
> + .name = TYPE_PFLASH_CFI01,
> .parent = TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(PFlashCFI01),
> .class_init = pflash_cfi01_class_init,
> @@ -949,7 +949,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> uint16_t id2, uint16_t id3,
> int be)
> {
> - DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);
> + DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI01);
>
> if (blk) {
> qdev_prop_set_drive(dev, "drive", blk, &error_abort);
> @@ -966,7 +966,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> qdev_init_nofail(dev);
>
> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
> - return CFI_PFLASH01(dev);
> + return PFLASH_CFI01(dev);
> }
>
> MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl)
> diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
> index 9f8486e4cf..c0869fc417 100644
> --- a/hw/block/pflash_cfi02.c
> +++ b/hw/block/pflash_cfi02.c
> @@ -57,8 +57,8 @@ do { \
>
> #define PFLASH_LAZY_ROMD_THRESHOLD 42
>
> -#define CFI_PFLASH02(obj) \
> - OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02)
> +#define PFLASH_CFI02(obj) \
> + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02)
>
> struct PFlashCFI02 {
> /*< private >*/
> @@ -534,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le = {
>
> static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
> {
> - PFlashCFI02 *pfl = CFI_PFLASH02(dev);
> + PFlashCFI02 *pfl = PFLASH_CFI02(dev);
> uint32_t chip_len;
> int ret;
> Error *local_err = NULL;
> @@ -706,7 +706,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
> }
>
> static const TypeInfo pflash_cfi02_info = {
> - .name = TYPE_CFI_PFLASH02,
> + .name = TYPE_PFLASH_CFI02,
> .parent = TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(PFlashCFI02),
> .class_init = pflash_cfi02_class_init,
> @@ -731,7 +731,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> uint16_t unlock_addr1,
> int be)
> {
> - DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH02);
> + DeviceState *dev = qdev_create(NULL, TYPE_PFLASH_CFI02);
>
> if (blk) {
> qdev_prop_set_drive(dev, "drive", blk, &error_abort);
> @@ -751,5 +751,5 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> qdev_init_nofail(dev);
>
> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
> - return CFI_PFLASH02(dev);
> + return PFLASH_CFI02(dev);
> }
> diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
> index 51d8f60c65..333005d9ff 100644
> --- a/include/hw/block/flash.h
> +++ b/include/hw/block/flash.h
> @@ -7,7 +7,7 @@
>
> /* pflash_cfi01.c */
>
> -#define TYPE_CFI_PFLASH01 "cfi.pflash01"
> +#define TYPE_PFLASH_CFI01 "cfi.pflash01"
>
> typedef struct PFlashCFI01 PFlashCFI01;
>
> @@ -24,7 +24,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
>
> /* pflash_cfi02.c */
>
> -#define TYPE_CFI_PFLASH02 "cfi.pflash02"
> +#define TYPE_PFLASH_CFI02 "cfi.pflash02"
>
> typedef struct PFlashCFI02 PFlashCFI02;
--
Alex Bennée
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 09/11] mips_malta: Clean up definition of flash memory size somewhat
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 09/11] mips_malta: Clean up definition of flash memory size somewhat Markus Armbruster
@ 2019-02-27 11:28 ` Alex Bennée
2019-03-05 16:33 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 43+ messages in thread
From: Alex Bennée @ 2019-02-27 11:28 UTC (permalink / raw)
To: Markus Armbruster
Cc: qemu-devel, lersek, kwolf, mreitz, qemu-block, qemu-ppc,
Aurelien Jarno, Aleksandar Rikalo
Markus Armbruster <armbru@redhat.com> writes:
> pflash_cfi01_register() takes a size in bytes, a block size in bytes
> and a number of blocks. mips_malta_init() passes BIOS_SIZE, 65536,
> FLASH_SIZE >> 16. Actually consistent only because BIOS_SIZE (defined
> in include/hw/mips/bios.h as (4 * MiB)) matches FLASH_SIZE (defined
> locally as 0x400000). Confusing all the same.
>
> Pass FLASH_SIZE instead of BIOS_SIZE.
>
> There are more uses of BIOS_SIZE, but I don't sufficiently understand
> them to attempt cleanup.
>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> Cc: Aleksandar Rikalo <arikalo@wavecomp.com>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> ---
> hw/mips/mips_malta.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 172ee033af..c2a5c65a24 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -1269,12 +1269,12 @@ void mips_malta_init(MachineState *machine)
> if (dinfo) {
> printf("Register parallel flash %d size " TARGET_FMT_lx " at "
> "addr %08llx '%s' %x\n",
> - fl_idx, bios_size, FLASH_ADDRESS,
> + fl_idx, FLASH_SIZE, FLASH_ADDRESS,
bios_size == FLASH_SIZE at this point, but is then overwritten later in
the function *if* the flash is loaded (and not already set via a dinfo).
I'd say you could move bios_size down to were it's used but then you
confused the byte swapping machinery which expects something to be set.
All that said these changes so far are not wrong:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> blk_name(dinfo->bdrv), fl_sectors);
> }
> #endif
> fl = pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios",
> - BIOS_SIZE,
> + FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 65536, fl_sectors,
> 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
--
Alex Bennée
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed "write to buffer"
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed " Markus Armbruster
2019-02-26 23:57 ` Philippe Mathieu-Daudé
@ 2019-02-27 11:30 ` Alex Bennée
1 sibling, 0 replies; 43+ messages in thread
From: Alex Bennée @ 2019-02-27 11:30 UTC (permalink / raw)
To: Markus Armbruster; +Cc: qemu-devel, lersek, kwolf, mreitz, qemu-block, qemu-ppc
Markus Armbruster <armbru@redhat.com> writes:
> Our implementation of "write to buffer" (command 0xE8) is flawed.
> LOG_UNIMP its use, and add some FIXME comments.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/block/pflash_cfi01.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index e6d933a06d..d381f14e3c 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -502,6 +502,10 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> break;
> case 0xe8: /* Write to buffer */
> DPRINTF("%s: Write to buffer\n", __func__);
> + /* FIXME should save @offset, @width for case 1+ */
> + qemu_log_mask(LOG_UNIMP,
> + "%s: Write to buffer emulation is flawed\n",
> + __func__);
> pfl->status |= 0x80; /* Ready! */
> break;
> case 0xf0: /* Probe for AMD flash */
> @@ -545,6 +549,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> /* Mask writeblock size based on device width, or bank width if
> * device width not specified.
> */
> + /* FIXME check @offset, @width */
> if (pfl->device_width) {
> value = extract32(value, 0, pfl->device_width * 8);
> } else {
> @@ -582,7 +587,13 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> case 2:
> switch (pfl->cmd) {
> case 0xe8: /* Block write */
> + /* FIXME check @offset, @width */
> if (!pfl->ro) {
> + /*
> + * FIXME writing straight to memory is *wrong*. We
> + * should write to a buffer, and flush it to memory
> + * only on confirm command (see below).
> + */
> pflash_data_write(pfl, offset, value, width, be);
> } else {
> pfl->status |= 0x10; /* Programming error */
> @@ -598,6 +609,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> pfl->wcycle++;
> if (!pfl->ro) {
> /* Flush the entire write buffer onto backing storage. */
> + /* FIXME premature! */
> pflash_update(pfl, offset & mask, pfl->writeblock_size);
> } else {
> pfl->status |= 0x10; /* Programming error */
> @@ -614,6 +626,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> switch (pfl->cmd) {
> case 0xe8: /* Block write */
> if (cmd == 0xd0) {
> + /* FIXME this is where we should write out the buffer */
> pfl->wcycle = 0;
> pfl->status |= 0x80;
> } else {
--
Alex Bennée
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups
2019-02-27 6:57 ` Markus Armbruster
@ 2019-02-27 11:30 ` Alex Bennée
0 siblings, 0 replies; 43+ messages in thread
From: Alex Bennée @ 2019-02-27 11:30 UTC (permalink / raw)
To: Markus Armbruster; +Cc: kwolf, qemu-block, qemu-devel, mreitz, qemu-ppc, lersek
Markus Armbruster <armbru@redhat.com> writes:
> Alex Bennée <alex.bennee@linaro.org> writes:
>
>> Markus Armbruster <armbru@redhat.com> writes:
>>
>>> Alex Bennée posted this patch to address an XXX comment in
>>> pflash_cfi01_realize() the other day:
>>
>> If I send you v5 will you include that in your series?
>
> Sure!
OK, sent:
Subject: [PATCH v5] hw/block: better reporting on pflash backing file mismatch
Date: Wed, 27 Feb 2019 11:13:47 +0000
Message-Id: <20190227111347.15063-1-alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 01/11] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 01/11] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02 Markus Armbruster
@ 2019-03-05 12:22 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-05 12:22 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel
Cc: kwolf, qemu-block, alex.bennee, mreitz, qemu-ppc, lersek
On 2/26/19 8:33 PM, Markus Armbruster wrote:
> flash.h's incomplete struct pflash_t is completed both in
> pflash_cfi01.c and in pflash_cfi02.c. The complete types are
> incompatible. This can hide type errors, such as passing a pflash_t
> created with pflash_cfi02_register() to pflash_cfi01_get_memory().
>
> Furthermore, POSIX reserves typedef names ending with _t.
>
> Rename the two structs to PFlashCFI01 and PFlashCFI02.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> hw/arm/vexpress.c | 8 ++--
> hw/block/pflash_cfi01.c | 89 +++++++++++++++++++++-------------------
> hw/block/pflash_cfi02.c | 71 +++++++++++++++++---------------
> hw/i386/pc_sysfw.c | 2 +-
> hw/mips/mips_malta.c | 2 +-
> hw/xtensa/xtfpga.c | 10 ++---
> include/hw/block/flash.h | 53 ++++++++++++++----------
> 7 files changed, 125 insertions(+), 110 deletions(-)
>
> diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
> index c02d18ee61..ed46d2e730 100644
> --- a/hw/arm/vexpress.c
> +++ b/hw/arm/vexpress.c
> @@ -512,8 +512,8 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt)
> /* Open code a private version of pflash registration since we
> * need to set non-default device width for VExpress platform.
> */
> -static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
> - DriveInfo *di)
> +static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name,
> + DriveInfo *di)
> {
> DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
>
> @@ -536,7 +536,7 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
> qdev_init_nofail(dev);
>
> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
> - return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
> + return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
> }
>
> static void vexpress_common_init(MachineState *machine)
> @@ -548,7 +548,7 @@ static void vexpress_common_init(MachineState *machine)
> qemu_irq pic[64];
> uint32_t sys_id;
> DriveInfo *dinfo;
> - pflash_t *pflash0;
> + PFlashCFI01 *pflash0;
> I2CBus *i2c;
> ram_addr_t vram_size, sram_size;
> MemoryRegion *sysmem = get_system_memory();
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index bffb4c40e7..a51ac9f399 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -65,12 +65,13 @@ do { \
> #define DPRINTF(fmt, ...) do { } while (0)
> #endif
>
> -#define CFI_PFLASH01(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH01)
> +#define CFI_PFLASH01(obj) \
> + OBJECT_CHECK(PFlashCFI01, (obj), TYPE_CFI_PFLASH01)
>
> #define PFLASH_BE 0
> #define PFLASH_SECURE 1
>
> -struct pflash_t {
> +struct PFlashCFI01 {
> /*< private >*/
> SysBusDevice parent_obj;
> /*< public >*/
> @@ -109,17 +110,17 @@ static const VMStateDescription vmstate_pflash = {
> .minimum_version_id = 1,
> .post_load = pflash_post_load,
> .fields = (VMStateField[]) {
> - VMSTATE_UINT8(wcycle, pflash_t),
> - VMSTATE_UINT8(cmd, pflash_t),
> - VMSTATE_UINT8(status, pflash_t),
> - VMSTATE_UINT64(counter, pflash_t),
> + VMSTATE_UINT8(wcycle, PFlashCFI01),
> + VMSTATE_UINT8(cmd, PFlashCFI01),
> + VMSTATE_UINT8(status, PFlashCFI01),
> + VMSTATE_UINT64(counter, PFlashCFI01),
> VMSTATE_END_OF_LIST()
> }
> };
>
> static void pflash_timer (void *opaque)
> {
> - pflash_t *pfl = opaque;
> + PFlashCFI01 *pfl = opaque;
>
> trace_pflash_timer_expired(pfl->cmd);
> /* Reset flash */
> @@ -133,7 +134,7 @@ static void pflash_timer (void *opaque)
> * If this code is called we know we have a device_width set for
> * this flash.
> */
> -static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)
> +static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr offset)
> {
> int i;
> uint32_t resp = 0;
> @@ -193,7 +194,7 @@ static uint32_t pflash_cfi_query(pflash_t *pfl, hwaddr offset)
>
>
> /* Perform a device id query based on the bank width of the flash. */
> -static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
> +static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hwaddr offset)
> {
> int i;
> uint32_t resp;
> @@ -241,7 +242,7 @@ static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
> return resp;
> }
>
> -static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
> +static uint32_t pflash_data_read(PFlashCFI01 *pfl, hwaddr offset,
> int width, int be)
> {
> uint8_t *p;
> @@ -284,8 +285,8 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
> return ret;
> }
>
> -static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
> - int width, int be)
> +static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr offset,
> + int width, int be)
> {
> hwaddr boff;
> uint32_t ret;
> @@ -398,7 +399,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
> }
>
> /* update flash content on disk */
> -static void pflash_update(pflash_t *pfl, int offset,
> +static void pflash_update(PFlashCFI01 *pfl, int offset,
> int size)
> {
> int offset_end;
> @@ -412,7 +413,7 @@ static void pflash_update(pflash_t *pfl, int offset,
> }
> }
>
> -static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
> +static inline void pflash_data_write(PFlashCFI01 *pfl, hwaddr offset,
> uint32_t value, int width, int be)
> {
> uint8_t *p = pfl->storage;
> @@ -448,7 +449,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
>
> }
>
> -static void pflash_write(pflash_t *pfl, hwaddr offset,
> +static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
> uint32_t value, int width, int be)
> {
> uint8_t *p;
> @@ -654,7 +655,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
> static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_t *value,
> unsigned len, MemTxAttrs attrs)
> {
> - pflash_t *pfl = opaque;
> + PFlashCFI01 *pfl = opaque;
> bool be = !!(pfl->features & (1 << PFLASH_BE));
>
> if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
> @@ -668,7 +669,7 @@ static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_
> static MemTxResult pflash_mem_write_with_attrs(void *opaque, hwaddr addr, uint64_t value,
> unsigned len, MemTxAttrs attrs)
> {
> - pflash_t *pfl = opaque;
> + PFlashCFI01 *pfl = opaque;
> bool be = !!(pfl->features & (1 << PFLASH_BE));
>
> if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
> @@ -687,7 +688,7 @@ static const MemoryRegionOps pflash_cfi01_ops = {
>
> static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
> {
> - pflash_t *pfl = CFI_PFLASH01(dev);
> + PFlashCFI01 *pfl = CFI_PFLASH01(dev);
> uint64_t total_len;
> int ret;
> uint64_t blocks_per_device, sector_len_per_device, device_len;
> @@ -864,14 +865,14 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
> }
>
> static Property pflash_cfi01_properties[] = {
> - DEFINE_PROP_DRIVE("drive", struct pflash_t, blk),
> + DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk),
> /* num-blocks is the number of blocks actually visible to the guest,
> * ie the total size of the device divided by the sector length.
> * If we're emulating flash devices wired in parallel the actual
> * number of blocks per indvidual device will differ.
> */
> - DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0),
> - DEFINE_PROP_UINT64("sector-length", struct pflash_t, sector_len, 0),
> + DEFINE_PROP_UINT32("num-blocks", PFlashCFI01, nb_blocs, 0),
> + DEFINE_PROP_UINT64("sector-length", PFlashCFI01, sector_len, 0),
> /* width here is the overall width of this QEMU device in bytes.
> * The QEMU device may be emulating a number of flash devices
> * wired up in parallel; the width of each individual flash
> @@ -888,17 +889,17 @@ static Property pflash_cfi01_properties[] = {
> * 16 bit devices making up a 32 bit wide QEMU device. This
> * is deprecated for new uses of this device.
> */
> - DEFINE_PROP_UINT8("width", struct pflash_t, bank_width, 0),
> - DEFINE_PROP_UINT8("device-width", struct pflash_t, device_width, 0),
> - DEFINE_PROP_UINT8("max-device-width", struct pflash_t, max_device_width, 0),
> - DEFINE_PROP_BIT("big-endian", struct pflash_t, features, PFLASH_BE, 0),
> - DEFINE_PROP_BIT("secure", struct pflash_t, features, PFLASH_SECURE, 0),
> - DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0),
> - DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0),
> - DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0),
> - DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0),
> - DEFINE_PROP_STRING("name", struct pflash_t, name),
> - DEFINE_PROP_BOOL("old-multiple-chip-handling", struct pflash_t,
> + DEFINE_PROP_UINT8("width", PFlashCFI01, bank_width, 0),
> + DEFINE_PROP_UINT8("device-width", PFlashCFI01, device_width, 0),
> + DEFINE_PROP_UINT8("max-device-width", PFlashCFI01, max_device_width, 0),
> + DEFINE_PROP_BIT("big-endian", PFlashCFI01, features, PFLASH_BE, 0),
> + DEFINE_PROP_BIT("secure", PFlashCFI01, features, PFLASH_SECURE, 0),
> + DEFINE_PROP_UINT16("id0", PFlashCFI01, ident0, 0),
> + DEFINE_PROP_UINT16("id1", PFlashCFI01, ident1, 0),
> + DEFINE_PROP_UINT16("id2", PFlashCFI01, ident2, 0),
> + DEFINE_PROP_UINT16("id3", PFlashCFI01, ident3, 0),
> + DEFINE_PROP_STRING("name", PFlashCFI01, name),
> + DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01,
> old_multiple_chip_handling, false),
> DEFINE_PROP_END_OF_LIST(),
> };
> @@ -917,7 +918,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
> static const TypeInfo pflash_cfi01_info = {
> .name = TYPE_CFI_PFLASH01,
> .parent = TYPE_SYS_BUS_DEVICE,
> - .instance_size = sizeof(struct pflash_t),
> + .instance_size = sizeof(PFlashCFI01),
> .class_init = pflash_cfi01_class_init,
> };
>
> @@ -928,13 +929,15 @@ static void pflash_cfi01_register_types(void)
>
> type_init(pflash_cfi01_register_types)
>
> -pflash_t *pflash_cfi01_register(hwaddr base,
> - DeviceState *qdev, const char *name,
> - hwaddr size,
> - BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> - int bank_width, uint16_t id0, uint16_t id1,
> - uint16_t id2, uint16_t id3, int be)
> +PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> + DeviceState *qdev, const char *name,
> + hwaddr size,
> + BlockBackend *blk,
> + uint32_t sector_len, int nb_blocs,
> + int bank_width,
> + uint16_t id0, uint16_t id1,
> + uint16_t id2, uint16_t id3,
> + int be)
> {
> DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);
>
> @@ -956,14 +959,14 @@ pflash_t *pflash_cfi01_register(hwaddr base,
> return CFI_PFLASH01(dev);
> }
>
> -MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl)
> +MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl)
> {
> return &fl->mem;
> }
>
> static void postload_update_cb(void *opaque, int running, RunState state)
> {
> - pflash_t *pfl = opaque;
> + PFlashCFI01 *pfl = opaque;
>
> /* This is called after bdrv_invalidate_cache_all. */
> qemu_del_vm_change_state_handler(pfl->vmstate);
> @@ -975,7 +978,7 @@ static void postload_update_cb(void *opaque, int running, RunState state)
>
> static int pflash_post_load(void *opaque, int version_id)
> {
> - pflash_t *pfl = opaque;
> + PFlashCFI01 *pfl = opaque;
>
> if (!pfl->ro) {
> pfl->vmstate = qemu_add_vm_change_state_handler(postload_update_cb,
> diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
> index 0f8b7b8c7b..9f8486e4cf 100644
> --- a/hw/block/pflash_cfi02.c
> +++ b/hw/block/pflash_cfi02.c
> @@ -57,9 +57,10 @@ do { \
>
> #define PFLASH_LAZY_ROMD_THRESHOLD 42
>
> -#define CFI_PFLASH02(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH02)
> +#define CFI_PFLASH02(obj) \
> + OBJECT_CHECK(PFlashCFI02, (obj), TYPE_CFI_PFLASH02)
>
> -struct pflash_t {
> +struct PFlashCFI02 {
> /*< private >*/
> SysBusDevice parent_obj;
> /*< public >*/
> @@ -101,7 +102,7 @@ struct pflash_t {
> /*
> * Set up replicated mappings of the same region.
> */
> -static void pflash_setup_mappings(pflash_t *pfl)
> +static void pflash_setup_mappings(PFlashCFI02 *pfl)
> {
> unsigned i;
> hwaddr size = memory_region_size(&pfl->orig_mem);
> @@ -115,7 +116,7 @@ static void pflash_setup_mappings(pflash_t *pfl)
> }
> }
>
> -static void pflash_register_memory(pflash_t *pfl, int rom_mode)
> +static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode)
> {
> memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode);
> pfl->rom_mode = rom_mode;
> @@ -123,7 +124,7 @@ static void pflash_register_memory(pflash_t *pfl, int rom_mode)
>
> static void pflash_timer (void *opaque)
> {
> - pflash_t *pfl = opaque;
> + PFlashCFI02 *pfl = opaque;
>
> trace_pflash_timer_expired(pfl->cmd);
> /* Reset flash */
> @@ -137,8 +138,8 @@ static void pflash_timer (void *opaque)
> pfl->cmd = 0;
> }
>
> -static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
> - int width, int be)
> +static uint32_t pflash_read(PFlashCFI02 *pfl, hwaddr offset,
> + int width, int be)
> {
> hwaddr boff;
> uint32_t ret;
> @@ -246,7 +247,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
> }
>
> /* update flash content on disk */
> -static void pflash_update(pflash_t *pfl, int offset,
> +static void pflash_update(PFlashCFI02 *pfl, int offset,
> int size)
> {
> int offset_end;
> @@ -260,8 +261,8 @@ static void pflash_update(pflash_t *pfl, int offset,
> }
> }
>
> -static void pflash_write (pflash_t *pfl, hwaddr offset,
> - uint32_t value, int width, int be)
> +static void pflash_write(PFlashCFI02 *pfl, hwaddr offset,
> + uint32_t value, int width, int be)
> {
> hwaddr boff;
> uint8_t *p;
> @@ -533,7 +534,7 @@ static const MemoryRegionOps pflash_cfi02_ops_le = {
>
> static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
> {
> - pflash_t *pfl = CFI_PFLASH02(dev);
> + PFlashCFI02 *pfl = CFI_PFLASH02(dev);
> uint32_t chip_len;
> int ret;
> Error *local_err = NULL;
> @@ -679,19 +680,19 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
> }
>
> static Property pflash_cfi02_properties[] = {
> - DEFINE_PROP_DRIVE("drive", struct pflash_t, blk),
> - DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0),
> - DEFINE_PROP_UINT32("sector-length", struct pflash_t, sector_len, 0),
> - DEFINE_PROP_UINT8("width", struct pflash_t, width, 0),
> - DEFINE_PROP_UINT8("mappings", struct pflash_t, mappings, 0),
> - DEFINE_PROP_UINT8("big-endian", struct pflash_t, be, 0),
> - DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0),
> - DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0),
> - DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0),
> - DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0),
> - DEFINE_PROP_UINT16("unlock-addr0", struct pflash_t, unlock_addr0, 0),
> - DEFINE_PROP_UINT16("unlock-addr1", struct pflash_t, unlock_addr1, 0),
> - DEFINE_PROP_STRING("name", struct pflash_t, name),
> + DEFINE_PROP_DRIVE("drive", PFlashCFI02, blk),
> + DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, nb_blocs, 0),
> + DEFINE_PROP_UINT32("sector-length", PFlashCFI02, sector_len, 0),
> + DEFINE_PROP_UINT8("width", PFlashCFI02, width, 0),
> + DEFINE_PROP_UINT8("mappings", PFlashCFI02, mappings, 0),
> + DEFINE_PROP_UINT8("big-endian", PFlashCFI02, be, 0),
> + DEFINE_PROP_UINT16("id0", PFlashCFI02, ident0, 0),
> + DEFINE_PROP_UINT16("id1", PFlashCFI02, ident1, 0),
> + DEFINE_PROP_UINT16("id2", PFlashCFI02, ident2, 0),
> + DEFINE_PROP_UINT16("id3", PFlashCFI02, ident3, 0),
> + DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0),
> + DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0),
> + DEFINE_PROP_STRING("name", PFlashCFI02, name),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> @@ -707,7 +708,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
> static const TypeInfo pflash_cfi02_info = {
> .name = TYPE_CFI_PFLASH02,
> .parent = TYPE_SYS_BUS_DEVICE,
> - .instance_size = sizeof(struct pflash_t),
> + .instance_size = sizeof(PFlashCFI02),
> .class_init = pflash_cfi02_class_init,
> };
>
> @@ -718,15 +719,17 @@ static void pflash_cfi02_register_types(void)
>
> type_init(pflash_cfi02_register_types)
>
> -pflash_t *pflash_cfi02_register(hwaddr base,
> - DeviceState *qdev, const char *name,
> - hwaddr size,
> - BlockBackend *blk, uint32_t sector_len,
> - int nb_blocs, int nb_mappings, int width,
> - uint16_t id0, uint16_t id1,
> - uint16_t id2, uint16_t id3,
> - uint16_t unlock_addr0, uint16_t unlock_addr1,
> - int be)
> +PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> + DeviceState *qdev, const char *name,
> + hwaddr size,
> + BlockBackend *blk,
> + uint32_t sector_len, int nb_blocs,
> + int nb_mappings, int width,
> + uint16_t id0, uint16_t id1,
> + uint16_t id2, uint16_t id3,
> + uint16_t unlock_addr0,
> + uint16_t unlock_addr1,
> + int be)
> {
> DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH02);
>
> diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
> index 091e22dd60..67e55342f6 100644
> --- a/hw/i386/pc_sysfw.c
> +++ b/hw/i386/pc_sysfw.c
> @@ -111,7 +111,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
> char *fatal_errmsg = NULL;
> hwaddr phys_addr = 0x100000000ULL;
> int sector_bits, sector_size;
> - pflash_t *system_flash;
> + PFlashCFI01 *system_flash;
> MemoryRegion *flash_mem;
> char name[64];
> void *flash_ptr;
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 7a403ef1ce..172ee033af 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -1189,7 +1189,7 @@ void mips_malta_init(MachineState *machine)
> const char *kernel_cmdline = machine->kernel_cmdline;
> const char *initrd_filename = machine->initrd_filename;
> char *filename;
> - pflash_t *fl;
> + PFlashCFI01 *fl;
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *ram_high = g_new(MemoryRegion, 1);
> MemoryRegion *ram_low_preio = g_new(MemoryRegion, 1);
> diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
> index ab3e52b415..3d59a7a356 100644
> --- a/hw/xtensa/xtfpga.c
> +++ b/hw/xtensa/xtfpga.c
> @@ -162,9 +162,9 @@ static void xtfpga_net_init(MemoryRegion *address_space,
> memory_region_add_subregion(address_space, buffers, ram);
> }
>
> -static pflash_t *xtfpga_flash_init(MemoryRegion *address_space,
> - const XtfpgaBoardDesc *board,
> - DriveInfo *dinfo, int be)
> +static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *address_space,
> + const XtfpgaBoardDesc *board,
> + DriveInfo *dinfo, int be)
> {
> SysBusDevice *s;
> DeviceState *dev = qdev_create(NULL, "cfi.pflash01");
> @@ -181,7 +181,7 @@ static pflash_t *xtfpga_flash_init(MemoryRegion *address_space,
> s = SYS_BUS_DEVICE(dev);
> memory_region_add_subregion(address_space, board->flash->base,
> sysbus_mmio_get_region(s, 0));
> - return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01");
> + return OBJECT_CHECK(PFlashCFI01, (dev), "cfi.pflash01");
> }
>
> static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
> @@ -229,7 +229,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
> XtensaMxPic *mx_pic = NULL;
> qemu_irq *extints;
> DriveInfo *dinfo;
> - pflash_t *flash = NULL;
> + PFlashCFI01 *flash = NULL;
> QemuOpts *machine_opts = qemu_get_machine_opts();
> const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");
> const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
> diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
> index 67c3aa329e..51d8f60c65 100644
> --- a/include/hw/block/flash.h
> +++ b/include/hw/block/flash.h
> @@ -5,32 +5,41 @@
>
> #include "exec/memory.h"
>
> -#define TYPE_CFI_PFLASH01 "cfi.pflash01"
> -#define TYPE_CFI_PFLASH02 "cfi.pflash02"
> -
> -typedef struct pflash_t pflash_t;
> -
> /* pflash_cfi01.c */
> -pflash_t *pflash_cfi01_register(hwaddr base,
> - DeviceState *qdev, const char *name,
> - hwaddr size,
> - BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs, int width,
> - uint16_t id0, uint16_t id1,
> - uint16_t id2, uint16_t id3, int be);
> +
> +#define TYPE_CFI_PFLASH01 "cfi.pflash01"
> +
> +typedef struct PFlashCFI01 PFlashCFI01;
> +
> +PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> + DeviceState *qdev, const char *name,
> + hwaddr size,
> + BlockBackend *blk,
> + uint32_t sector_len, int nb_blocs,
> + int width,
> + uint16_t id0, uint16_t id1,
> + uint16_t id2, uint16_t id3,
> + int be);
> +MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
>
> /* pflash_cfi02.c */
> -pflash_t *pflash_cfi02_register(hwaddr base,
> - DeviceState *qdev, const char *name,
> - hwaddr size,
> - BlockBackend *blk, uint32_t sector_len,
> - int nb_blocs, int nb_mappings, int width,
> - uint16_t id0, uint16_t id1,
> - uint16_t id2, uint16_t id3,
> - uint16_t unlock_addr0, uint16_t unlock_addr1,
> - int be);
>
> -MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl);
> +#define TYPE_CFI_PFLASH02 "cfi.pflash02"
> +
> +typedef struct PFlashCFI02 PFlashCFI02;
> +
> +PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> + DeviceState *qdev, const char *name,
> + hwaddr size,
> + BlockBackend *blk,
> + uint32_t sector_len, int nb_blocs,
> + int nb_mappings,
> + int width,
> + uint16_t id0, uint16_t id1,
> + uint16_t id2, uint16_t id3,
> + uint16_t unlock_addr0,
> + uint16_t unlock_addr1,
> + int be);
>
> /* nand.c */
> DeviceState *nand_init(BlockBackend *blk, int manf_id, int chip_id);
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 10/11] pflash: Clean up after commit 368a354f02b part 1
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 10/11] pflash: Clean up after commit 368a354f02b part 1 Markus Armbruster
@ 2019-03-05 13:29 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-05 13:29 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel
Cc: kwolf, qemu-block, alex.bennee, mreitz, qemu-ppc, lersek
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> QOMification left parameter @qdev unused in pflash_cfi01_register()
> and pflash_cfi02_register(). All callers pass NULL. Remove.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Also FWIW:
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> hw/arm/collie.c | 4 ++--
> hw/arm/digic_boards.c | 2 +-
> hw/arm/gumstix.c | 4 ++--
> hw/arm/mainstone.c | 2 +-
> hw/arm/musicpal.c | 4 ++--
> hw/arm/omap_sx1.c | 4 ++--
> hw/arm/versatilepb.c | 2 +-
> hw/arm/xilinx_zynq.c | 2 +-
> hw/arm/z2.c | 3 +--
> hw/block/pflash_cfi01.c | 2 +-
> hw/block/pflash_cfi02.c | 2 +-
> hw/i386/pc_sysfw.c | 2 +-
> hw/lm32/lm32_boards.c | 4 ++--
> hw/lm32/milkymist.c | 2 +-
> hw/microblaze/petalogix_ml605_mmu.c | 3 +--
> hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
> hw/mips/mips_malta.c | 2 +-
> hw/mips/mips_r4k.c | 2 +-
> hw/ppc/ppc405_boards.c | 6 +++---
> hw/ppc/sam460ex.c | 2 +-
> hw/ppc/virtex_ml507.c | 2 +-
> hw/sh4/r2d.c | 2 +-
> include/hw/block/flash.h | 4 ++--
> 23 files changed, 31 insertions(+), 33 deletions(-)
>
> diff --git a/hw/arm/collie.c b/hw/arm/collie.c
> index 48b732c176..cbc4400f8e 100644
> --- a/hw/arm/collie.c
> +++ b/hw/arm/collie.c
> @@ -36,12 +36,12 @@ static void collie_init(MachineState *machine)
> s = sa1110_init(sysmem, collie_binfo.ram_size, machine->cpu_type);
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> - pflash_cfi01_register(SA_CS0, NULL, "collie.fl1", 0x02000000,
> + pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
>
> dinfo = drive_get(IF_PFLASH, 0, 1);
> - pflash_cfi01_register(SA_CS1, NULL, "collie.fl2", 0x02000000,
> + pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
>
> diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
> index 9f11dcd11f..15a00a1be3 100644
> --- a/hw/arm/digic_boards.c
> +++ b/hw/arm/digic_boards.c
> @@ -129,7 +129,7 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr,
> #define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024)
> #define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024)
>
> - pflash_cfi02_register(addr, NULL, "pflash", FLASH_K8P3215UQB_SIZE,
> + pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE,
> NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
> FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE,
> DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
> diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c
> index 56cb763c4e..304dbeab2f 100644
> --- a/hw/arm/gumstix.c
> +++ b/hw/arm/gumstix.c
> @@ -72,7 +72,7 @@ static void connex_init(MachineState *machine)
> #else
> be = 0;
> #endif
> - if (!pflash_cfi01_register(0x00000000, NULL, "connext.rom", connex_rom,
> + if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> sector_len, connex_rom / sector_len,
> 2, 0, 0, 0, 0, be)) {
> @@ -109,7 +109,7 @@ static void verdex_init(MachineState *machine)
> #else
> be = 0;
> #endif
> - if (!pflash_cfi01_register(0x00000000, NULL, "verdex.rom", verdex_rom,
> + if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> sector_len, verdex_rom / sector_len,
> 2, 0, 0, 0, 0, be)) {
> diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
> index 0beb5c426b..2a1c1072db 100644
> --- a/hw/arm/mainstone.c
> +++ b/hw/arm/mainstone.c
> @@ -148,7 +148,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
> exit(1);
> }
>
> - if (!pflash_cfi01_register(mainstone_flash_base[i], NULL,
> + if (!pflash_cfi01_register(mainstone_flash_base[i],
> i ? "mainstone.flash1" : "mainstone.flash0",
> MAINSTONE_FLASH,
> blk_by_legacy_dinfo(dinfo),
> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
> index d22532a11c..cc780dfb37 100644
> --- a/hw/arm/musicpal.c
> +++ b/hw/arm/musicpal.c
> @@ -1636,14 +1636,14 @@ static void musicpal_init(MachineState *machine)
> * image is smaller than 32 MB.
> */
> #ifdef TARGET_WORDS_BIGENDIAN
> - pflash_cfi02_register(0x100000000ULL-MP_FLASH_SIZE_MAX, NULL,
> + pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
> "musicpal.flash", flash_size,
> blk, 0x10000, (flash_size + 0xffff) >> 16,
> MP_FLASH_SIZE_MAX / flash_size,
> 2, 0x00BF, 0x236D, 0x0000, 0x0000,
> 0x5555, 0x2AAA, 1);
> #else
> - pflash_cfi02_register(0x100000000ULL-MP_FLASH_SIZE_MAX, NULL,
> + pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
> "musicpal.flash", flash_size,
> blk, 0x10000, (flash_size + 0xffff) >> 16,
> MP_FLASH_SIZE_MAX / flash_size,
> diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
> index 84550f0236..b1128777cf 100644
> --- a/hw/arm/omap_sx1.c
> +++ b/hw/arm/omap_sx1.c
> @@ -152,7 +152,7 @@ static void sx1_init(MachineState *machine, const int version)
> #endif
>
> if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
> - if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL,
> + if (!pflash_cfi01_register(OMAP_CS0_BASE,
> "omap_sx1.flash0-1", flash_size,
> blk_by_legacy_dinfo(dinfo),
> sector_size, flash_size / sector_size,
> @@ -176,7 +176,7 @@ static void sx1_init(MachineState *machine, const int version)
> memory_region_add_subregion(address_space,
> OMAP_CS1_BASE + flash1_size, &cs[1]);
>
> - if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL,
> + if (!pflash_cfi01_register(OMAP_CS1_BASE,
> "omap_sx1.flash1-1", flash1_size,
> blk_by_legacy_dinfo(dinfo),
> sector_size, flash1_size / sector_size,
> diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
> index 22b09a1e61..82c5277462 100644
> --- a/hw/arm/versatilepb.c
> +++ b/hw/arm/versatilepb.c
> @@ -365,7 +365,7 @@ static void versatile_init(MachineState *machine, int board_id)
> /* 0x34000000 NOR Flash */
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> - if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, NULL, "versatile.flash",
> + if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, "versatile.flash",
> VERSATILE_FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> VERSATILE_FLASH_SECT_SIZE,
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index 57497b0c4d..1fa4a77728 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -205,7 +205,7 @@ static void zynq_init(MachineState *machine)
> DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
>
> /* AMD */
> - pflash_cfi02_register(0xe2000000, NULL, "zynq.pflash", FLASH_SIZE,
> + pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> FLASH_SECTOR_SIZE,
> FLASH_SIZE/FLASH_SECTOR_SIZE, 1,
> diff --git a/hw/arm/z2.c b/hw/arm/z2.c
> index 697a822f1e..54e6caee9f 100644
> --- a/hw/arm/z2.c
> +++ b/hw/arm/z2.c
> @@ -324,8 +324,7 @@ static void z2_init(MachineState *machine)
> exit(1);
> }
>
> - if (!pflash_cfi01_register(Z2_FLASH_BASE,
> - NULL, "z2.flash0", Z2_FLASH_SIZE,
> + if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> sector_len, Z2_FLASH_SIZE / sector_len,
> 4, 0, 0, 0, 0, be)) {
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index 1c99aa6e4a..bd42487c0a 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -937,7 +937,7 @@ static void pflash_cfi01_register_types(void)
> type_init(pflash_cfi01_register_types)
>
> PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> - DeviceState *qdev, const char *name,
> + const char *name,
> hwaddr size,
> BlockBackend *blk,
> uint32_t sector_len, int nb_blocs,
> diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
> index 5ef40154b9..c261ebff72 100644
> --- a/hw/block/pflash_cfi02.c
> +++ b/hw/block/pflash_cfi02.c
> @@ -717,7 +717,7 @@ static void pflash_cfi02_register_types(void)
> type_init(pflash_cfi02_register_types)
>
> PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> - DeviceState *qdev, const char *name,
> + const char *name,
> hwaddr size,
> BlockBackend *blk,
> uint32_t sector_len, int nb_blocs,
> diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
> index 67e55342f6..9a5be54a85 100644
> --- a/hw/i386/pc_sysfw.c
> +++ b/hw/i386/pc_sysfw.c
> @@ -160,7 +160,7 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
>
> /* pflash_cfi01_register() creates a deep copy of the name */
> snprintf(name, sizeof name, "system.flash%d", unit);
> - system_flash = pflash_cfi01_register(phys_addr, NULL /* qdev */, name,
> + system_flash = pflash_cfi01_register(phys_addr, name,
> size, blk, sector_size,
> size >> sector_bits,
> 1 /* width */,
> diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
> index 05157f8eab..f726355309 100644
> --- a/hw/lm32/lm32_boards.c
> +++ b/hw/lm32/lm32_boards.c
> @@ -114,7 +114,7 @@ static void lm32_evr_init(MachineState *machine)
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> /* Spansion S29NS128P */
> - pflash_cfi02_register(flash_base, NULL, "lm32_evr.flash", flash_size,
> + pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> flash_sector_size, flash_size / flash_sector_size,
> 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
> @@ -207,7 +207,7 @@ static void lm32_uclinux_init(MachineState *machine)
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> /* Spansion S29NS128P */
> - pflash_cfi02_register(flash_base, NULL, "lm32_uclinux.flash", flash_size,
> + pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> flash_sector_size, flash_size / flash_sector_size,
> 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
> diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
> index b080cf1ca9..ece7e3b699 100644
> --- a/hw/lm32/milkymist.c
> +++ b/hw/lm32/milkymist.c
> @@ -121,7 +121,7 @@ milkymist_init(MachineState *machine)
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> /* Numonyx JS28F256J3F105 */
> - pflash_cfi01_register(flash_base, NULL, "milkymist.flash", flash_size,
> + pflash_cfi01_register(flash_base, "milkymist.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> flash_sector_size, flash_size / flash_sector_size,
> 2, 0x00, 0x89, 0x00, 0x1d, 1);
> diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
> index c730878d25..74bcc14cda 100644
> --- a/hw/microblaze/petalogix_ml605_mmu.c
> +++ b/hw/microblaze/petalogix_ml605_mmu.c
> @@ -107,8 +107,7 @@ petalogix_ml605_init(MachineState *machine)
> dinfo = drive_get(IF_PFLASH, 0, 0);
> /* 5th parameter 2 means bank-width
> * 10th paremeter 0 means little-endian */
> - pflash_cfi01_register(FLASH_BASEADDR,
> - NULL, "petalogix_ml605.flash", FLASH_SIZE,
> + pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 64 * KiB, FLASH_SIZE >> 16,
> 2, 0x89, 0x18, 0x0000, 0x0, 0);
> diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
> index b9f0b0d06e..a07b7f8edf 100644
> --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
> +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
> @@ -88,7 +88,7 @@ petalogix_s3adsp1800_init(MachineState *machine)
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> pflash_cfi01_register(FLASH_BASEADDR,
> - NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
> + "petalogix_s3adsp1800.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 64 * KiB, FLASH_SIZE >> 16,
> 1, 0x89, 0x18, 0x0000, 0x0, 1);
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index c2a5c65a24..fdf1434b28 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -1273,7 +1273,7 @@ void mips_malta_init(MachineState *machine)
> blk_name(dinfo->bdrv), fl_sectors);
> }
> #endif
> - fl = pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios",
> + fl = pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios",
> FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 65536, fl_sectors,
> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
> index a015a6d14e..0b9df466e7 100644
> --- a/hw/mips/mips_r4k.c
> +++ b/hw/mips/mips_r4k.c
> @@ -235,7 +235,7 @@ void mips_r4k_init(MachineState *machine)
> load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
> } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
> uint32_t mips_rom = 0x00400000;
> - if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
> + if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
> blk_by_legacy_dinfo(dinfo),
> sector_len, mips_rom / sector_len,
> 4, 0, 0, 0, 0, be)) {
> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
> index 672717ef1b..dfaea45898 100644
> --- a/hw/ppc/ppc405_boards.c
> +++ b/hw/ppc/ppc405_boards.c
> @@ -193,7 +193,7 @@ static void ref405ep_init(MachineState *machine)
> #endif
> bios_size = 8 * MiB;
> pflash_cfi02_register((uint32_t)(-bios_size),
> - NULL, "ef405ep.bios", bios_size,
> + "ef405ep.bios", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 64 * KiB, bios_size / (64 * KiB), 1,
> 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> @@ -484,7 +484,7 @@ static void taihu_405ep_init(MachineState *machine)
> #endif
> bios_size = 2 * MiB;
> pflash_cfi02_register(0xFFE00000,
> - NULL, "taihu_405ep.bios", bios_size,
> + "taihu_405ep.bios", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 64 * KiB, bios_size / (64 * KiB), 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> @@ -526,7 +526,7 @@ static void taihu_405ep_init(MachineState *machine)
> #ifdef DEBUG_BOARD_INIT
> printf("Register application flash\n"
> #endif
> - pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size,
> + pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 64 * KiB, bios_size / (64 * KiB), 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
> index 0c919529f8..ad36cb12c8 100644
> --- a/hw/ppc/sam460ex.c
> +++ b/hw/ppc/sam460ex.c
> @@ -113,7 +113,7 @@ static int sam460ex_load_uboot(void)
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
> - NULL, "sam460ex.flash", FLASH_SIZE,
> + "sam460ex.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 64 * KiB, FLASH_SIZE / (64 * KiB),
> 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
> diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
> index 5a711cb3d9..d2085a839c 100644
> --- a/hw/ppc/virtex_ml507.c
> +++ b/hw/ppc/virtex_ml507.c
> @@ -227,7 +227,7 @@ static void virtex_init(MachineState *machine)
> memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> - pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE,
> + pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 64 * KiB, FLASH_SIZE >> 16,
> 1, 0x89, 0x18, 0x0000, 0x0, 1);
> diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
> index ed18d1f351..abd3b67c28 100644
> --- a/hw/sh4/r2d.c
> +++ b/hw/sh4/r2d.c
> @@ -297,7 +297,7 @@ static void r2d_init(MachineState *machine)
> * FLASH_SIZE / 4 bytes anyway. The current code does so too, but
> * whether it's the right size is anybody's guess.
> */
> - pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE / 4,
> + pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE / 4,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 16 * KiB, FLASH_SIZE >> 16,
> 1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
> diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
> index aeea3ca99d..3e48901c84 100644
> --- a/include/hw/block/flash.h
> +++ b/include/hw/block/flash.h
> @@ -14,7 +14,7 @@
> typedef struct PFlashCFI01 PFlashCFI01;
>
> PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> - DeviceState *qdev, const char *name,
> + const char *name,
> hwaddr size,
> BlockBackend *blk,
> uint32_t sector_len, int nb_blocs,
> @@ -33,7 +33,7 @@ MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl);
> typedef struct PFlashCFI02 PFlashCFI02;
>
> PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> - DeviceState *qdev, const char *name,
> + const char *name,
> hwaddr size,
> BlockBackend *blk,
> uint32_t sector_len, int nb_blocs,
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2 Markus Armbruster
2019-02-27 1:11 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
@ 2019-03-05 13:55 ` Philippe Mathieu-Daudé
2019-03-05 16:42 ` Markus Armbruster
1 sibling, 1 reply; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-05 13:55 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel, alex.bennee, lersek
Cc: kwolf, qemu-block, mreitz, qemu-ppc
Hi Markus,
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> QOMification left parameter @size unused in pflash_cfi01_register()
> and pflash_cfi02_register(). Obviously, @size should match
> @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
> callers satisfy this.
>
> Remove @nb_blocs and compute it from @size and @sector_len.
The pflash devices are simplistically modelled has having a single
sector size. This is not true for real hw (pflash have different sector
sizes). It is however true for the unofficial VirtPFlash device, which
doesn't have any spec.
The only valid parameter is @size. The @sector_len and @nb_blocs don't
match the hardwares. QEMU @sector_len is currently "The biggest
sector_size the device has" and QEMU @nb_blocs is really "@size /
@sector_len", although it doesn't match the nb_blocs the hardware has.
I don't disagree with the patch content, but the description is not
accurate. We can indeed drop the @nb_blocs argument because we model an
unique sector size, thus we can calculate "@nb_blocs = @size /
@sector_len" in the model.
With the patch description fixed:
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Thanks,
Phil.
>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> hw/arm/collie.c | 5 +++--
> hw/arm/digic_boards.c | 1 -
> hw/arm/gumstix.c | 4 ++--
> hw/arm/mainstone.c | 2 +-
> hw/arm/musicpal.c | 4 ++--
> hw/arm/omap_sx1.c | 4 ++--
> hw/arm/versatilepb.c | 1 -
> hw/arm/xilinx_zynq.c | 3 +--
> hw/arm/z2.c | 2 +-
> hw/block/pflash_cfi01.c | 5 +++--
> hw/block/pflash_cfi02.c | 5 +++--
> hw/i386/pc_sysfw.c | 6 +-----
> hw/lm32/lm32_boards.c | 4 ++--
> hw/lm32/milkymist.c | 2 +-
> hw/microblaze/petalogix_ml605_mmu.c | 2 +-
> hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
> hw/mips/mips_malta.c | 7 +++----
> hw/mips/mips_r4k.c | 2 +-
> hw/ppc/ppc405_boards.c | 6 +++---
> hw/ppc/sam460ex.c | 2 +-
> hw/ppc/virtex_ml507.c | 2 +-
> hw/sh4/r2d.c | 2 +-
> include/hw/block/flash.h | 4 ++--
> 23 files changed, 36 insertions(+), 41 deletions(-)
>
> diff --git a/hw/arm/collie.c b/hw/arm/collie.c
> index cbc4400f8e..7c9c0615f0 100644
> --- a/hw/arm/collie.c
> +++ b/hw/arm/collie.c
> @@ -9,6 +9,7 @@
> * GNU GPL, version 2 or (at your option) any later version.
> */
> #include "qemu/osdep.h"
> +#include "qemu/units.h"
> #include "hw/hw.h"
> #include "hw/sysbus.h"
> #include "hw/boards.h"
> @@ -38,12 +39,12 @@ static void collie_init(MachineState *machine)
> dinfo = drive_get(IF_PFLASH, 0, 0);
> pflash_cfi01_register(SA_CS0, "collie.fl1", 0x02000000,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
> + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
>
> dinfo = drive_get(IF_PFLASH, 0, 1);
> pflash_cfi01_register(SA_CS1, "collie.fl2", 0x02000000,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0);
> + 64 * KiB, 4, 0x00, 0x00, 0x00, 0x00, 0);
>
> sysbus_create_simple("scoop", 0x40800000, NULL);
>
> diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
> index 15a00a1be3..304e4d1a29 100644
> --- a/hw/arm/digic_boards.c
> +++ b/hw/arm/digic_boards.c
> @@ -131,7 +131,6 @@ static void digic4_add_k8p3215uqb_rom(DigicBoardState *s, hwaddr addr,
>
> pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE,
> NULL, FLASH_K8P3215UQB_SECTOR_SIZE,
> - FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE,
> DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE,
> 4,
> 0x00EC, 0x007E, 0x0003, 0x0001,
> diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c
> index 304dbeab2f..2e526218f4 100644
> --- a/hw/arm/gumstix.c
> +++ b/hw/arm/gumstix.c
> @@ -74,7 +74,7 @@ static void connex_init(MachineState *machine)
> #endif
> if (!pflash_cfi01_register(0x00000000, "connext.rom", connex_rom,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - sector_len, connex_rom / sector_len,
> + sector_len,
> 2, 0, 0, 0, 0, be)) {
> error_report("Error registering flash memory");
> exit(1);
> @@ -111,7 +111,7 @@ static void verdex_init(MachineState *machine)
> #endif
> if (!pflash_cfi01_register(0x00000000, "verdex.rom", verdex_rom,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - sector_len, verdex_rom / sector_len,
> + sector_len,
> 2, 0, 0, 0, 0, be)) {
> error_report("Error registering flash memory");
> exit(1);
> diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
> index 2a1c1072db..6e15ba9663 100644
> --- a/hw/arm/mainstone.c
> +++ b/hw/arm/mainstone.c
> @@ -152,7 +152,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
> i ? "mainstone.flash1" : "mainstone.flash0",
> MAINSTONE_FLASH,
> blk_by_legacy_dinfo(dinfo),
> - sector_len, MAINSTONE_FLASH / sector_len,
> + sector_len,
> 4, 0, 0, 0, 0, be)) {
> error_report("Error registering flash memory");
> exit(1);
> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
> index cc780dfb37..0f4f02df8e 100644
> --- a/hw/arm/musicpal.c
> +++ b/hw/arm/musicpal.c
> @@ -1638,14 +1638,14 @@ static void musicpal_init(MachineState *machine)
> #ifdef TARGET_WORDS_BIGENDIAN
> pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
> "musicpal.flash", flash_size,
> - blk, 0x10000, (flash_size + 0xffff) >> 16,
> + blk, 0x10000,
> MP_FLASH_SIZE_MAX / flash_size,
> 2, 0x00BF, 0x236D, 0x0000, 0x0000,
> 0x5555, 0x2AAA, 1);
> #else
> pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX,
> "musicpal.flash", flash_size,
> - blk, 0x10000, (flash_size + 0xffff) >> 16,
> + blk, 0x10000,
> MP_FLASH_SIZE_MAX / flash_size,
> 2, 0x00BF, 0x236D, 0x0000, 0x0000,
> 0x5555, 0x2AAA, 0);
> diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c
> index b1128777cf..b269a5e1c2 100644
> --- a/hw/arm/omap_sx1.c
> +++ b/hw/arm/omap_sx1.c
> @@ -155,7 +155,7 @@ static void sx1_init(MachineState *machine, const int version)
> if (!pflash_cfi01_register(OMAP_CS0_BASE,
> "omap_sx1.flash0-1", flash_size,
> blk_by_legacy_dinfo(dinfo),
> - sector_size, flash_size / sector_size,
> + sector_size,
> 4, 0, 0, 0, 0, be)) {
> fprintf(stderr, "qemu: Error registering flash memory %d.\n",
> fl_idx);
> @@ -179,7 +179,7 @@ static void sx1_init(MachineState *machine, const int version)
> if (!pflash_cfi01_register(OMAP_CS1_BASE,
> "omap_sx1.flash1-1", flash1_size,
> blk_by_legacy_dinfo(dinfo),
> - sector_size, flash1_size / sector_size,
> + sector_size,
> 4, 0, 0, 0, 0, be)) {
> fprintf(stderr, "qemu: Error registering flash memory %d.\n",
> fl_idx);
> diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
> index 82c5277462..d67181810a 100644
> --- a/hw/arm/versatilepb.c
> +++ b/hw/arm/versatilepb.c
> @@ -369,7 +369,6 @@ static void versatile_init(MachineState *machine, int board_id)
> VERSATILE_FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> VERSATILE_FLASH_SECT_SIZE,
> - VERSATILE_FLASH_SIZE / VERSATILE_FLASH_SECT_SIZE,
> 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) {
> fprintf(stderr, "qemu: Error registering flash memory.\n");
> }
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index 1fa4a77728..f36cfcfd4a 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -207,8 +207,7 @@ static void zynq_init(MachineState *machine)
> /* AMD */
> pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - FLASH_SECTOR_SIZE,
> - FLASH_SIZE/FLASH_SECTOR_SIZE, 1,
> + FLASH_SECTOR_SIZE, 1,
> 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
> 0);
>
> diff --git a/hw/arm/z2.c b/hw/arm/z2.c
> index 54e6caee9f..fb073ec2f5 100644
> --- a/hw/arm/z2.c
> +++ b/hw/arm/z2.c
> @@ -326,7 +326,7 @@ static void z2_init(MachineState *machine)
>
> if (!pflash_cfi01_register(Z2_FLASH_BASE, "z2.flash0", Z2_FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - sector_len, Z2_FLASH_SIZE / sector_len,
> + sector_len,
> 4, 0, 0, 0, 0, be)) {
> error_report("Error registering flash memory");
> exit(1);
> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
> index bd42487c0a..9d1c356eb6 100644
> --- a/hw/block/pflash_cfi01.c
> +++ b/hw/block/pflash_cfi01.c
> @@ -940,7 +940,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> const char *name,
> hwaddr size,
> BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> + uint32_t sector_len,
> int bank_width,
> uint16_t id0, uint16_t id1,
> uint16_t id2, uint16_t id3,
> @@ -951,7 +951,8 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> if (blk) {
> qdev_prop_set_drive(dev, "drive", blk, &error_abort);
> }
> - qdev_prop_set_uint32(dev, "num-blocks", nb_blocs);
> + assert(size % sector_len == 0);
> + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len);
> qdev_prop_set_uint64(dev, "sector-length", sector_len);
> qdev_prop_set_uint8(dev, "width", bank_width);
> qdev_prop_set_bit(dev, "big-endian", !!be);
> diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
> index c261ebff72..33779ce807 100644
> --- a/hw/block/pflash_cfi02.c
> +++ b/hw/block/pflash_cfi02.c
> @@ -720,7 +720,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> const char *name,
> hwaddr size,
> BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> + uint32_t sector_len,
> int nb_mappings, int width,
> uint16_t id0, uint16_t id1,
> uint16_t id2, uint16_t id3,
> @@ -733,7 +733,8 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> if (blk) {
> qdev_prop_set_drive(dev, "drive", blk, &error_abort);
> }
> - qdev_prop_set_uint32(dev, "num-blocks", nb_blocs);
> + assert(size % sector_len == 0);
> + qdev_prop_set_uint32(dev, "num-blocks", size / sector_len);
> qdev_prop_set_uint32(dev, "sector-length", sector_len);
> qdev_prop_set_uint8(dev, "width", width);
> qdev_prop_set_uint8(dev, "mappings", nb_mappings);
> diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
> index 9a5be54a85..34727c5b1f 100644
> --- a/hw/i386/pc_sysfw.c
> +++ b/hw/i386/pc_sysfw.c
> @@ -110,16 +110,13 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
> int64_t size;
> char *fatal_errmsg = NULL;
> hwaddr phys_addr = 0x100000000ULL;
> - int sector_bits, sector_size;
> + uint32_t sector_size = 4096;
> PFlashCFI01 *system_flash;
> MemoryRegion *flash_mem;
> char name[64];
> void *flash_ptr;
> int ret, flash_size;
>
> - sector_bits = 12;
> - sector_size = 1 << sector_bits;
> -
> for (unit = 0;
> (unit < FLASH_MAP_UNIT_MAX &&
> (pflash_drv = drive_get(IF_PFLASH, 0, unit)) != NULL);
> @@ -162,7 +159,6 @@ static void pc_system_flash_init(MemoryRegion *rom_memory)
> snprintf(name, sizeof name, "system.flash%d", unit);
> system_flash = pflash_cfi01_register(phys_addr, name,
> size, blk, sector_size,
> - size >> sector_bits,
> 1 /* width */,
> 0x0000 /* id0 */,
> 0x0000 /* id1 */,
> diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
> index f726355309..09f411ed07 100644
> --- a/hw/lm32/lm32_boards.c
> +++ b/hw/lm32/lm32_boards.c
> @@ -116,7 +116,7 @@ static void lm32_evr_init(MachineState *machine)
> /* Spansion S29NS128P */
> pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - flash_sector_size, flash_size / flash_sector_size,
> + flash_sector_size,
> 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
>
> /* create irq lines */
> @@ -209,7 +209,7 @@ static void lm32_uclinux_init(MachineState *machine)
> /* Spansion S29NS128P */
> pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - flash_sector_size, flash_size / flash_sector_size,
> + flash_sector_size,
> 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
>
> /* create irq lines */
> diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
> index ece7e3b699..46b0f51fdf 100644
> --- a/hw/lm32/milkymist.c
> +++ b/hw/lm32/milkymist.c
> @@ -123,7 +123,7 @@ milkymist_init(MachineState *machine)
> /* Numonyx JS28F256J3F105 */
> pflash_cfi01_register(flash_base, "milkymist.flash", flash_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - flash_sector_size, flash_size / flash_sector_size,
> + flash_sector_size,
> 2, 0x00, 0x89, 0x00, 0x1d, 1);
>
> /* create irq lines */
> diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
> index 74bcc14cda..46904d2012 100644
> --- a/hw/microblaze/petalogix_ml605_mmu.c
> +++ b/hw/microblaze/petalogix_ml605_mmu.c
> @@ -109,7 +109,7 @@ petalogix_ml605_init(MachineState *machine)
> * 10th paremeter 0 means little-endian */
> pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, FLASH_SIZE >> 16,
> + 64 * KiB,
> 2, 0x89, 0x18, 0x0000, 0x0, 0);
>
>
> diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
> index a07b7f8edf..027c31fdcc 100644
> --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
> +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
> @@ -90,7 +90,7 @@ petalogix_s3adsp1800_init(MachineState *machine)
> pflash_cfi01_register(FLASH_BASEADDR,
> "petalogix_s3adsp1800.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, FLASH_SIZE >> 16,
> + 64 * KiB,
> 1, 0x89, 0x18, 0x0000, 0x0, 1);
>
> dev = qdev_create(NULL, "xlnx.xps-intc");
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index fdf1434b28..647d4a2dac 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -1208,7 +1208,6 @@ void mips_malta_init(MachineState *machine)
> DriveInfo *dinfo;
> DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
> int fl_idx = 0;
> - int fl_sectors = bios_size >> 16;
> int be;
>
> DeviceState *dev = qdev_create(NULL, TYPE_MIPS_MALTA);
> @@ -1268,15 +1267,15 @@ void mips_malta_init(MachineState *machine)
> #ifdef DEBUG_BOARD_INIT
> if (dinfo) {
> printf("Register parallel flash %d size " TARGET_FMT_lx " at "
> - "addr %08llx '%s' %x\n",
> + "addr %08llx '%s'\n",
> fl_idx, FLASH_SIZE, FLASH_ADDRESS,
> - blk_name(dinfo->bdrv), fl_sectors);
> + blk_name(dinfo->bdrv));
> }
> #endif
> fl = pflash_cfi01_register(FLASH_ADDRESS, "mips_malta.bios",
> FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 65536, fl_sectors,
> + 65536,
> 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
> bios = pflash_cfi01_get_memory(fl);
> fl_idx++;
> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
> index 0b9df466e7..acfd59c17a 100644
> --- a/hw/mips/mips_r4k.c
> +++ b/hw/mips/mips_r4k.c
> @@ -237,7 +237,7 @@ void mips_r4k_init(MachineState *machine)
> uint32_t mips_rom = 0x00400000;
> if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
> blk_by_legacy_dinfo(dinfo),
> - sector_len, mips_rom / sector_len,
> + sector_len,
> 4, 0, 0, 0, 0, be)) {
> fprintf(stderr, "qemu: Error registering flash memory.\n");
> }
> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
> index dfaea45898..1dd5c8b797 100644
> --- a/hw/ppc/ppc405_boards.c
> +++ b/hw/ppc/ppc405_boards.c
> @@ -195,7 +195,7 @@ static void ref405ep_init(MachineState *machine)
> pflash_cfi02_register((uint32_t)(-bios_size),
> "ef405ep.bios", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, bios_size / (64 * KiB), 1,
> + 64 * KiB, 1,
> 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> } else
> @@ -486,7 +486,7 @@ static void taihu_405ep_init(MachineState *machine)
> pflash_cfi02_register(0xFFE00000,
> "taihu_405ep.bios", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, bios_size / (64 * KiB), 1,
> + 64 * KiB, 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> fl_idx++;
> @@ -528,7 +528,7 @@ static void taihu_405ep_init(MachineState *machine)
> #endif
> pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, bios_size / (64 * KiB), 1,
> + 64 * KiB, 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> fl_idx++;
> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
> index ad36cb12c8..1de0a1b47c 100644
> --- a/hw/ppc/sam460ex.c
> +++ b/hw/ppc/sam460ex.c
> @@ -115,7 +115,7 @@ static int sam460ex_load_uboot(void)
> if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
> "sam460ex.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, FLASH_SIZE / (64 * KiB),
> + 64 * KiB,
> 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
> error_report("Error registering flash memory");
> /* XXX: return an error instead? */
> diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
> index d2085a839c..4f86c22968 100644
> --- a/hw/ppc/virtex_ml507.c
> +++ b/hw/ppc/virtex_ml507.c
> @@ -229,7 +229,7 @@ static void virtex_init(MachineState *machine)
> dinfo = drive_get(IF_PFLASH, 0, 0);
> pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 64 * KiB, FLASH_SIZE >> 16,
> + 64 * KiB,
> 1, 0x89, 0x18, 0x0000, 0x0, 1);
>
> cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
> diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
> index abd3b67c28..5e6953537c 100644
> --- a/hw/sh4/r2d.c
> +++ b/hw/sh4/r2d.c
> @@ -299,7 +299,7 @@ static void r2d_init(MachineState *machine)
> */
> pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE / 4,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 16 * KiB, FLASH_SIZE >> 16,
> + 16 * KiB,
> 1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
> 0x555, 0x2aa, 0);
>
> diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
> index 3e48901c84..914932eaec 100644
> --- a/include/hw/block/flash.h
> +++ b/include/hw/block/flash.h
> @@ -17,7 +17,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base,
> const char *name,
> hwaddr size,
> BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> + uint32_t sector_len,
> int width,
> uint16_t id0, uint16_t id1,
> uint16_t id2, uint16_t id3,
> @@ -36,7 +36,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
> const char *name,
> hwaddr size,
> BlockBackend *blk,
> - uint32_t sector_len, int nb_blocs,
> + uint32_t sector_len,
> int nb_mappings,
> int width,
> uint16_t id0, uint16_t id1,
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 09/11] mips_malta: Clean up definition of flash memory size somewhat
2019-02-27 11:28 ` Alex Bennée
@ 2019-03-05 16:33 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-05 16:33 UTC (permalink / raw)
To: Alex Bennée, Markus Armbruster
Cc: kwolf, qemu-block, Aleksandar Rikalo, qemu-devel, mreitz,
qemu-ppc, lersek, Aurelien Jarno
On 2/27/19 12:28 PM, Alex Bennée wrote:
> Markus Armbruster <armbru@redhat.com> writes:
>
>> pflash_cfi01_register() takes a size in bytes, a block size in bytes
>> and a number of blocks. mips_malta_init() passes BIOS_SIZE, 65536,
>> FLASH_SIZE >> 16. Actually consistent only because BIOS_SIZE (defined
>> in include/hw/mips/bios.h as (4 * MiB)) matches FLASH_SIZE (defined
>> locally as 0x400000). Confusing all the same.
>>
>> Pass FLASH_SIZE instead of BIOS_SIZE.
>>
>> There are more uses of BIOS_SIZE, but I don't sufficiently understand
>> them to attempt cleanup.
>>
>> Cc: Aurelien Jarno <aurelien@aurel32.net>
>> Cc: Aleksandar Rikalo <arikalo@wavecomp.com>
>> Signed-off-by: Markus Armbruster <armbru@redhat.com>
>> ---
>> hw/mips/mips_malta.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
>> index 172ee033af..c2a5c65a24 100644
>> --- a/hw/mips/mips_malta.c
>> +++ b/hw/mips/mips_malta.c
>> @@ -1269,12 +1269,12 @@ void mips_malta_init(MachineState *machine)
>> if (dinfo) {
>> printf("Register parallel flash %d size " TARGET_FMT_lx " at "
>> "addr %08llx '%s' %x\n",
>> - fl_idx, bios_size, FLASH_ADDRESS,
>> + fl_idx, FLASH_SIZE, FLASH_ADDRESS,
>
> bios_size == FLASH_SIZE at this point, but is then overwritten later in
> the function *if* the flash is loaded (and not already set via a dinfo).
> I'd say you could move bios_size down to were it's used but then you
> confused the byte swapping machinery which expects something to be set.
>
> All that said these changes so far are not wrong:
>
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
I reworked Markus patch and sent as a new series:
https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg01149.html
but forgot to Cc you, and forgot your R-b :/
>
>
>> blk_name(dinfo->bdrv), fl_sectors);
>> }
>> #endif
>> fl = pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios",
>> - BIOS_SIZE,
>> + FLASH_SIZE,
>> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
>> 65536, fl_sectors,
>> 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
>
>
> --
> Alex Bennée
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2
2019-03-05 13:55 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-03-05 16:42 ` Markus Armbruster
2019-03-05 17:54 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 43+ messages in thread
From: Markus Armbruster @ 2019-03-05 16:42 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, alex.bennee, lersek, kwolf, qemu-ppc, qemu-block, mreitz
Philippe Mathieu-Daudé <philmd@redhat.com> writes:
> Hi Markus,
>
> On 2/26/19 8:34 PM, Markus Armbruster wrote:
>> QOMification left parameter @size unused in pflash_cfi01_register()
>> and pflash_cfi02_register(). Obviously, @size should match
>> @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
>> callers satisfy this.
>>
>> Remove @nb_blocs and compute it from @size and @sector_len.
>
> The pflash devices are simplistically modelled has having a single
> sector size. This is not true for real hw (pflash have different sector
> sizes). It is however true for the unofficial VirtPFlash device, which
> doesn't have any spec.
>
> The only valid parameter is @size. The @sector_len and @nb_blocs don't
> match the hardwares. QEMU @sector_len is currently "The biggest
> sector_size the device has" and QEMU @nb_blocs is really "@size /
> @sector_len", although it doesn't match the nb_blocs the hardware has.
>
> I don't disagree with the patch content, but the description is not
> accurate. We can indeed drop the @nb_blocs argument because we model an
> unique sector size, thus we can calculate "@nb_blocs = @size /
> @sector_len" in the model.
>
> With the patch description fixed:
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Let me try to fix it.
Our pflash devices are simplistically modelled has having
"num-blocks" sectors of equal size "sector-length". Real hardware
commonly has sectors of different sizes. How our "sector-length"
property is related to the physical device's multiple sector sizes
is unclear.
Helper functions pflash_cfi01_register() and pflash_cfi02_register()
create a pflash device, set properties including "sector-length" and
"num-blocks", and realize. They take parameters @size, @sector_len
and @nb_blocs.
QOMification left parameter @size unused. Obviously, @size should
match @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs.
All callers satisfy this.
Remove @nb_blocs and compute it from @size and @sector_len.
D'accord?
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 08/11] r2d: Flash memory creation is confused about size, mark FIXME
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 08/11] r2d: Flash memory creation is confused about size, mark FIXME Markus Armbruster
@ 2019-03-05 17:48 ` Philippe Mathieu-Daudé
2019-03-06 15:00 ` Markus Armbruster
0 siblings, 1 reply; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-05 17:48 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel
Cc: kwolf, qemu-block, alex.bennee, Magnus Damm, mreitz, qemu-ppc, lersek
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> pflash_cfi02_register() takes a size in bytes, a block size in bytes
> and a number of blocks. r2d_init() passes FLASH_SIZE, 16 * KiB,
> FLASH_SIZE >> 16. Does not compute: size doesn't match block size *
> number of blocks. The latter happens to win. I tried to find
> documentation on the physical hardware, no luck.
>
> For now, adjust the byte size passed to match the actual size created,
> and add a FIXME comment.
>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> ---
> hw/sh4/r2d.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
> index dcdb3728cb..ed18d1f351 100644
> --- a/hw/sh4/r2d.c
> +++ b/hw/sh4/r2d.c
> @@ -290,7 +290,14 @@ static void r2d_init(MachineState *machine)
>
> /* onboard flash memory */
> dinfo = drive_get(IF_PFLASH, 0, 0);
> - pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
> + /*
> + * FIXME The code is confused about the size of the flash. It
> + * used to pass FLASH_SIZE bytes, in FLASH_SIZE >> 16 blocks of
> + * 16KiB each, which does not compute, but creates one of
> + * FLASH_SIZE / 4 bytes anyway. The current code does so too, but
> + * whether it's the right size is anybody's guess.
> + */
> + pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE / 4,
NAck, please see suggestion on v1:
https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg01206.html
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> 16 * KiB, FLASH_SIZE >> 16,
> 1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2
2019-03-05 16:42 ` Markus Armbruster
@ 2019-03-05 17:54 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-05 17:54 UTC (permalink / raw)
To: Markus Armbruster
Cc: qemu-devel, alex.bennee, lersek, kwolf, qemu-ppc, qemu-block, mreitz
On 3/5/19 5:42 PM, Markus Armbruster wrote:
> Philippe Mathieu-Daudé <philmd@redhat.com> writes:
>
>> Hi Markus,
>>
>> On 2/26/19 8:34 PM, Markus Armbruster wrote:
>>> QOMification left parameter @size unused in pflash_cfi01_register()
>>> and pflash_cfi02_register(). Obviously, @size should match
>>> @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
>>> callers satisfy this.
>>>
>>> Remove @nb_blocs and compute it from @size and @sector_len.
>>
>> The pflash devices are simplistically modelled has having a single
>> sector size. This is not true for real hw (pflash have different sector
>> sizes). It is however true for the unofficial VirtPFlash device, which
>> doesn't have any spec.
>>
>> The only valid parameter is @size. The @sector_len and @nb_blocs don't
>> match the hardwares. QEMU @sector_len is currently "The biggest
>> sector_size the device has" and QEMU @nb_blocs is really "@size /
>> @sector_len", although it doesn't match the nb_blocs the hardware has.
>>
>> I don't disagree with the patch content, but the description is not
>> accurate. We can indeed drop the @nb_blocs argument because we model an
>> unique sector size, thus we can calculate "@nb_blocs = @size /
>> @sector_len" in the model.
>>
>> With the patch description fixed:
>> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
> Let me try to fix it.
>
> Our pflash devices are simplistically modelled has having
> "num-blocks" sectors of equal size "sector-length". Real hardware
> commonly has sectors of different sizes. How our "sector-length"
> property is related to the physical device's multiple sector sizes
> is unclear.
>
> Helper functions pflash_cfi01_register() and pflash_cfi02_register()
> create a pflash device, set properties including "sector-length" and
> "num-blocks", and realize. They take parameters @size, @sector_len
> and @nb_blocs.
>
> QOMification left parameter @size unused. Obviously, @size should
> match @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs.
> All callers satisfy this.
>
> Remove @nb_blocs and compute it from @size and @sector_len.
>
> D'accord?
Oui, parfait!
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image Markus Armbruster
2019-02-26 22:30 ` BALATON Zoltan
2019-02-27 11:04 ` Alex Bennée
@ 2019-03-05 19:12 ` Philippe Mathieu-Daudé
2019-03-05 22:49 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
2 siblings, 1 reply; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-05 19:12 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel, alex.bennee
Cc: kwolf, qemu-block, mreitz, qemu-ppc, lersek
Hi Markus, Zoltan, Alex.
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> Machine "sam460ex" maps its flash memory at address 0xFFF00000. When
> no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM
> get mapped on top of its second half. Else, it's the size of the
> image rounded up to the next multiple of 64KiB.
>
> The rounding is actually useless: pflash_cfi01_realize() fails with
> "failed to read the initial flash content" unless it's a no-op.
>
> I have no idea what happens when the pflash's size exceeds 1MiB.
> Useful outcomes seem unlikely.
With PFlashCFI02, it depends of the @nb_mappings parameter, which tries
to emulates how the bus connects the pflash (which address lines are
connected).
PFlashCFI01 doesn't support the feature to remap its content in aliases
(which might look unfortunate, because boards end doing it, in different
ways).
For this device we have:
(qemu) info mtree
0000000000000000-ffffffffffffffff (prio 0, i/o): system
00000004fff00000-00000004ffffffff (prio 0, romd): sam460ex.flash
I'm not familiar with this arch/machine, let's assume the system bus is
32bit, and the flash has a 8bit word (we have 8 data lines connected to
the pflash).
The 'no image' is 1MiB.
1 MiB = 8 Mbit
8 Mbit / 32 = 2 ^ 18
We need 18 address lines to reach the whole flash.
What happens if we connect a 2MiB flash? We need 19 addr lines.
If we only have 18 lines to connect our flash, we can hardwire our last
line as 0 or 1.
- line #17 hardwired as 0:
Only the bottom part of the flash is accessible (range 0x000000..0x0fffff).
CPU reading 0x4fff00000 read flash offset 0x0.
Using CFI it is still a announced as 2MiB.
- line #17 hardwired as 1:
Only the top part of the flash is accessible (range 0x100000..0x1fffff).
Can we trigger any operation from the internal state machine (writing to
address 0x555, named @unlock_addr0 in QEMU) since all access are
hardwardwired on top of 1MiB...?
Yes we can, because the pflash only uses 11 bits for it's I/O, so all
writes are masked and hit the I/O internal unit.
CPU reading 0x4fff00000 read flash offset 0x100000
If we do have 19 lines dedicated to our chip and connect a 512KiB flash,
we 'll use 17 lines and let 2 lines unused.
Regardless the values on the lines #17 and #18, the flash will answer to
the value on lines #0..#16. This might be called MMIO aliasing, and is
what setup the @nb_mappings argument.
This example with nb_mappings=4 would mean:
"I have a 2MiB I/O space and a 512KiB flash, map it and create 3 aliases".
Back to the architecture, what matters here is that the CPU reset vector
is always user-controlled (mapped on a flash device).
This arch has reset_vector @0x4fffffffc.
You could also map a 256KiB pflash at 0x4fffc0000, as long as the reset
vector is covered. If you map it at 0x4fff00000 or 0x4fff80000 it won't!
This explanation is not arch-specific (adapting the reset vector to each
arch).
>
> I guess memory at the end of the address space remains unmapped when
> it's smaller than 1MiB. Again, useful outcomes seem unlikely.
If you map a 512KiB flash at 0x4fff00000, then the reset vector is not
covered. At 0x4fff80000 it is.
> The physical hardware appears to have 512KiB of flash memory:
> https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf
>
> For now, just set the flash memory size to 1MiB regardless of image
> size, and document the mess.
>
> Cc: BALATON Zoltan <balaton@eik.bme.hu>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> ---
> hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++---------------
> 1 file changed, 26 insertions(+), 15 deletions(-)
>
> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
> index 75250d49e4..0c919529f8 100644
> --- a/hw/ppc/sam460ex.c
> +++ b/hw/ppc/sam460ex.c
> @@ -91,32 +91,43 @@ struct boot_info {
>
> static int sam460ex_load_uboot(void)
> {
> + /*
> + * This first creates 1MiB of flash memory mapped at the end of
> + * the 32-bit address space (0xFFF00000..0xFFFFFFFF).
> + *
> + * If_PFLASH unit 0 is defined, the flash memory is initialized
> + * from that block backend.
> + *
> + * Else, it's initialized to zero. And then 512KiB of ROM get
> + * mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
> + * initialized from u-boot-sam460-20100605.bin.
I think the correct check is:
if (! something_mapped_at(0x4fffffffc)) {
rom_map("u-boot-sam460.bin",
0x500000000 - sizeof("u-boot-sam460.bin"));
}
Maybe:
if (!memory_region_present(get_system_memory(), 0x4fffffffc)) {
/* Current uboot ROM is 512KiB */
/* TODO check [0x500000000 - 512KiB,0x500000000 - 1] unmapped */
rom_add_file_fixed(UBOOT_FILENAME,
UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
-1);
}
Regards,
Phil.
> + *
> + * This doesn't smell right.
> + *
> + * The physical hardware appears to have 512KiB flash memory.
> + *
> + * TODO Figure out what we really need here, and clean this up.
> + */
> +
> DriveInfo *dinfo;
> - BlockBackend *blk = NULL;
> - hwaddr base = FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32);
> - long bios_size = FLASH_SIZE;
> - int fl_sectors;
>
> dinfo = drive_get(IF_PFLASH, 0, 0);
> - if (dinfo) {
> - blk = blk_by_legacy_dinfo(dinfo);
> - bios_size = blk_getlength(blk);
> - }
> - fl_sectors = (bios_size + 65535) >> 16;
> -
> - if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size,
> - blk, 64 * KiB, fl_sectors,
> + if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
> + NULL, "sam460ex.flash", FLASH_SIZE,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, FLASH_SIZE / (64 * KiB),
> 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
> error_report("Error registering flash memory");
> /* XXX: return an error instead? */
> exit(1);
> }
>
> - if (!blk) {
> + if (!dinfo) {
> /*error_report("No flash image given with the 'pflash' parameter,"
> " using default u-boot image");*/
> - base = UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32);
> - rom_add_file_fixed(UBOOT_FILENAME, base, -1);
> + rom_add_file_fixed(UBOOT_FILENAME,
> + UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
> + -1);
> }
>
> return 0;
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 07/11] ppc405_boards: Don't size flash memory to match backing image
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 07/11] ppc405_boards: " Markus Armbruster
2019-02-27 10:35 ` Alex Bennée
@ 2019-03-05 19:23 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-05 19:23 UTC (permalink / raw)
To: Markus Armbruster, qemu-devel
Cc: kwolf, qemu-block, alex.bennee, mreitz, qemu-ppc, lersek, David Gibson
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> Machine "ref405ep" maps its flash memory at address 2^32 - image size.
> Image size is rounded up to the next multiple of 64KiB. Useless,
> because pflash_cfi02_realize() fails with "failed to read the initial
> flash content" unless the rounding is a no-op.
>
> If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then
> other stuff. No idea how that would play out, but a useful outcomes
> seem unlikely.
>
> Map the flash memory at fixed address 0xFFF80000 with size 512KiB,
> regardless of image size, to match the physical hardware.
>
> Machine "taihu" maps its boot flash memory similarly. The code even
> has a comment /* XXX: should check that size is 2MB */, followed by
> disabled code to adjust the size to 2MiB regardless of image size.
>
> Its code to map its application flash memory looks the same, except
> there the XXX comment asks for 32MiB, and the code to adjust the size
> isn't disabled. Note that pflash_cfi02_realize() fails with "failed
> to read the initial flash content" for images smaller than 32MiB.
>
> Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB,
> to match the physical hardware. Delete dead code from application
> flash mapping, and simplify some.
>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Signed-off-by: Markus Armbruster <armbru@redhat.com>
> Acked-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/ppc/ppc405_boards.c | 51 +++++++++++++-----------------------------
> 1 file changed, 15 insertions(+), 36 deletions(-)
>
> diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
> index f47b15f10e..672717ef1b 100644
> --- a/hw/ppc/ppc405_boards.c
> +++ b/hw/ppc/ppc405_boards.c
> @@ -158,7 +158,7 @@ static void ref405ep_init(MachineState *machine)
> target_ulong kernel_base, initrd_base;
> long kernel_size, initrd_size;
> int linux_boot;
> - int fl_idx, fl_sectors, len;
> + int len;
> DriveInfo *dinfo;
> MemoryRegion *sysmem = get_system_memory();
>
> @@ -185,26 +185,19 @@ static void ref405ep_init(MachineState *machine)
> #ifdef DEBUG_BOARD_INIT
> printf("%s: register BIOS\n", __func__);
> #endif
> - fl_idx = 0;
> #ifdef USE_FLASH_BIOS
> - dinfo = drive_get(IF_PFLASH, 0, fl_idx);
> + dinfo = drive_get(IF_PFLASH, 0, 0);
> if (dinfo) {
> - BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
> -
> - bios_size = blk_getlength(blk);
> - fl_sectors = (bios_size + 65535) >> 16;
> #ifdef DEBUG_BOARD_INIT
> - printf("Register parallel flash %d size %lx"
> - " at addr %lx '%s' %d\n",
> - fl_idx, bios_size, -bios_size,
> - blk_name(blk), fl_sectors);
> + printf("Register parallel flash\n");
> #endif
> + bios_size = 8 * MiB;
> pflash_cfi02_register((uint32_t)(-bios_size),
> NULL, "ef405ep.bios", bios_size,
> - blk, 65536, fl_sectors, 1,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, bios_size / (64 * KiB), 1,
> 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> - fl_idx++;
> } else
> #endif
> {
> @@ -455,7 +448,7 @@ static void taihu_405ep_init(MachineState *machine)
> target_ulong kernel_base, initrd_base;
> long kernel_size, initrd_size;
> int linux_boot;
> - int fl_idx, fl_sectors;
> + int fl_idx;
> DriveInfo *dinfo;
>
> /* RAM is soldered to the board so the size cannot be changed */
> @@ -486,21 +479,14 @@ static void taihu_405ep_init(MachineState *machine)
> #if defined(USE_FLASH_BIOS)
> dinfo = drive_get(IF_PFLASH, 0, fl_idx);
> if (dinfo) {
> - BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
> -
> - bios_size = blk_getlength(blk);
> - /* XXX: should check that size is 2MB */
> - // bios_size = 2 * 1024 * 1024;
> - fl_sectors = (bios_size + 65535) >> 16;
> #ifdef DEBUG_BOARD_INIT
> - printf("Register parallel flash %d size %lx"
> - " at addr %lx '%s' %d\n",
> - fl_idx, bios_size, -bios_size,
> - blk_name(blk), fl_sectors);
> + printf("Register boot flash\n");
> #endif
> - pflash_cfi02_register((uint32_t)(-bios_size),
> + bios_size = 2 * MiB;
> + pflash_cfi02_register(0xFFE00000,
> NULL, "taihu_405ep.bios", bios_size,
> - blk, 65536, fl_sectors, 1,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, bios_size / (64 * KiB), 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> fl_idx++;
> @@ -536,20 +522,13 @@ static void taihu_405ep_init(MachineState *machine)
> /* Register Linux flash */
> dinfo = drive_get(IF_PFLASH, 0, fl_idx);
> if (dinfo) {
> - BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
> -
> - bios_size = blk_getlength(blk);
> - /* XXX: should check that size is 32MB */
> bios_size = 32 * MiB;
> - fl_sectors = (bios_size + 65535) >> 16;
> #ifdef DEBUG_BOARD_INIT
> - printf("Register parallel flash %d size %lx"
> - " at addr " TARGET_FMT_lx " '%s'\n",
> - fl_idx, bios_size, (target_ulong)0xfc000000,
> - blk_name(blk));
> + printf("Register application flash\n"
> #endif
> pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size,
> - blk, 65536, fl_sectors, 1,
> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> + 64 * KiB, bios_size / (64 * KiB), 1,
> 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
> 1);
> fl_idx++;
>
The same comments I sent to the previous patch of this series apply here:
https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg01274.html
Regards,
Phil.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image
2019-03-05 19:12 ` Philippe Mathieu-Daudé
@ 2019-03-05 22:49 ` BALATON Zoltan
2019-03-06 6:51 ` Markus Armbruster
0 siblings, 1 reply; 43+ messages in thread
From: BALATON Zoltan @ 2019-03-05 22:49 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Markus Armbruster, qemu-devel, alex.bennee, qemu-ppc, qemu-block
Hello,
On Tue, 5 Mar 2019, Philippe Mathieu-Daudé wrote:
> On 2/26/19 8:34 PM, Markus Armbruster wrote:
>> Machine "sam460ex" maps its flash memory at address 0xFFF00000. When
>> no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM
>> get mapped on top of its second half. Else, it's the size of the
>> image rounded up to the next multiple of 64KiB.
>>
>> The rounding is actually useless: pflash_cfi01_realize() fails with
>> "failed to read the initial flash content" unless it's a no-op.
>>
>> I have no idea what happens when the pflash's size exceeds 1MiB.
>> Useful outcomes seem unlikely.
>
> With PFlashCFI02, it depends of the @nb_mappings parameter, which tries
> to emulates how the bus connects the pflash (which address lines are
> connected).
>
> PFlashCFI01 doesn't support the feature to remap its content in aliases
> (which might look unfortunate, because boards end doing it, in different
> ways).
I think this is all theoretical at the moment since we don't actually
model the flash functions of this board (at least I haven't tested that at
all) and unless it somehow uses it in ways I'm unaware of I think
currently only the ROM is used.
> For this device we have:
>
> (qemu) info mtree
> 0000000000000000-ffffffffffffffff (prio 0, i/o): system
> 00000004fff00000-00000004ffffffff (prio 0, romd): sam460ex.flash
>
> I'm not familiar with this arch/machine, let's assume the system bus is
> 32bit, and the flash has a 8bit word (we have 8 data lines connected to
> the pflash).
Maybe this can help:
https://datasheet.octopart.com/PPC460EX-NUB800T-AMCC-datasheet-11553412.pdf
http://www.acube-systems.biz/index.php?page=hardware&pid=5
Unfortunately I don't have any more detailed docs where it's explained
more but according to the above and in my limited understanding the SoC
could handle larger flash chips but this board has 512 MB. We have not
changed it now because I'm not sure if it would break anything and I don't
have time to test it so Marcus just added a comment to remind about this
and we're happy with that for now and could come back to it separately.
> The 'no image' is 1MiB.
>
> 1 MiB = 8 Mbit
> 8 Mbit / 32 = 2 ^ 18
> We need 18 address lines to reach the whole flash.
>
> What happens if we connect a 2MiB flash? We need 19 addr lines.
>
> If we only have 18 lines to connect our flash, we can hardwire our last
> line as 0 or 1.
>
> - line #17 hardwired as 0:
> Only the bottom part of the flash is accessible (range 0x000000..0x0fffff).
> CPU reading 0x4fff00000 read flash offset 0x0.
> Using CFI it is still a announced as 2MiB.
>
> - line #17 hardwired as 1:
> Only the top part of the flash is accessible (range 0x100000..0x1fffff).
> Can we trigger any operation from the internal state machine (writing to
> address 0x555, named @unlock_addr0 in QEMU) since all access are
> hardwardwired on top of 1MiB...?
> Yes we can, because the pflash only uses 11 bits for it's I/O, so all
> writes are masked and hit the I/O internal unit.
> CPU reading 0x4fff00000 read flash offset 0x100000
>
> If we do have 19 lines dedicated to our chip and connect a 512KiB flash,
> we 'll use 17 lines and let 2 lines unused.
> Regardless the values on the lines #17 and #18, the flash will answer to
> the value on lines #0..#16. This might be called MMIO aliasing, and is
> what setup the @nb_mappings argument.
> This example with nb_mappings=4 would mean:
> "I have a 2MiB I/O space and a 512KiB flash, map it and create 3 aliases".
>
> Back to the architecture, what matters here is that the CPU reset vector
> is always user-controlled (mapped on a flash device).
> This arch has reset_vector @0x4fffffffc.
> You could also map a 256KiB pflash at 0x4fffc0000, as long as the reset
> vector is covered. If you map it at 0x4fff00000 or 0x4fff80000 it won't!
>
> This explanation is not arch-specific (adapting the reset vector to each
> arch).
>
>>
>> I guess memory at the end of the address space remains unmapped when
>> it's smaller than 1MiB. Again, useful outcomes seem unlikely.
>
> If you map a 512KiB flash at 0x4fff00000, then the reset vector is not
> covered. At 0x4fff80000 it is.
Yes, I said the same before but this would be a separate patch and would
need more testing so it wasn't included in this series. Since it works as
it is now this can wait until later when it can be cleaned up. If we want
to model the actual board we don't have to consider different flash sizes
than the 512 MB that the board has so everything else is probably
"overthinking" it.
Regards,
BALATON Zoltan
>
>> The physical hardware appears to have 512KiB of flash memory:
>> https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf
>>
>> For now, just set the flash memory size to 1MiB regardless of image
>> size, and document the mess.
>>
>> Cc: BALATON Zoltan <balaton@eik.bme.hu>
>> Signed-off-by: Markus Armbruster <armbru@redhat.com>
>> ---
>> hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++---------------
>> 1 file changed, 26 insertions(+), 15 deletions(-)
>>
>> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
>> index 75250d49e4..0c919529f8 100644
>> --- a/hw/ppc/sam460ex.c
>> +++ b/hw/ppc/sam460ex.c
>> @@ -91,32 +91,43 @@ struct boot_info {
>>
>> static int sam460ex_load_uboot(void)
>> {
>> + /*
>> + * This first creates 1MiB of flash memory mapped at the end of
>> + * the 32-bit address space (0xFFF00000..0xFFFFFFFF).
>> + *
>> + * If_PFLASH unit 0 is defined, the flash memory is initialized
>> + * from that block backend.
>> + *
>> + * Else, it's initialized to zero. And then 512KiB of ROM get
>> + * mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
>> + * initialized from u-boot-sam460-20100605.bin.
>
> I think the correct check is:
>
> if (! something_mapped_at(0x4fffffffc)) {
> rom_map("u-boot-sam460.bin",
> 0x500000000 - sizeof("u-boot-sam460.bin"));
> }
>
> Maybe:
>
> if (!memory_region_present(get_system_memory(), 0x4fffffffc)) {
> /* Current uboot ROM is 512KiB */
> /* TODO check [0x500000000 - 512KiB,0x500000000 - 1] unmapped */
> rom_add_file_fixed(UBOOT_FILENAME,
> UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
> -1);
> }
>
> Regards,
>
> Phil.
>
>> + *
>> + * This doesn't smell right.
>> + *
>> + * The physical hardware appears to have 512KiB flash memory.
>> + *
>> + * TODO Figure out what we really need here, and clean this up.
>> + */
>> +
>> DriveInfo *dinfo;
>> - BlockBackend *blk = NULL;
>> - hwaddr base = FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32);
>> - long bios_size = FLASH_SIZE;
>> - int fl_sectors;
>>
>> dinfo = drive_get(IF_PFLASH, 0, 0);
>> - if (dinfo) {
>> - blk = blk_by_legacy_dinfo(dinfo);
>> - bios_size = blk_getlength(blk);
>> - }
>> - fl_sectors = (bios_size + 65535) >> 16;
>> -
>> - if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size,
>> - blk, 64 * KiB, fl_sectors,
>> + if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
>> + NULL, "sam460ex.flash", FLASH_SIZE,
>> + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
>> + 64 * KiB, FLASH_SIZE / (64 * KiB),
>> 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
>> error_report("Error registering flash memory");
>> /* XXX: return an error instead? */
>> exit(1);
>> }
>>
>> - if (!blk) {
>> + if (!dinfo) {
>> /*error_report("No flash image given with the 'pflash' parameter,"
>> " using default u-boot image");*/
>> - base = UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32);
>> - rom_add_file_fixed(UBOOT_FILENAME, base, -1);
>> + rom_add_file_fixed(UBOOT_FILENAME,
>> + UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
>> + -1);
>> }
>>
>> return 0;
>>
>
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image
2019-03-05 22:49 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
@ 2019-03-06 6:51 ` Markus Armbruster
2019-03-06 7:47 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 43+ messages in thread
From: Markus Armbruster @ 2019-03-06 6:51 UTC (permalink / raw)
To: BALATON Zoltan
Cc: Philippe Mathieu-Daudé,
qemu-ppc, alex.bennee, qemu-block, qemu-devel
BALATON Zoltan <balaton@eik.bme.hu> writes:
> Hello,
>
> On Tue, 5 Mar 2019, Philippe Mathieu-Daudé wrote:
>> On 2/26/19 8:34 PM, Markus Armbruster wrote:
>>> Machine "sam460ex" maps its flash memory at address 0xFFF00000. When
>>> no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM
>>> get mapped on top of its second half. Else, it's the size of the
>>> image rounded up to the next multiple of 64KiB.
>>>
>>> The rounding is actually useless: pflash_cfi01_realize() fails with
>>> "failed to read the initial flash content" unless it's a no-op.
>>>
>>> I have no idea what happens when the pflash's size exceeds 1MiB.
>>> Useful outcomes seem unlikely.
>>
>> With PFlashCFI02, it depends of the @nb_mappings parameter, which tries
>> to emulates how the bus connects the pflash (which address lines are
>> connected).
>>
>> PFlashCFI01 doesn't support the feature to remap its content in aliases
>> (which might look unfortunate, because boards end doing it, in different
>> ways).
>
> I think this is all theoretical at the moment since we don't actually
> model the flash functions of this board (at least I haven't tested
> that at all) and unless it somehow uses it in ways I'm unaware of I
> think currently only the ROM is used.
>
>> For this device we have:
>>
>> (qemu) info mtree
>> 0000000000000000-ffffffffffffffff (prio 0, i/o): system
>> 00000004fff00000-00000004ffffffff (prio 0, romd): sam460ex.flash
>>
>> I'm not familiar with this arch/machine, let's assume the system bus is
>> 32bit, and the flash has a 8bit word (we have 8 data lines connected to
>> the pflash).
>
> Maybe this can help:
> https://datasheet.octopart.com/PPC460EX-NUB800T-AMCC-datasheet-11553412.pdf
> http://www.acube-systems.biz/index.php?page=hardware&pid=5
>
> Unfortunately I don't have any more detailed docs where it's explained
> more but according to the above and in my limited understanding the
> SoC could handle larger flash chips but this board has 512 MB. We have
> not changed it now because I'm not sure if it would break anything and
> I don't have time to test it so Marcus just added a comment to remind
> about this and we're happy with that for now and could come back to it
> separately.
And that's good enough for what I'm trying to do in this series, namely
getting rid of unwarranted magic around pflash devices.
>> The 'no image' is 1MiB.
>>
>> 1 MiB = 8 Mbit
>> 8 Mbit / 32 = 2 ^ 18
>> We need 18 address lines to reach the whole flash.
>>
>> What happens if we connect a 2MiB flash? We need 19 addr lines.
>>
>> If we only have 18 lines to connect our flash, we can hardwire our last
>> line as 0 or 1.
>>
>> - line #17 hardwired as 0:
>> Only the bottom part of the flash is accessible (range 0x000000..0x0fffff).
>> CPU reading 0x4fff00000 read flash offset 0x0.
>> Using CFI it is still a announced as 2MiB.
>>
>> - line #17 hardwired as 1:
>> Only the top part of the flash is accessible (range 0x100000..0x1fffff).
>> Can we trigger any operation from the internal state machine (writing to
>> address 0x555, named @unlock_addr0 in QEMU) since all access are
>> hardwardwired on top of 1MiB...?
>> Yes we can, because the pflash only uses 11 bits for it's I/O, so all
>> writes are masked and hit the I/O internal unit.
>> CPU reading 0x4fff00000 read flash offset 0x100000
>>
>> If we do have 19 lines dedicated to our chip and connect a 512KiB flash,
>> we 'll use 17 lines and let 2 lines unused.
>> Regardless the values on the lines #17 and #18, the flash will answer to
>> the value on lines #0..#16. This might be called MMIO aliasing, and is
>> what setup the @nb_mappings argument.
>> This example with nb_mappings=4 would mean:
>> "I have a 2MiB I/O space and a 512KiB flash, map it and create 3 aliases".
Physical hardware does address lines. Hardwiring address lines leaves
part of the hardware unaddressable. Not decoding address lines gets the
same stuff mapped multiple times in the address space. Address lines is
also what makes sizes powers of two.
QEMU device models are software. Emulating address lines faithfully
there takes extra effort. A hack job that simply maps whatever size
wherever is easier. It's why we could do 7919 sectors of 5323 bytes for
a size of 42152837 bytes, and map it at address 0x12345678.
Of course, none of our boards is that nuts. But this one exudes a bit
of a nutty flavor: with "-drive if=pflash,format=raw,file=1G.img", it
happily maps 1G at address 0x4fff00000. info mtree:
address-space: memory
0000000000000000-ffffffffffffffff (prio 0, i/o): system
0000000000000000-000000001fffffff (prio 0, i/o): sdram-containers
0000000000000000-000000001fffffff (prio 0, i/o): alias ppc4xx.sdram0 @ppc4xx.sdram 0000000000000000-000000001fffffff
0000000400000000-000000040003ffff (prio 0, ram): ppc440.l2cache_ram
00000004bffd0000-00000004bffd00ff (prio 0, i/o): ohci
00000004bffd0400-00000004bffd13ff (prio 0, i/o): ehci
00000004bffd0400-00000004bffd040f (prio 0, i/o): capabilities
00000004bffd0410-00000004bffd0453 (prio 0, i/o): operational
00000004bffd0454-00000004bffd046b (prio 0, i/o): ports
00000004ef600300-00000004ef600307 (prio 0, i/o): serial
00000004ef600700-00000004ef600711 (prio 0, i/o): ppc4xx-i2c
00000004ef600800-00000004ef600811 (prio 0, i/o): ppc4xx-i2c
---> 00000004fff00000-000000053fefffff (prio 0, romd): sam460ex.flash
0000000c08000000-0000000c0800ffff (prio 0, i/o): alias isa_mmio @io 0000000000000000-000000000000ffff
0000000c0ec00000-0000000c0ec800fe (prio 0, i/o): pci-container
0000000c0ec00000-0000000c0ec00003 (prio 0, i/o): pci-conf-idx
0000000c0ec00004-0000000c0ec00007 (prio 0, i/o): pci-conf-data
0000000c0ec80000-0000000c0ec800fe (prio 0, i/o): pci.reg
Looks like there's plenty of space before we crash into pci-container.
Still, boards emulating real hardware should not take such liberties.
>> Back to the architecture, what matters here is that the CPU reset vector
>> is always user-controlled (mapped on a flash device).
>> This arch has reset_vector @0x4fffffffc.
>> You could also map a 256KiB pflash at 0x4fffc0000, as long as the reset
>> vector is covered. If you map it at 0x4fff00000 or 0x4fff80000 it won't!
>>
>> This explanation is not arch-specific (adapting the reset vector to each
>> arch).
>>
>>>
>>> I guess memory at the end of the address space remains unmapped when
>>> it's smaller than 1MiB. Again, useful outcomes seem unlikely.
>>
>> If you map a 512KiB flash at 0x4fff00000, then the reset vector is not
>> covered. At 0x4fff80000 it is.
>
> Yes, I said the same before but this would be a separate patch and
> would need more testing so it wasn't included in this series. Since it
> works as it is now this can wait until later when it can be cleaned
> up. If we want to model the actual board we don't have to consider
> different flash sizes than the 512 MB that the board has so everything
> else is probably "overthinking" it.
Isn't modelling the actual board why we have the virtual board in the
first place? But I digress...
[...]
>>> The physical hardware appears to have 512KiB of flash memory:
>>> https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf
>>>
>>> For now, just set the flash memory size to 1MiB regardless of image
>>> size, and document the mess.
>>>
>>> Cc: BALATON Zoltan <balaton@eik.bme.hu>
>>> Signed-off-by: Markus Armbruster <armbru@redhat.com>
>>> ---
>>> hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++---------------
>>> 1 file changed, 26 insertions(+), 15 deletions(-)
>>>
>>> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
>>> index 75250d49e4..0c919529f8 100644
>>> --- a/hw/ppc/sam460ex.c
>>> +++ b/hw/ppc/sam460ex.c
>>> @@ -91,32 +91,43 @@ struct boot_info {
>>>
>>> static int sam460ex_load_uboot(void)
>>> {
>>> + /*
>>> + * This first creates 1MiB of flash memory mapped at the end of
>>> + * the 32-bit address space (0xFFF00000..0xFFFFFFFF).
>>> + *
>>> + * If_PFLASH unit 0 is defined, the flash memory is initialized
>>> + * from that block backend.
>>> + *
>>> + * Else, it's initialized to zero. And then 512KiB of ROM get
>>> + * mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
>>> + * initialized from u-boot-sam460-20100605.bin.
>>
>> I think the correct check is:
>>
>> if (! something_mapped_at(0x4fffffffc)) {
>> rom_map("u-boot-sam460.bin",
>> 0x500000000 - sizeof("u-boot-sam460.bin"));
>> }
>>
>> Maybe:
>>
>> if (!memory_region_present(get_system_memory(), 0x4fffffffc)) {
>> /* Current uboot ROM is 512KiB */
>> /* TODO check [0x500000000 - 512KiB,0x500000000 - 1] unmapped */
>> rom_add_file_fixed(UBOOT_FILENAME,
>> UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
>> -1);
>> }
I think this should be addressed in separate patches. This one merely
kills bad magic around pflash, such as inheriting the flash's size from
the block backend without sanity checking.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image
2019-03-06 6:51 ` Markus Armbruster
@ 2019-03-06 7:47 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 43+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-03-06 7:47 UTC (permalink / raw)
To: Markus Armbruster, BALATON Zoltan
Cc: qemu-ppc, alex.bennee, qemu-block, qemu-devel
On 3/6/19 7:51 AM, Markus Armbruster wrote:
> BALATON Zoltan <balaton@eik.bme.hu> writes:
>> On Tue, 5 Mar 2019, Philippe Mathieu-Daudé wrote:
>>> On 2/26/19 8:34 PM, Markus Armbruster wrote:
>>>> Machine "sam460ex" maps its flash memory at address 0xFFF00000. When
>>>> no image is supplied, its size is 1MiB (0x100000), and 512KiB of ROM
>>>> get mapped on top of its second half. Else, it's the size of the
>>>> image rounded up to the next multiple of 64KiB.
>>>>
>>>> The rounding is actually useless: pflash_cfi01_realize() fails with
>>>> "failed to read the initial flash content" unless it's a no-op.
>>>>
>>>> I have no idea what happens when the pflash's size exceeds 1MiB.
>>>> Useful outcomes seem unlikely.
>>>
>>> With PFlashCFI02, it depends of the @nb_mappings parameter, which tries
>>> to emulates how the bus connects the pflash (which address lines are
>>> connected).
>>>
>>> PFlashCFI01 doesn't support the feature to remap its content in aliases
>>> (which might look unfortunate, because boards end doing it, in different
>>> ways).
>>
>> I think this is all theoretical at the moment since we don't actually
>> model the flash functions of this board (at least I haven't tested
>> that at all) and unless it somehow uses it in ways I'm unaware of I
>> think currently only the ROM is used.
>>
>>> For this device we have:
>>>
>>> (qemu) info mtree
>>> 0000000000000000-ffffffffffffffff (prio 0, i/o): system
>>> 00000004fff00000-00000004ffffffff (prio 0, romd): sam460ex.flash
>>>
>>> I'm not familiar with this arch/machine, let's assume the system bus is
>>> 32bit, and the flash has a 8bit word (we have 8 data lines connected to
>>> the pflash).
>>
>> Maybe this can help:
>> https://datasheet.octopart.com/PPC460EX-NUB800T-AMCC-datasheet-11553412.pdf
>> http://www.acube-systems.biz/index.php?page=hardware&pid=5
>>
>> Unfortunately I don't have any more detailed docs where it's explained
>> more but according to the above and in my limited understanding the
>> SoC could handle larger flash chips but this board has 512 MB. We have
>> not changed it now because I'm not sure if it would break anything and
>> I don't have time to test it so Marcus just added a comment to remind
>> about this and we're happy with that for now and could come back to it
>> separately.
>
> And that's good enough for what I'm trying to do in this series, namely
> getting rid of unwarranted magic around pflash devices.
>
>>> The 'no image' is 1MiB.
>>>
>>> 1 MiB = 8 Mbit
>>> 8 Mbit / 32 = 2 ^ 18
>>> We need 18 address lines to reach the whole flash.
>>>
>>> What happens if we connect a 2MiB flash? We need 19 addr lines.
>>>
>>> If we only have 18 lines to connect our flash, we can hardwire our last
>>> line as 0 or 1.
>>>
>>> - line #17 hardwired as 0:
>>> Only the bottom part of the flash is accessible (range 0x000000..0x0fffff).
>>> CPU reading 0x4fff00000 read flash offset 0x0.
>>> Using CFI it is still a announced as 2MiB.
>>>
>>> - line #17 hardwired as 1:
>>> Only the top part of the flash is accessible (range 0x100000..0x1fffff).
>>> Can we trigger any operation from the internal state machine (writing to
>>> address 0x555, named @unlock_addr0 in QEMU) since all access are
>>> hardwardwired on top of 1MiB...?
>>> Yes we can, because the pflash only uses 11 bits for it's I/O, so all
>>> writes are masked and hit the I/O internal unit.
>>> CPU reading 0x4fff00000 read flash offset 0x100000
>>>
>>> If we do have 19 lines dedicated to our chip and connect a 512KiB flash,
>>> we 'll use 17 lines and let 2 lines unused.
>>> Regardless the values on the lines #17 and #18, the flash will answer to
>>> the value on lines #0..#16. This might be called MMIO aliasing, and is
>>> what setup the @nb_mappings argument.
>>> This example with nb_mappings=4 would mean:
>>> "I have a 2MiB I/O space and a 512KiB flash, map it and create 3 aliases".
>
> Physical hardware does address lines. Hardwiring address lines leaves
> part of the hardware unaddressable. Not decoding address lines gets the
> same stuff mapped multiple times in the address space. Address lines is
> also what makes sizes powers of two.
I'm amazed about how you sumarized... Thanks!
> QEMU device models are software. Emulating address lines faithfully
> there takes extra effort. A hack job that simply maps whatever size
> wherever is easier. It's why we could do 7919 sectors of 5323 bytes for
> a size of 42152837 bytes, and map it at address 0x12345678.
>
> Of course, none of our boards is that nuts. But this one exudes a bit
> of a nutty flavor: with "-drive if=pflash,format=raw,file=1G.img", it
> happily maps 1G at address 0x4fff00000. info mtree:
>
> address-space: memory
> 0000000000000000-ffffffffffffffff (prio 0, i/o): system
> 0000000000000000-000000001fffffff (prio 0, i/o): sdram-containers
> 0000000000000000-000000001fffffff (prio 0, i/o): alias ppc4xx.sdram0 @ppc4xx.sdram 0000000000000000-000000001fffffff
> 0000000400000000-000000040003ffff (prio 0, ram): ppc440.l2cache_ram
> 00000004bffd0000-00000004bffd00ff (prio 0, i/o): ohci
> 00000004bffd0400-00000004bffd13ff (prio 0, i/o): ehci
> 00000004bffd0400-00000004bffd040f (prio 0, i/o): capabilities
> 00000004bffd0410-00000004bffd0453 (prio 0, i/o): operational
> 00000004bffd0454-00000004bffd046b (prio 0, i/o): ports
> 00000004ef600300-00000004ef600307 (prio 0, i/o): serial
> 00000004ef600700-00000004ef600711 (prio 0, i/o): ppc4xx-i2c
> 00000004ef600800-00000004ef600811 (prio 0, i/o): ppc4xx-i2c
> ---> 00000004fff00000-000000053fefffff (prio 0, romd): sam460ex.flash
> 0000000c08000000-0000000c0800ffff (prio 0, i/o): alias isa_mmio @io 0000000000000000-000000000000ffff
> 0000000c0ec00000-0000000c0ec800fe (prio 0, i/o): pci-container
> 0000000c0ec00000-0000000c0ec00003 (prio 0, i/o): pci-conf-idx
> 0000000c0ec00004-0000000c0ec00007 (prio 0, i/o): pci-conf-data
> 0000000c0ec80000-0000000c0ec800fe (prio 0, i/o): pci.reg
>
> Looks like there's plenty of space before we crash into pci-container.
> Still, boards emulating real hardware should not take such liberties.
Good catch, this is a Chip Select slot and is limited to the max
addressing the bus allow to this CS.
>>> Back to the architecture, what matters here is that the CPU reset vector
>>> is always user-controlled (mapped on a flash device).
>>> This arch has reset_vector @0x4fffffffc.
>>> You could also map a 256KiB pflash at 0x4fffc0000, as long as the reset
>>> vector is covered. If you map it at 0x4fff00000 or 0x4fff80000 it won't!
>>>
>>> This explanation is not arch-specific (adapting the reset vector to each
>>> arch).
>>>
>>>>
>>>> I guess memory at the end of the address space remains unmapped when
>>>> it's smaller than 1MiB. Again, useful outcomes seem unlikely.
>>>
>>> If you map a 512KiB flash at 0x4fff00000, then the reset vector is not
>>> covered. At 0x4fff80000 it is.
>>
>> Yes, I said the same before but this would be a separate patch and
>> would need more testing so it wasn't included in this series. Since it
>> works as it is now this can wait until later when it can be cleaned
>> up. If we want to model the actual board we don't have to consider
>> different flash sizes than the 512 MB that the board has so everything
>> else is probably "overthinking" it.
>
> Isn't modelling the actual board why we have the virtual board in the
> first place? But I digress...
>
> [...]
>>>> The physical hardware appears to have 512KiB of flash memory:
>>>> https://eu.mouser.com/datasheet/2/268/atmel_AT49BV040B-1180330.pdf
>>>>
>>>> For now, just set the flash memory size to 1MiB regardless of image
>>>> size, and document the mess.
>>>>
>>>> Cc: BALATON Zoltan <balaton@eik.bme.hu>
>>>> Signed-off-by: Markus Armbruster <armbru@redhat.com>
>>>> ---
>>>> hw/ppc/sam460ex.c | 41 ++++++++++++++++++++++++++---------------
>>>> 1 file changed, 26 insertions(+), 15 deletions(-)
>>>>
>>>> diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
>>>> index 75250d49e4..0c919529f8 100644
>>>> --- a/hw/ppc/sam460ex.c
>>>> +++ b/hw/ppc/sam460ex.c
>>>> @@ -91,32 +91,43 @@ struct boot_info {
>>>>
>>>> static int sam460ex_load_uboot(void)
>>>> {
>>>> + /*
>>>> + * This first creates 1MiB of flash memory mapped at the end of
>>>> + * the 32-bit address space (0xFFF00000..0xFFFFFFFF).
>>>> + *
>>>> + * If_PFLASH unit 0 is defined, the flash memory is initialized
>>>> + * from that block backend.
>>>> + *
>>>> + * Else, it's initialized to zero. And then 512KiB of ROM get
>>>> + * mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
>>>> + * initialized from u-boot-sam460-20100605.bin.
>>>
>>> I think the correct check is:
>>>
>>> if (! something_mapped_at(0x4fffffffc)) {
>>> rom_map("u-boot-sam460.bin",
>>> 0x500000000 - sizeof("u-boot-sam460.bin"));
>>> }
>>>
>>> Maybe:
>>>
>>> if (!memory_region_present(get_system_memory(), 0x4fffffffc)) {
>>> /* Current uboot ROM is 512KiB */
>>> /* TODO check [0x500000000 - 512KiB,0x500000000 - 1] unmapped */
>>> rom_add_file_fixed(UBOOT_FILENAME,
>>> UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
>>> -1);
>>> }
>
> I think this should be addressed in separate patches. This one merely
> kills bad magic around pflash, such as inheriting the flash's size from
> the block backend without sanity checking.
"... let him speak now or forever hold his peace."
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 08/11] r2d: Flash memory creation is confused about size, mark FIXME
2019-03-05 17:48 ` Philippe Mathieu-Daudé
@ 2019-03-06 15:00 ` Markus Armbruster
0 siblings, 0 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-03-06 15:00 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, kwolf, qemu-block, lersek, Magnus Damm, mreitz,
qemu-ppc, alex.bennee
Philippe Mathieu-Daudé <philmd@redhat.com> writes:
> On 2/26/19 8:34 PM, Markus Armbruster wrote:
>> pflash_cfi02_register() takes a size in bytes, a block size in bytes
>> and a number of blocks. r2d_init() passes FLASH_SIZE, 16 * KiB,
>> FLASH_SIZE >> 16. Does not compute: size doesn't match block size *
>> number of blocks. The latter happens to win. I tried to find
>> documentation on the physical hardware, no luck.
>>
>> For now, adjust the byte size passed to match the actual size created,
>> and add a FIXME comment.
>>
>> Cc: Magnus Damm <magnus.damm@gmail.com>
>> Signed-off-by: Markus Armbruster <armbru@redhat.com>
>> ---
>> hw/sh4/r2d.c | 9 ++++++++-
>> 1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
>> index dcdb3728cb..ed18d1f351 100644
>> --- a/hw/sh4/r2d.c
>> +++ b/hw/sh4/r2d.c
>> @@ -290,7 +290,14 @@ static void r2d_init(MachineState *machine)
>>
>> /* onboard flash memory */
>> dinfo = drive_get(IF_PFLASH, 0, 0);
>> - pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
>> + /*
>> + * FIXME The code is confused about the size of the flash. It
>> + * used to pass FLASH_SIZE bytes, in FLASH_SIZE >> 16 blocks of
>> + * 16KiB each, which does not compute, but creates one of
>> + * FLASH_SIZE / 4 bytes anyway. The current code does so too, but
>> + * whether it's the right size is anybody's guess.
>> + */
>> + pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE / 4,
>
> NAck, please see suggestion on v1:
> https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg01206.html
I'll use that to replace this patch in v3. Thanks!
[...]
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 07/11] ppc405_boards: Don't size flash memory to match backing image
2019-02-27 10:35 ` Alex Bennée
@ 2019-03-07 7:01 ` Markus Armbruster
2019-03-08 4:39 ` David Gibson
0 siblings, 1 reply; 43+ messages in thread
From: Markus Armbruster @ 2019-03-07 7:01 UTC (permalink / raw)
To: Alex Bennée
Cc: kwolf, qemu-block, qemu-devel, mreitz, qemu-ppc, lersek, David Gibson
Alex Bennée <alex.bennee@linaro.org> writes:
> Markus Armbruster <armbru@redhat.com> writes:
>
>> Machine "ref405ep" maps its flash memory at address 2^32 - image size.
>> Image size is rounded up to the next multiple of 64KiB. Useless,
>> because pflash_cfi02_realize() fails with "failed to read the initial
>> flash content" unless the rounding is a no-op.
>>
>> If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then
>> other stuff. No idea how that would play out, but a useful outcomes
>> seem unlikely.
>>
>> Map the flash memory at fixed address 0xFFF80000 with size 512KiB,
>> regardless of image size, to match the physical hardware.
>>
>> Machine "taihu" maps its boot flash memory similarly. The code even
>> has a comment /* XXX: should check that size is 2MB */, followed by
>> disabled code to adjust the size to 2MiB regardless of image size.
>>
>> Its code to map its application flash memory looks the same, except
>> there the XXX comment asks for 32MiB, and the code to adjust the size
>> isn't disabled. Note that pflash_cfi02_realize() fails with "failed
>> to read the initial flash content" for images smaller than 32MiB.
>>
>> Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB,
>> to match the physical hardware. Delete dead code from application
>> flash mapping, and simplify some.
>
> It seems to me the DEBUG_BOARD_INIT code is probably out of date cruft
> that could be excised all together. But that doesn't stop this being
> useful:
David, would you like me to excise DEBUG_BOARD_INIT?
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Thanks!
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 07/11] ppc405_boards: Don't size flash memory to match backing image
2019-03-07 7:01 ` Markus Armbruster
@ 2019-03-08 4:39 ` David Gibson
2019-03-08 9:46 ` Markus Armbruster
0 siblings, 1 reply; 43+ messages in thread
From: David Gibson @ 2019-03-08 4:39 UTC (permalink / raw)
To: Markus Armbruster
Cc: Alex Bennée, kwolf, qemu-block, qemu-devel, mreitz,
qemu-ppc, lersek
[-- Attachment #1: Type: text/plain, Size: 1986 bytes --]
On Thu, Mar 07, 2019 at 08:01:35AM +0100, Markus Armbruster wrote:
> Alex Bennée <alex.bennee@linaro.org> writes:
>
> > Markus Armbruster <armbru@redhat.com> writes:
> >
> >> Machine "ref405ep" maps its flash memory at address 2^32 - image size.
> >> Image size is rounded up to the next multiple of 64KiB. Useless,
> >> because pflash_cfi02_realize() fails with "failed to read the initial
> >> flash content" unless the rounding is a no-op.
> >>
> >> If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then
> >> other stuff. No idea how that would play out, but a useful outcomes
> >> seem unlikely.
> >>
> >> Map the flash memory at fixed address 0xFFF80000 with size 512KiB,
> >> regardless of image size, to match the physical hardware.
> >>
> >> Machine "taihu" maps its boot flash memory similarly. The code even
> >> has a comment /* XXX: should check that size is 2MB */, followed by
> >> disabled code to adjust the size to 2MiB regardless of image size.
> >>
> >> Its code to map its application flash memory looks the same, except
> >> there the XXX comment asks for 32MiB, and the code to adjust the size
> >> isn't disabled. Note that pflash_cfi02_realize() fails with "failed
> >> to read the initial flash content" for images smaller than 32MiB.
> >>
> >> Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB,
> >> to match the physical hardware. Delete dead code from application
> >> flash mapping, and simplify some.
> >
> > It seems to me the DEBUG_BOARD_INIT code is probably out of date cruft
> > that could be excised all together. But that doesn't stop this being
> > useful:
>
> David, would you like me to excise DEBUG_BOARD_INIT?
If you have the chance to look at it, that would be great.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Qemu-devel] [PATCH v2 07/11] ppc405_boards: Don't size flash memory to match backing image
2019-03-08 4:39 ` David Gibson
@ 2019-03-08 9:46 ` Markus Armbruster
0 siblings, 0 replies; 43+ messages in thread
From: Markus Armbruster @ 2019-03-08 9:46 UTC (permalink / raw)
To: David Gibson
Cc: kwolf, qemu-block, lersek, qemu-devel, mreitz, qemu-ppc,
Alex Bennée
David Gibson <david@gibson.dropbear.id.au> writes:
> On Thu, Mar 07, 2019 at 08:01:35AM +0100, Markus Armbruster wrote:
>> Alex Bennée <alex.bennee@linaro.org> writes:
>>
>> > Markus Armbruster <armbru@redhat.com> writes:
>> >
>> >> Machine "ref405ep" maps its flash memory at address 2^32 - image size.
>> >> Image size is rounded up to the next multiple of 64KiB. Useless,
>> >> because pflash_cfi02_realize() fails with "failed to read the initial
>> >> flash content" unless the rounding is a no-op.
>> >>
>> >> If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then
>> >> other stuff. No idea how that would play out, but a useful outcomes
>> >> seem unlikely.
>> >>
>> >> Map the flash memory at fixed address 0xFFF80000 with size 512KiB,
>> >> regardless of image size, to match the physical hardware.
>> >>
>> >> Machine "taihu" maps its boot flash memory similarly. The code even
>> >> has a comment /* XXX: should check that size is 2MB */, followed by
>> >> disabled code to adjust the size to 2MiB regardless of image size.
>> >>
>> >> Its code to map its application flash memory looks the same, except
>> >> there the XXX comment asks for 32MiB, and the code to adjust the size
>> >> isn't disabled. Note that pflash_cfi02_realize() fails with "failed
>> >> to read the initial flash content" for images smaller than 32MiB.
>> >>
>> >> Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB,
>> >> to match the physical hardware. Delete dead code from application
>> >> flash mapping, and simplify some.
>> >
>> > It seems to me the DEBUG_BOARD_INIT code is probably out of date cruft
>> > that could be excised all together. But that doesn't stop this being
>> > useful:
>>
>> David, would you like me to excise DEBUG_BOARD_INIT?
>
> If you have the chance to look at it, that would be great.
Done in v4. Thanks!
^ permalink raw reply [flat|nested] 43+ messages in thread
end of thread, other threads:[~2019-03-08 9:47 UTC | newest]
Thread overview: 43+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-26 19:33 [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Markus Armbruster
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 01/11] pflash: Rename pflash_t to PFlashCFI01, PFlashCFI02 Markus Armbruster
2019-03-05 12:22 ` Philippe Mathieu-Daudé
2019-02-26 19:33 ` [Qemu-devel] [PATCH v2 02/11] pflash_cfi01: Do not exit() on guest aborting "write to buffer" Markus Armbruster
2019-02-26 23:59 ` Philippe Mathieu-Daudé
2019-02-27 11:09 ` Alex Bennée
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 03/11] pflash_cfi01: Log use of flawed " Markus Armbruster
2019-02-26 23:57 ` Philippe Mathieu-Daudé
2019-02-27 11:30 ` Alex Bennée
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 04/11] pflash: Rename *CFI_PFLASH* to *PFLASH_CFI* Markus Armbruster
2019-02-27 0:00 ` Philippe Mathieu-Daudé
2019-02-27 11:09 ` Alex Bennée
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 05/11] hw: Use PFLASH_CFI0{1, 2} and TYPE_PFLASH_CFI0{1, 2} Markus Armbruster
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 06/11] sam460ex: Don't size flash memory to match backing image Markus Armbruster
2019-02-26 22:30 ` BALATON Zoltan
2019-02-27 11:04 ` Alex Bennée
2019-03-05 19:12 ` Philippe Mathieu-Daudé
2019-03-05 22:49 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
2019-03-06 6:51 ` Markus Armbruster
2019-03-06 7:47 ` Philippe Mathieu-Daudé
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 07/11] ppc405_boards: " Markus Armbruster
2019-02-27 10:35 ` Alex Bennée
2019-03-07 7:01 ` Markus Armbruster
2019-03-08 4:39 ` David Gibson
2019-03-08 9:46 ` Markus Armbruster
2019-03-05 19:23 ` Philippe Mathieu-Daudé
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 08/11] r2d: Flash memory creation is confused about size, mark FIXME Markus Armbruster
2019-03-05 17:48 ` Philippe Mathieu-Daudé
2019-03-06 15:00 ` Markus Armbruster
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 09/11] mips_malta: Clean up definition of flash memory size somewhat Markus Armbruster
2019-02-27 11:28 ` Alex Bennée
2019-03-05 16:33 ` Philippe Mathieu-Daudé
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 10/11] pflash: Clean up after commit 368a354f02b part 1 Markus Armbruster
2019-03-05 13:29 ` Philippe Mathieu-Daudé
2019-02-26 19:34 ` [Qemu-devel] [PATCH v2 11/11] pflash: Clean up after commit 368a354f02b part 2 Markus Armbruster
2019-02-27 1:11 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
2019-02-27 6:57 ` Markus Armbruster
2019-03-05 13:55 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-03-05 16:42 ` Markus Armbruster
2019-03-05 17:54 ` Philippe Mathieu-Daudé
2019-02-26 19:56 ` [Qemu-devel] [PATCH v2 00/11] pflash: Fixes and cleanups Alex Bennée
2019-02-27 6:57 ` Markus Armbruster
2019-02-27 11:30 ` Alex Bennée
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