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From: Dmitry Osipenko <digetx@gmail.com>
To: Akhil R <akhilrajeev@nvidia.com>,
	devicetree@vger.kernel.org, dmaengine@vger.kernel.org,
	jonathanh@nvidia.com, kyarlagadda@nvidia.com,
	ldewangan@nvidia.com, linux-kernel@vger.kernel.org,
	linux-tegra@vger.kernel.org, p.zabel@pengutronix.de,
	rgumasta@nvidia.com, robh+dt@kernel.org,
	thierry.reding@gmail.com, vkoul@kernel.org
Cc: Pavan Kunapuli <pkunapuli@nvidia.com>
Subject: Re: [PATCH v17 2/4] dmaengine: tegra: Add tegra gpcdma driver
Date: Sun, 30 Jan 2022 13:33:51 +0300	[thread overview]
Message-ID: <f32e119a-1d08-d1f9-a264-fe004960e8bf@gmail.com> (raw)
In-Reply-To: <dcd4e4db-2999-15c9-0c82-42dd8ca1e61d@gmail.com>

30.01.2022 13:26, Dmitry Osipenko пишет:
> 30.01.2022 13:05, Dmitry Osipenko пишет:
>> Still nothing prevents interrupt handler to fire during the pause.
>>
>> What you actually need to do is to disable/enable interrupt. This will
>> prevent the interrupt racing and then pause/resume may look like this:
> 
> Although, seems this won't work, unfortunately. I see now that
> device_pause() doesn't have might_sleep().
> 

Ah, I see now that the pause/unpause is actually a separate control and
doesn't conflict with "start next transfer".

So you just need to set/unset the pause under lock. And don't touch
tdc->dma_desc. That's it.

static int tegra_dma_device_pause(struct dma_chan *dc)
{
	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
	unsigned long flags;
	u32 val;

	if (!tdc->tdma->chip_data->hw_support_pause)
		return -ENOSYS;

	spin_lock_irqsave(&tdc->vc.lock, flags);

	val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE);
	val |= TEGRA_GPCDMA_CHAN_CSRE_PAUSE;
	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);

	spin_unlock_irqrestore(&tdc->vc.lock, flags);

	return 0;
}

static int tegra_dma_device_resume(struct dma_chan *dc)
{
	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
	unsigned long flags;
	u32 val;

	if (!tdc->tdma->chip_data->hw_support_pause)
		return -ENOSYS;

	spin_lock_irqsave(&tdc->vc.lock, flags);

	val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE);
	val &= ~TEGRA_GPCDMA_CHAN_CSRE_PAUSE;
	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);

	spin_unlock_irqrestore(&tdc->vc.lock, flags);
	
	return 0;
}

  reply	other threads:[~2022-01-30 10:33 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-29 16:40 [PATCH v17 0/4] Add NVIDIA Tegra GPC-DMA driver Akhil R
2022-01-29 16:40 ` [PATCH v17 1/4] dt-bindings: dmaengine: Add doc for tegra gpcdma Akhil R
2022-01-29 16:40 ` [PATCH v17 2/4] dmaengine: tegra: Add tegra gpcdma driver Akhil R
2022-01-29 18:42   ` kernel test robot
2022-01-29 19:23   ` kernel test robot
2022-01-29 19:23     ` kernel test robot
2022-01-30 10:05   ` Dmitry Osipenko
2022-01-30 10:08     ` Dmitry Osipenko
2022-01-30 10:13       ` Dmitry Osipenko
2022-01-30 10:17         ` Dmitry Osipenko
2022-01-30 10:26     ` Dmitry Osipenko
2022-01-30 10:33       ` Dmitry Osipenko [this message]
2022-01-30 16:43         ` Akhil R
2022-01-30 23:23           ` Dmitry Osipenko
2022-01-30 16:34     ` Akhil R
2022-01-30 23:11       ` Dmitry Osipenko
2022-01-31  4:25         ` Akhil R
2022-01-31  6:42           ` Dmitry Osipenko
2022-01-31  9:09             ` Akhil R
2022-01-31  9:16               ` Dmitry Osipenko
2022-01-31 15:38                 ` Akhil R
2022-01-31 16:08                   ` Dmitry Osipenko
2022-02-01 12:05                     ` Akhil R
2022-02-01 13:06                       ` Dmitry Osipenko
2022-01-30 10:38   ` Dmitry Osipenko
2022-01-30 10:39   ` Dmitry Osipenko
2022-01-29 16:40 ` [PATCH v17 3/4] arm64: defconfig: tegra: Enable GPCDMA Akhil R
2022-01-29 16:40 ` [PATCH v17 4/4] arm64: tegra: Add GPCDMA node for tegra186 and tegra194 Akhil R

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