[PATCH 2/6] drm/radeon/kms: clean assigning HDMI blocks to encoders

[PATCH 2/6] drm/radeon/kms: clean assigning HDMI blocks to encoders

[Rafał Miłecki]

We almost always used first HDMI block for first encoder and second for sencod.
Exception was KLDSCP_LVTMA. Analyzing code picking DIG encoder shows the same
behaviour. It shows HDMI block are related to DIGs, which relation we now use.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
 drivers/gpu/drm/radeon/r600_audio.c      |   12 +++-
 drivers/gpu/drm/radeon/r600_hdmi.c       |  114 +++++++++++++-----------------
 drivers/gpu/drm/radeon/radeon.h          |    3 +-
 drivers/gpu/drm/radeon/radeon_encoders.c |   10 ++--
 4 files changed, 67 insertions(+), 72 deletions(-)

diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index db92801..2897bd7 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -224,8 +224,14 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
 	struct drm_device *dev = encoder->dev;
 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
 	int base_rate = 48000;
 
+	if (!dig) {
+		dev_err(rdev->dev, "Setting audio clock on non-dig encoder\n");
+		return;
+	}
+
 	switch (radeon_encoder->encoder_id) {
 	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
 	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
@@ -245,7 +251,7 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
 		return;
 	}
 
-	switch (r600_audio_tmds_index(encoder)) {
+	switch (dig->dig_encoder) {
 	case 0:
 		WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
 		WREG32(R600_AUDIO_PLL1_DIV, clock*100);
@@ -257,6 +263,10 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
 		WREG32(R600_AUDIO_PLL2_DIV, clock*100);
 		WREG32(R600_AUDIO_CLK_SRCSEL, 1);
 		break;
+	default:
+		dev_err(rdev->dev, "Unsupported DIG on encoder 0x%02X\n",
+			  radeon_encoder->encoder_id);
+		return;
 	}
 }
 
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 4d09973..5275a81 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -417,90 +417,74 @@ void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
 	WREG32_P(offset+R600_HDMI_CNTL, 0x04000000, ~0x04000000);
 }
 
-/*
- * enable/disable the HDMI engine
- */
-void r600_hdmi_enable(struct drm_encoder *encoder, int enable)
+static void r600_hdmi_assign_block(struct drm_encoder *encoder)
 {
 	struct drm_device *dev = encoder->dev;
 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-	uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
+	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
 
-	if (!offset)
+	if (!dig) {
+		dev_err(rdev->dev, "Enabling HDMI on non-dig encoder\n");
 		return;
+	}
 
-	DRM_DEBUG("%s HDMI interface @ 0x%04X\n", enable ? "Enabling" : "Disabling", offset);
-
-	/* some version of atombios ignore the enable HDMI flag
-	 * so enabling/disabling HDMI was moved here for TMDS1+2 */
-	switch (radeon_encoder->encoder_id) {
-	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
-		WREG32_P(AVIVO_TMDSA_CNTL, enable ? 0x4 : 0x0, ~0x4);
-		WREG32(offset+R600_HDMI_ENABLE, enable ? 0x101 : 0x0);
-		break;
-
-	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
-		WREG32_P(AVIVO_LVTMA_CNTL, enable ? 0x4 : 0x0, ~0x4);
-		WREG32(offset+R600_HDMI_ENABLE, enable ? 0x105 : 0x0);
-		break;
-
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
-	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
-		/* This part is doubtfull in my opinion */
-		WREG32(offset+R600_HDMI_ENABLE, enable ? 0x110 : 0x0);
-		break;
-
-	default:
-		DRM_ERROR("unknown HDMI output type\n");
-		break;
+	if (ASIC_IS_DCE4(rdev)) {
+		/* TODO */
+	} else if (ASIC_IS_DCE3(rdev)) {
+		radeon_encoder->hdmi_offset = dig->dig_encoder ?
+			R600_HDMI_BLOCK3 : R600_HDMI_BLOCK1;
+		if (ASIC_IS_DCE32(rdev))
+			radeon_encoder->hdmi_config_offset = dig->dig_encoder ?
+				R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1;
 	}
 }
 
 /*
- * determin at which register offset the HDMI encoder is
+ * enable the HDMI engine
  */
-void r600_hdmi_init(struct drm_encoder *encoder)
+void r600_hdmi_enable(struct drm_encoder *encoder)
 {
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 
-	switch (radeon_encoder->encoder_id) {
-	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
-		radeon_encoder->hdmi_offset = R600_HDMI_BLOCK1;
-		break;
-
-	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
-		switch (r600_audio_tmds_index(encoder)) {
-		case 0:
-			radeon_encoder->hdmi_offset = R600_HDMI_BLOCK1;
-			break;
-		case 1:
-			radeon_encoder->hdmi_offset = R600_HDMI_BLOCK2;
-			break;
-		default:
-			radeon_encoder->hdmi_offset = 0;
-			break;
+	if (!radeon_encoder->hdmi_offset) {
+		r600_hdmi_assign_block(encoder);
+		if (!radeon_encoder->hdmi_offset) {
+			dev_warn(rdev->dev, "Could not find HDMI block for "
+				"0x%x encoder\n", radeon_encoder->encoder_id);
+			return;
 		}
-	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
-		radeon_encoder->hdmi_offset = R600_HDMI_BLOCK2;
-		break;
+	}
 
-	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
-		radeon_encoder->hdmi_offset = R600_HDMI_BLOCK3;
-		break;
+	if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev))
+		WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0x1, ~0x1);
+
+	DRM_DEBUG("Enabling HDMI interface @ 0x%04X for encoder 0x%x\n",
+		radeon_encoder->hdmi_offset, radeon_encoder->encoder_id);
+}
 
-	default:
-		radeon_encoder->hdmi_offset = 0;
-		break;
+/*
+ * disable the HDMI engine
+ */
+void r600_hdmi_disable(struct drm_encoder *encoder)
+{
+	struct drm_device *dev = encoder->dev;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+
+	if (!radeon_encoder->hdmi_offset) {
+		dev_err(rdev->dev, "Disabling not enabled HDMI\n");
+		return;
 	}
 
-	DRM_DEBUG("using HDMI engine at offset 0x%04X for encoder 0x%x\n",
-		  radeon_encoder->hdmi_offset, radeon_encoder->encoder_id);
+	DRM_DEBUG("Disabling HDMI interface @ 0x%04X for encoder 0x%x\n",
+		radeon_encoder->hdmi_offset, radeon_encoder->encoder_id);
+
+	if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev))
+		WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0, ~0x1);
 
-	/* TODO: make this configureable */
-	radeon_encoder->hdmi_audio_workaround = 0;
+	radeon_encoder->hdmi_offset = 0;
+	radeon_encoder->hdmi_config_offset = 0;
 }
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 0d7caee..b54d4f3 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1323,7 +1323,8 @@ extern int r600_audio_tmds_index(struct drm_encoder *encoder);
 extern void r600_audio_set_clock(struct drm_encoder *encoder, int clock);
 extern void r600_audio_fini(struct radeon_device *rdev);
 extern void r600_hdmi_init(struct drm_encoder *encoder);
-extern void r600_hdmi_enable(struct drm_encoder *encoder, int enable);
+extern void r600_hdmi_enable(struct drm_encoder *encoder);
+extern void r600_hdmi_disable(struct drm_encoder *encoder);
 extern void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
 extern int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
 extern void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index bc926ea..7f43476 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -593,7 +593,6 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
 	}
 
 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
-	r600_hdmi_enable(encoder, hdmi_detected);
 }
 
 int
@@ -1396,9 +1395,10 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
 	}
 	atombios_apply_encoder_quirks(encoder, adjusted_mode);
 
-	/* XXX */
-	if (!ASIC_IS_DCE4(rdev))
+	if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) {
+		r600_hdmi_enable(encoder);
 		r600_hdmi_setmode(encoder, adjusted_mode);
+	}
 }
 
 static bool
@@ -1509,6 +1509,8 @@ static void radeon_atom_encoder_disable(struct drm_encoder *encoder)
 	radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 
 	if (radeon_encoder_is_digital(encoder)) {
+		if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI)
+			r600_hdmi_disable(encoder);
 		dig = radeon_encoder->enc_priv;
 		dig->dig_encoder = -1;
 	}
@@ -1659,6 +1661,4 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
 		drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
 		break;
 	}
-
-	r600_hdmi_init(encoder);
 }
-- 
1.6.4.2


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[PATCH 3/6] drm/radeon/kms: add HDMI code for pre-DCE3 R6xx GPUs

[Rafał Miłecki]

Older GPUs are little different, HDMI blocks are not hard-wired, but routable.
We should just find some free HDMI block and route it to choosen encoder. In
case of RS6x0 there is only one HDMI block, we don't enable HDMI on RS6x00 yet
however.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
 drivers/gpu/drm/radeon/r600_hdmi.c |   71 +++++++++++++++++++++++++++++++++++-
 1 files changed, 69 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 5275a81..8fbfc73 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -417,6 +417,39 @@ void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
 	WREG32_P(offset+R600_HDMI_CNTL, 0x04000000, ~0x04000000);
 }
 
+static int r600_hdmi_find_free_block(struct drm_device *dev)
+{
+	struct radeon_device *rdev = dev->dev_private;
+	struct drm_encoder *encoder;
+	struct radeon_encoder *radeon_encoder;
+	bool free_blocks[3] = { true, true, true };
+
+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+		radeon_encoder = to_radeon_encoder(encoder);
+		switch (radeon_encoder->hdmi_offset) {
+		case R600_HDMI_BLOCK1:
+			free_blocks[0] = false;
+			break;
+		case R600_HDMI_BLOCK2:
+			free_blocks[1] = false;
+			break;
+		case R600_HDMI_BLOCK3:
+			free_blocks[2] = false;
+			break;
+		}
+	}
+
+	if (rdev->family == CHIP_RS600 || rdev->family == CHIP_RS690) {
+		return free_blocks[0] ? R600_HDMI_BLOCK1 : 0;
+	} else if (rdev->family >= CHIP_R600) {
+		if (free_blocks[0])
+			return R600_HDMI_BLOCK1;
+		else if (free_blocks[1])
+			return R600_HDMI_BLOCK2;
+	}
+	return 0;
+}
+
 static void r600_hdmi_assign_block(struct drm_encoder *encoder)
 {
 	struct drm_device *dev = encoder->dev;
@@ -437,6 +470,8 @@ static void r600_hdmi_assign_block(struct drm_encoder *encoder)
 		if (ASIC_IS_DCE32(rdev))
 			radeon_encoder->hdmi_config_offset = dig->dig_encoder ?
 				R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1;
+	} else if (rdev->family >= CHIP_R600) {
+		radeon_encoder->hdmi_offset = r600_hdmi_find_free_block(dev);
 	}
 }
 
@@ -458,8 +493,24 @@ void r600_hdmi_enable(struct drm_encoder *encoder)
 		}
 	}
 
-	if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev))
+	if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev)) {
 		WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0x1, ~0x1);
+	} else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) {
+		int offset = radeon_encoder->hdmi_offset;
+		switch (radeon_encoder->encoder_id) {
+		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+			WREG32_P(AVIVO_TMDSA_CNTL, 0x4, ~0x4);
+			WREG32(offset + R600_HDMI_ENABLE, 0x101);
+			break;
+		case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+			WREG32_P(AVIVO_LVTMA_CNTL, 0x4, ~0x4);
+			WREG32(offset + R600_HDMI_ENABLE, 0x105);
+			break;
+		default:
+			dev_err(rdev->dev, "Unknown HDMI output type\n");
+			break;
+		}
+	}
 
 	DRM_DEBUG("Enabling HDMI interface @ 0x%04X for encoder 0x%x\n",
 		radeon_encoder->hdmi_offset, radeon_encoder->encoder_id);
@@ -482,8 +533,24 @@ void r600_hdmi_disable(struct drm_encoder *encoder)
 	DRM_DEBUG("Disabling HDMI interface @ 0x%04X for encoder 0x%x\n",
 		radeon_encoder->hdmi_offset, radeon_encoder->encoder_id);
 
-	if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev))
+	if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev)) {
 		WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0, ~0x1);
+	} else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) {
+		int offset = radeon_encoder->hdmi_offset;
+		switch (radeon_encoder->encoder_id) {
+		case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
+			WREG32_P(AVIVO_TMDSA_CNTL, 0, ~0x4);
+			WREG32(offset + R600_HDMI_ENABLE, 0);
+			break;
+		case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
+			WREG32_P(AVIVO_LVTMA_CNTL, 0, ~0x4);
+			WREG32(offset + R600_HDMI_ENABLE, 0);
+			break;
+		default:
+			dev_err(rdev->dev, "Unknown HDMI output type\n");
+			break;
+		}
+	}
 
 	radeon_encoder->hdmi_offset = 0;
 	radeon_encoder->hdmi_config_offset = 0;
-- 
1.6.4.2


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Re: [PATCH 2/6] drm/radeon/kms: clean assigning HDMI blocks to encoders

[Christian König]

Am Samstag, den 06.03.2010, 14:03 +0100 schrieb Rafał Miłecki:
> +	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
>  	int base_rate = 48000;
>  
> +	if (!dig) {
> +		dev_err(rdev->dev, "Setting audio clock on non-dig encoder\n");
> +		return;
> +	}
> +
... 
> -	switch (r600_audio_tmds_index(encoder)) {
> +	switch (dig->dig_encoder) {
>  	case 0:
>  		WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
>  		WREG32(R600_AUDIO_PLL1_DIV, clock*100);
....
>  		WREG32(R600_AUDIO_PLL2_DIV, clock*100);
>  		WREG32(R600_AUDIO_CLK_SRCSEL, 1);
>  		break;
> +	default:
> +		dev_err(rdev->dev, "Unsupported DIG on encoder 0x%02X\n",
> +			  radeon_encoder->encoder_id);
> +		return;
I know that I made the suggestion to code it like this, but now I'm
thinking that we should make it depend on the hdmi_offset instead of the
dig_encoder number. First I'm not sure that radeon_encoder->enc_priv
will always point to a radeon_encoder_atom_dig structure, and second I
think the possibility of rerouting the signals on pre DCE3 makes this
decision depend on the wrong index.

Currently checking this out on my hardware, so stay tuned for an update.

Regards,
Christian.


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Re: [PATCH 0/6] HDMI clean & DCE32 support

[Mike Lothian]

2010/3/6 Rafał Miłecki <zajec5@gmail.com>:
> This patchset cleans our HDMI code and adds support for DCE32.
>
> It was tested on:
> 1) RV620 with HDMI - no regressions
> 2) RV635 with 2 DVI - no regressions
> 3) RV730 with HDMI - made it work
>
> Would be more than great if we still could get this for 2.6.34.
>
> I could not do this work without help from Christian and Alex, so big thanks
> for them :)
>
> Rafał Miłecki (6):
>  drm/radeon/kms: clear HDMI definitions
>  drm/radeon/kms: clean assigning HDMI blocks to encoders
>  drm/radeon/kms: add HDMI code for pre-DCE3 R6xx GPUs
>  drm/radeon/kms: enable audio engine on DCE32
>  drm/radeon/kms: remove dead audio/HDMI code
>  drm/radeon/kms: improve coding style a little
>
>  drivers/gpu/drm/radeon/r600_audio.c      |   57 +++-------
>  drivers/gpu/drm/radeon/r600_hdmi.c       |  191 +++++++++++++++++++-----------
>  drivers/gpu/drm/radeon/r600_reg.h        |   10 +-
>  drivers/gpu/drm/radeon/radeon.h          |    3 +-
>  drivers/gpu/drm/radeon/radeon_encoders.c |   10 +-
>  drivers/gpu/drm/radeon/radeon_mode.h     |    1 +
>  drivers/gpu/drm/radeon/rv770.c           |   15 +++
>  7 files changed, 166 insertions(+), 121 deletions(-)
>
>

Hi Rafal

What kernel do these patches apply cleanly to? Or equally is there a
git tree I could pull somewhere?

Cheers

Mike

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Re: [PATCH 2/6] drm/radeon/kms: clean assigning HDMI blocks to encoders

[Rafał Miłecki]

W dniu 6 marca 2010 17:26 użytkownik Christian König
<deathsimple@vodafone.de> napisał:
> Am Samstag, den 06.03.2010, 14:03 +0100 schrieb Rafał Miłecki:
>> +     struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
>>       int base_rate = 48000;
>>
>> +     if (!dig) {
>> +             dev_err(rdev->dev, "Setting audio clock on non-dig encoder\n");
>> +             return;
>> +     }
>> +
> ...
>> -     switch (r600_audio_tmds_index(encoder)) {
>> +     switch (dig->dig_encoder) {
>>       case 0:
>>               WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
>>               WREG32(R600_AUDIO_PLL1_DIV, clock*100);
> ....
>>               WREG32(R600_AUDIO_PLL2_DIV, clock*100);
>>               WREG32(R600_AUDIO_CLK_SRCSEL, 1);
>>               break;
>> +     default:
>> +             dev_err(rdev->dev, "Unsupported DIG on encoder 0x%02X\n",
>> +                       radeon_encoder->encoder_id);
>> +             return;
> I know that I made the suggestion to code it like this, but now I'm
> thinking that we should make it depend on the hdmi_offset instead of the
> dig_encoder number. First I'm not sure that radeon_encoder->enc_priv
> will always point to a radeon_encoder_atom_dig structure, and second I
> think the possibility of rerouting the signals on pre DCE3 makes this
> decision depend on the wrong index.

Not sure about dig pointer... I think it should be always available.
But indeed it can be wrong for pre-DCE3. Thanks for pointing.

-- 
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Re: [PATCH 0/6] HDMI clean & DCE32 support

[Rafał Miłecki]

2010/3/6 Mike Lothian <mike@fireburn.co.uk>:
> 2010/3/6 Rafał Miłecki <zajec5@gmail.com>:
>> This patchset cleans our HDMI code and adds support for DCE32.
>>
>> It was tested on:
>> 1) RV620 with HDMI - no regressions
>> 2) RV635 with 2 DVI - no regressions
>> 3) RV730 with HDMI - made it work
>>
>> Would be more than great if we still could get this for 2.6.34.
>>
>> I could not do this work without help from Christian and Alex, so big thanks
>> for them :)
>>
>> Rafał Miłecki (6):
>>  drm/radeon/kms: clear HDMI definitions
>>  drm/radeon/kms: clean assigning HDMI blocks to encoders
>>  drm/radeon/kms: add HDMI code for pre-DCE3 R6xx GPUs
>>  drm/radeon/kms: enable audio engine on DCE32
>>  drm/radeon/kms: remove dead audio/HDMI code
>>  drm/radeon/kms: improve coding style a little
>>
>>  drivers/gpu/drm/radeon/r600_audio.c      |   57 +++-------
>>  drivers/gpu/drm/radeon/r600_hdmi.c       |  191 +++++++++++++++++++-----------
>>  drivers/gpu/drm/radeon/r600_reg.h        |   10 +-
>>  drivers/gpu/drm/radeon/radeon.h          |    3 +-
>>  drivers/gpu/drm/radeon/radeon_encoders.c |   10 +-
>>  drivers/gpu/drm/radeon/radeon_mode.h     |    1 +
>>  drivers/gpu/drm/radeon/rv770.c           |   15 +++
>>  7 files changed, 166 insertions(+), 121 deletions(-)
>>
>>
>
> Hi Rafal
>
> What kernel do these patches apply cleanly to? Or equally is there a
> git tree I could pull somewhere?

I do not have own tree, I based patches on drm-linus.

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Re: [PATCH 0/6] HDMI clean & DCE32 support

[Mike Lothian]

On 6 March 2010 16:49, Rafał Miłecki <zajec5@gmail.com> wrote:
> 2010/3/6 Mike Lothian <mike@fireburn.co.uk>:
>> 2010/3/6 Rafał Miłecki <zajec5@gmail.com>:
>>> This patchset cleans our HDMI code and adds support for DCE32.
>>>
>>> It was tested on:
>>> 1) RV620 with HDMI - no regressions
>>> 2) RV635 with 2 DVI - no regressions
>>> 3) RV730 with HDMI - made it work
>>>
>>> Would be more than great if we still could get this for 2.6.34.
>>>
>>> I could not do this work without help from Christian and Alex, so big thanks
>>> for them :)
>>>
>>> Rafał Miłecki (6):
>>>  drm/radeon/kms: clear HDMI definitions
>>>  drm/radeon/kms: clean assigning HDMI blocks to encoders
>>>  drm/radeon/kms: add HDMI code for pre-DCE3 R6xx GPUs
>>>  drm/radeon/kms: enable audio engine on DCE32
>>>  drm/radeon/kms: remove dead audio/HDMI code
>>>  drm/radeon/kms: improve coding style a little
>>>
>>>  drivers/gpu/drm/radeon/r600_audio.c      |   57 +++-------
>>>  drivers/gpu/drm/radeon/r600_hdmi.c       |  191 +++++++++++++++++++-----------
>>>  drivers/gpu/drm/radeon/r600_reg.h        |   10 +-
>>>  drivers/gpu/drm/radeon/radeon.h          |    3 +-
>>>  drivers/gpu/drm/radeon/radeon_encoders.c |   10 +-
>>>  drivers/gpu/drm/radeon/radeon_mode.h     |    1 +
>>>  drivers/gpu/drm/radeon/rv770.c           |   15 +++
>>>  7 files changed, 166 insertions(+), 121 deletions(-)
>>>
>>>
>>
>> Hi Rafal
>>
>> What kernel do these patches apply cleanly to? Or equally is there a
>> git tree I could pull somewhere?
>
> I do not have own tree, I based patches on drm-linus.
>
> --
> Rafał
>
Apologies I'm not used to patches

I used git apply on the drm-radeon-testing branch with the
--ignore-whitespace option and it compiled cleanly

Not only that I have audio working on my system :-D

Thanks for all your hard work in this area it really is appreciated

If you're ever in Edinburgh I'll happily take you out for a night of
drinking and merriment

Cheers

Mike

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Re: [PATCH 2/6] drm/radeon/kms: clean assigning HDMI blocks to encoders

[Christian König]

Am Samstag, den 06.03.2010, 17:26 +0100 schrieb Christian König:
> Currently checking this out on my hardware, so stay tuned for an update.
I double checked this, and using dig_encoder as the index for the clock
source selection is indeed the right thing to do. Sound is working
flawlessly on both connectors of my RV630, even if I switch the HDMI
block assignment so the second gets used first. I could also test a
RV710 and RS780 next week if this is still necessary, but at least I
have no more objections in committing this code.

While at it I found something interesting, when I enabled the HDMI block
for the first time after an reboot I get an "Unhandled interrupt: 21":

[   74.076287] [drm:r600_hdmi_enable], Enabling HDMI interface @ 0x7700 for encoder 0xf
[   74.076297] [drm:r600_hdmi_calc_CTS], Using ACR timing N=4096 CTS=74250 for frequency 32000
[   74.076304] [drm:r600_hdmi_calc_CTS], Using ACR timing N=6272 CTS=82500 for frequency 44100
[   74.076311] [drm:r600_hdmi_calc_CTS], Using ACR timing N=6144 CTS=74250 for frequency 48000
[   74.076340] [drm:r600_irq_process], Unhandled interrupt: 21 5

[  143.532481] [drm:r600_hdmi_enable], Enabling HDMI interface @ 0x7400 for encoder 0x13
[  143.532491] [drm:r600_hdmi_calc_CTS], Using ACR timing N=4096 CTS=74250 for frequency 32000
[  143.532498] [drm:r600_hdmi_calc_CTS], Using ACR timing N=6272 CTS=82500 for frequency 44100
[  143.532504] [drm:r600_hdmi_calc_CTS], Using ACR timing N=6144 CTS=74250 for frequency 48000
[  143.532526] [drm:r600_irq_process], r600_irq_process start: rptr 48, wptr 64
[  143.532535] [drm:r600_irq_process], Unhandled interrupt: 21 4

This looks like the right place to start if we want to get rid of the
polling timer for the audio codec.

Christian.


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Re: [PATCH 0/6] HDMI clean & DCE32 support

[Mike Lothian]

2010/3/6 Rafał Miłecki <zajec5@gmail.com>:
> This patchset cleans our HDMI code and adds support for DCE32.
>
> It was tested on:
> 1) RV620 with HDMI - no regressions
> 2) RV635 with 2 DVI - no regressions
> 3) RV730 with HDMI - made it work
>
> Would be more than great if we still could get this for 2.6.34.
>
> I could not do this work without help from Christian and Alex, so big thanks
> for them :)
>
> Rafał Miłecki (6):
>  drm/radeon/kms: clear HDMI definitions
>  drm/radeon/kms: clean assigning HDMI blocks to encoders
>  drm/radeon/kms: add HDMI code for pre-DCE3 R6xx GPUs
>  drm/radeon/kms: enable audio engine on DCE32
>  drm/radeon/kms: remove dead audio/HDMI code
>  drm/radeon/kms: improve coding style a little
>
>  drivers/gpu/drm/radeon/r600_audio.c      |   57 +++-------
>  drivers/gpu/drm/radeon/r600_hdmi.c       |  191 +++++++++++++++++++-----------
>  drivers/gpu/drm/radeon/r600_reg.h        |   10 +-
>  drivers/gpu/drm/radeon/radeon.h          |    3 +-
>  drivers/gpu/drm/radeon/radeon_encoders.c |   10 +-
>  drivers/gpu/drm/radeon/radeon_mode.h     |    1 +
>  drivers/gpu/drm/radeon/rv770.c           |   15 +++
>  7 files changed, 166 insertions(+), 121 deletions(-)
>
>

Is there any chance we could get these updates included in the
drm-radeon-testing branch?

Cheers

Mike

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Re: [PATCH 0/6] HDMI clean & DCE32 support

[Dave Airlie]

On Fri, Mar 19, 2010 at 10:14 AM, Mike Lothian <mike@fireburn.co.uk> wrote:
> 2010/3/6 Rafał Miłecki <zajec5@gmail.com>:
>> This patchset cleans our HDMI code and adds support for DCE32.
>>
>> It was tested on:
>> 1) RV620 with HDMI - no regressions
>> 2) RV635 with 2 DVI - no regressions
>> 3) RV730 with HDMI - made it work
>>
>> Would be more than great if we still could get this for 2.6.34.
>>
>> I could not do this work without help from Christian and Alex, so big thanks
>> for them :)
>>
>> Rafał Miłecki (6):
>>  drm/radeon/kms: clear HDMI definitions
>>  drm/radeon/kms: clean assigning HDMI blocks to encoders
>>  drm/radeon/kms: add HDMI code for pre-DCE3 R6xx GPUs
>>  drm/radeon/kms: enable audio engine on DCE32
>>  drm/radeon/kms: remove dead audio/HDMI code
>>  drm/radeon/kms: improve coding style a little
>>
>>  drivers/gpu/drm/radeon/r600_audio.c      |   57 +++-------
>>  drivers/gpu/drm/radeon/r600_hdmi.c       |  191 +++++++++++++++++++-----------
>>  drivers/gpu/drm/radeon/r600_reg.h        |   10 +-
>>  drivers/gpu/drm/radeon/radeon.h          |    3 +-
>>  drivers/gpu/drm/radeon/radeon_encoders.c |   10 +-
>>  drivers/gpu/drm/radeon/radeon_mode.h     |    1 +
>>  drivers/gpu/drm/radeon/rv770.c           |   15 +++
>>  7 files changed, 166 insertions(+), 121 deletions(-)
>>
>>
>
> Is there any chance we could get these updates included in the
> drm-radeon-testing branch?
>

Should all be in there for a week or so.

Dave.

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Re: [PATCH 0/6] HDMI clean & DCE32 support

[Christian König]

Am Freitag, den 19.03.2010, 10:36 +1000 schrieb Dave Airlie:
> On Fri, Mar 19, 2010 at 10:14 AM, Mike Lothian <mike@fireburn.co.uk> wrote:
> > Is there any chance we could get these updates included in the
> > drm-radeon-testing branch?
> >
> 
> Should all be in there for a week or so.

I can confirm that's working very well, even on my RV710.

And having a nearly standard ubuntu karmic (the kernel is self compiled,
and xorg, mesa etc... updated) on an usb stick with KMS, multihead, HDMI
audio and accelerated 3D working flawlessly is definitely a big step
forward.

Regards,
Christian.


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