* [PATCH 0/5] New mux code for 34xx
@ 2009-10-29 20:35 Tony Lindgren
2009-10-29 20:36 ` [PATCH 1/5] omap2: mux: intoduce omap_mux_{read,write} Tony Lindgren
` (6 more replies)
0 siblings, 7 replies; 23+ messages in thread
From: Tony Lindgren @ 2009-10-29 20:35 UTC (permalink / raw)
To: linux-omap; +Cc: mike.rapoport
Hi all,
Here's an initial version of the new mux code to play with.
Big thanks to Paul & Benoit for the 34xx mux data!
To try out the new code, compile a kernel with CONFIG_OMAP_MUX
and CONFIG_DEBUG_FS and these patches. The series is also
availabe in the l-o git in mux branch.
To see the mux configuration on your board:
# mount -t debugfs debugfs /sys/kernel/debug
# cat /sys/kernel/debug/omap_mux | less
OMAP3_MUX(CAM_D0, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABLE
| OMAP_MUX_MODE4, 0),
padconf: cam_d0 signal: gpio_99: offset: 0x0e6 value: 0x4104
m0: cam_d0 m1: m2: m3:
m4: gpio_99 m5: m6: m7: safe_mode
phys: 0x48002116 ball bottom: ag17 ball top:
OMAP3_MUX(CAM_D10, OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE | OMAP_MUX_MODE7, 0),
padconf: cam_d10 signal: safe_mode: offset: 0x0fa value: 0x0007
m0: cam_d10 m1: m2: m3:
m4: gpio_109 m5: m6: m7: safe_mode
phys: 0x4800212a ball bottom: b25 ball top:
...
Then to produce a list of board mux entries from a working
system, do:
# cat /sys/kernel/debug/omap_mux | grep OMAP3_MUX
OMAP3_MUX(CAM_D0, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABLE
| OMAP_MUX_MODE4, 0),
OMAP3_MUX(CAM_D10, OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE | OMAP_MUX_MODE7, 0),
OMAP3_MUX(CAM_D11, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABL
E | OMAP_MUX_MODE4, 0),
OMAP3_MUX(CAM_D1, OMAP_PIN_INPUT | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_NONE | O
MAP_PIN_OFF_WAKEUPENABLE | OMAP_MUX_MODE4, 0),
...
Currenly no write support to tweak the pins via debugfs,
but I'll add that soon with command line support too.
I have not really verified the data yet, but it mostly looks
right. Adding support for 3630 and omap4 should be easy
after generating the data. It's currently implemented only
for 34xx.
I guess the next step would be to convert all omap3 calls
to omap_cfg_reg() to use omap_mux_set() instead with the
new data and make sure things work. Then we can remove the
old data for 34xx.
Comments welcome as always.
Regards,
Tony
---
Mike Rapoport (1):
omap2: mux: intoduce omap_mux_{read,write}
Tony Lindgren (4):
omap: mux: Add debugfs support for new mux code
omap: mux: Add new style init functions to omap3 board-*.c files
omap: mux: Add new style pin multiplexing data for 34xx
omap: mux: Add new style pin multiplexing code for omap3
arch/arm/mach-omap2/Makefile | 4
arch/arm/mach-omap2/board-3430sdp.c | 9
arch/arm/mach-omap2/board-cm-t35.c | 9
arch/arm/mach-omap2/board-ldp.c | 9
arch/arm/mach-omap2/board-omap3beagle.c | 9
arch/arm/mach-omap2/board-omap3evm.c | 9
arch/arm/mach-omap2/board-omap3pandora.c | 9
arch/arm/mach-omap2/board-overo.c | 8
arch/arm/mach-omap2/board-rx51.c | 10
arch/arm/mach-omap2/board-zoom2.c | 8
arch/arm/mach-omap2/mux.c | 424 ++++++++
arch/arm/mach-omap2/mux.h | 127 ++
arch/arm/mach-omap2/mux34xx.c | 1552 ++++++++++++++++++++++++++++++
arch/arm/mach-omap2/mux34xx.h | 352 +++++++
14 files changed, 2533 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/mach-omap2/mux.h
create mode 100644 arch/arm/mach-omap2/mux34xx.c
create mode 100644 arch/arm/mach-omap2/mux34xx.h
--
Signature
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 1/5] omap2: mux: intoduce omap_mux_{read,write}
2009-10-29 20:35 [PATCH 0/5] New mux code for 34xx Tony Lindgren
@ 2009-10-29 20:36 ` Tony Lindgren
2009-10-29 20:36 ` [PATCH 2/5] omap: mux: Add new style pin multiplexing code for omap3 Tony Lindgren
` (5 subsequent siblings)
6 siblings, 0 replies; 23+ messages in thread
From: Tony Lindgren @ 2009-10-29 20:36 UTC (permalink / raw)
To: linux-omap; +Cc: mike.rapoport, Mike Rapoport
From: Mike Rapoport <mike@compulab.co.il>
intoduce omap_mux_{read,write}
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/mux.c | 44 ++++++++++++++++++++++++++++++++++++++------
1 files changed, 38 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 32c953e..9841423 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -35,7 +35,27 @@
#ifdef CONFIG_OMAP_MUX
+#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
+#define OMAP_MUX_BASE_SZ 0x5ca
+
static struct omap_mux_cfg arch_mux_cfg;
+static void __iomem *mux_base;
+
+static inline u16 omap_mux_read(u16 reg)
+{
+ if (cpu_is_omap24xx())
+ return __raw_readb(mux_base + reg);
+ else
+ return __raw_readw(mux_base + reg);
+}
+
+static inline void omap_mux_write(u16 val, u16 reg)
+{
+ if (cpu_is_omap24xx())
+ __raw_writeb(val, mux_base + reg);
+ else
+ __raw_writew(val, mux_base + reg);
+}
/* NOTE: See mux.h for the enumeration */
@@ -566,10 +586,7 @@ static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 r
u16 orig;
u8 warn = 0, debug = 0;
- if (cpu_is_omap24xx())
- orig = omap_ctrl_readb(cfg->mux_reg);
- else
- orig = omap_ctrl_readw(cfg->mux_reg);
+ orig = omap_mux_read(cfg->mux_reg - OMAP_MUX_BASE_OFFSET);
#ifdef CONFIG_OMAP_MUX_DEBUG
debug = cfg->debug;
@@ -599,7 +616,7 @@ static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
if (cfg->pu_pd_val)
reg |= OMAP2_PULL_UP;
omap2_cfg_debug(cfg, reg);
- omap_ctrl_writeb(reg, cfg->mux_reg);
+ omap_mux_write(reg, cfg->mux_reg - OMAP_MUX_BASE_OFFSET);
spin_unlock_irqrestore(&mux_spin_lock, flags);
return 0;
@@ -618,7 +635,7 @@ static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
spin_lock_irqsave(&mux_spin_lock, flags);
reg |= cfg->mux_val;
omap2_cfg_debug(cfg, reg);
- omap_ctrl_writew(reg, cfg->mux_reg);
+ omap_mux_write(reg, cfg->mux_reg - OMAP_MUX_BASE_OFFSET);
spin_unlock_irqrestore(&mux_spin_lock, flags);
return 0;
@@ -629,6 +646,21 @@ static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
int __init omap2_mux_init(void)
{
+ u32 mux_pbase;
+
+ if (cpu_is_omap2420())
+ mux_pbase = OMAP2420_CTRL_BASE + OMAP_MUX_BASE_OFFSET;
+ else if (cpu_is_omap2430())
+ mux_pbase = OMAP243X_CTRL_BASE + OMAP_MUX_BASE_OFFSET;
+ else if (cpu_is_omap34xx())
+ mux_pbase = OMAP343X_CTRL_BASE + OMAP_MUX_BASE_OFFSET;
+
+ mux_base = ioremap(mux_pbase, OMAP_MUX_BASE_SZ);
+ if (!mux_base) {
+ printk(KERN_ERR "mux: Could not ioremap\n");
+ return -ENODEV;
+ }
+
if (cpu_is_omap24xx()) {
arch_mux_cfg.pins = omap24xx_pins;
arch_mux_cfg.size = OMAP24XX_PINS_SZ;
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 2/5] omap: mux: Add new style pin multiplexing code for omap3
2009-10-29 20:35 [PATCH 0/5] New mux code for 34xx Tony Lindgren
2009-10-29 20:36 ` [PATCH 1/5] omap2: mux: intoduce omap_mux_{read,write} Tony Lindgren
@ 2009-10-29 20:36 ` Tony Lindgren
2009-11-01 10:30 ` Mike Rapoport
2009-10-29 20:36 ` [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx Tony Lindgren
` (4 subsequent siblings)
6 siblings, 1 reply; 23+ messages in thread
From: Tony Lindgren @ 2009-10-29 20:36 UTC (permalink / raw)
To: linux-omap; +Cc: mike.rapoport
Initially only for 34xx. Keep the old code working
until the data has been converted to the new style
format.
REVISIT: Add support for cmdline parsing
REVISIT: Add a function to get mux register by GPIO pin
REVISIT: Add a function to set an array of mux entries
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/mux.c | 237 +++++++++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/mux.h | 125 ++++++++++++++++++++++++
2 files changed, 362 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/mux.h
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 9841423..45e6d4d 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -27,12 +27,15 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/spinlock.h>
+#include <linux/list.h>
#include <asm/system.h>
#include <plat/control.h>
#include <plat/mux.h>
+#include "mux.h"
+
#ifdef CONFIG_OMAP_MUX
#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
@@ -626,6 +629,11 @@ static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
#endif
#ifdef CONFIG_ARCH_OMAP34XX
+
+/*
+ * NOTE: This function will disappear soon, please use the new
+ * omap_mux_set() instead
+ */
static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
{
static DEFINE_SPINLOCK(mux_spin_lock);
@@ -644,6 +652,235 @@ static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
#define omap34xx_cfg_reg NULL
#endif
+/*----------------------------------------------------------------------------*/
+
+#ifdef CONFIG_ARCH_OMAP34XX
+
+static LIST_HEAD(muxmodes);
+static DEFINE_MUTEX(muxmode_mutex);
+
+/*
+ * REVISIT: See if pin is set dynamic, and add it to the list
+ */
+int omap_mux_set(u16 val, u16 mux_offset, int flags)
+{
+ omap_mux_write(val, mux_offset);
+
+ return 0;
+}
+
+struct omap_mux_entry {
+ struct omap_mux mux;
+ struct list_head node;
+};
+
+static struct omap_mux *omap_mux_list_add(struct omap_mux *src)
+{
+ struct omap_mux_entry *entry;
+ struct omap_mux *m;
+
+ int i;
+
+ entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL);
+ if (!entry)
+ return NULL;
+
+ m = &entry->mux;
+ memcpy(m, src, sizeof(struct omap_mux_entry));
+
+#ifdef CONFIG_DEBUG_FS
+ for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
+ if (src->muxnames[i]) {
+ m->muxnames[i] =
+ kzalloc(strlen(src->muxnames[i]) + 1,
+ GFP_KERNEL);
+ if (!m->muxnames[i])
+ goto free_names;
+ strcpy(m->muxnames[i], src->muxnames[i]);
+ }
+ }
+ for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
+ if (src->balls[i]) {
+ m->balls[i] =
+ kzalloc(strlen(src->balls[i]) + 1,
+ GFP_KERNEL);
+ if (!m->balls[i])
+ goto free_balls;
+ strcpy(m->balls[i], src->balls[i]);
+ }
+ }
+#endif
+
+ mutex_lock(&muxmode_mutex);
+ list_add(&entry->node, &muxmodes);
+ mutex_unlock(&muxmode_mutex);
+
+ return m;
+
+#ifdef CONFIG_DEBUG_FS
+free_balls:
+ for (i = 0; i < OMAP_MUX_NR_SIDES; i++)
+ if (m->balls[i])
+ kfree(m->balls[i]);
+free_names:
+ for (i = 0; i < OMAP_MUX_NR_MODES; i++)
+ if (m->muxnames[i])
+ kfree(m->muxnames[i]);
+#endif
+
+ kfree(entry);
+
+ return NULL;
+}
+
+static void __init omap_mux_apply_subset(struct omap_mux *p,
+ struct omap_mux *superset)
+{
+ while (p->reg_offset != OMAP_MUX_TERMINATOR) {
+ struct omap_mux *s = superset;
+ int found = 0;
+
+ while (s->reg_offset != OMAP_MUX_TERMINATOR) {
+ if (s->reg_offset == p->reg_offset) {
+ *s = *p;
+ found++;
+ break;
+ }
+ s++;
+ }
+ if (!found)
+ printk(KERN_ERR "mux: Unknown entry offset 0x%x\n",
+ p->reg_offset);
+ p++;
+ }
+}
+
+#ifdef CONFIG_DEBUG_FS
+
+static void __init omap_mux_apply_pins(struct omap_ball *b,
+ struct omap_mux *superset)
+{
+ while (b->reg_offset != OMAP_MUX_TERMINATOR) {
+ struct omap_mux *s = superset;
+ int found = 0;
+
+ while (s->reg_offset != OMAP_MUX_TERMINATOR) {
+ if (s->reg_offset == b->reg_offset) {
+ s->balls[0] = b->balls[0];
+ s->balls[1] = b->balls[1];
+ found++;
+ break;
+ }
+ s++;
+ }
+ if (!found)
+ printk(KERN_ERR "mux: Unknown ball offset 0x%x\n",
+ b->reg_offset);
+ b++;
+ }
+}
+
+#else /* CONFIG_DEBUG_FS */
+
+static inline void omap_mux_apply_pins(struct omap_ball *b,
+ struct omap_mux *superset)
+{
+}
+
+#endif /* CONFIG_DEBUG_FS */
+
+static void __init omap_mux_set_board(struct omap_board_mux *board)
+{
+ while (board->reg_offset != OMAP_MUX_TERMINATOR) {
+ omap_mux_write(board->value, board->reg_offset);
+ board++;
+ }
+}
+
+static void __init omap_mux_init_dynamic(struct omap_board_mux *board_subset,
+ struct omap_mux *superset,
+ int flags)
+{
+ struct omap_mux *s = superset;
+ int always_dynamic = flags & OMAP_MUX_ALL_DYNAMIC;
+
+ while (s->reg_offset != OMAP_MUX_TERMINATOR) {
+ struct omap_mux *entry;
+
+ if (!always_dynamic) {
+ u16 mode;
+
+ /* GPIO pins must be always dynamic for PM */
+ mode = omap_mux_read(s->reg_offset) & 0x7;
+ if (mode != OMAP_MUX_MODE4)
+ continue;
+ }
+
+ entry = omap_mux_list_add(s);
+ if (!entry) {
+ printk(KERN_ERR "mux: Could not add entry\n");
+ return;
+ }
+ s++;
+ }
+
+ if (always_dynamic)
+ return;
+
+ /* Search for pins set as dynamic in the board-*.c file */
+ while (board_subset->reg_offset != OMAP_MUX_TERMINATOR) {
+
+ /* GPIO pins are always dynamic, and already handled */
+ if ((board_subset->value & 0x7) == OMAP_MUX_MODE4)
+ continue;
+
+ if (!(board_subset->flags & OMAP_MUX_DYNAMIC))
+ continue;
+
+ s = superset;
+ while (s->reg_offset != OMAP_MUX_TERMINATOR) {
+ if (s->reg_offset == board_subset->reg_offset) {
+ struct omap_mux *entry = omap_mux_list_add(s);
+ if (!entry) {
+ printk(KERN_ERR "mux: Could not add "
+ "board entry\n");
+ return;
+ }
+ }
+ s++;
+ }
+ board_subset++;
+ }
+}
+
+/*
+ * Do not call this from board-*.c files, use omap3_mux_init() instead
+ */
+int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
+ struct omap_mux *superset,
+ struct omap_mux *package_subset,
+ struct omap_board_mux *board_subset,
+ struct omap_ball *package_balls,
+ int flags)
+{
+ /*
+ * REVISIT: Do the ioremap with mux_pbase here once after the old
+ * code is gone
+ * REVISIT: Do not initialize again if already called
+ */
+
+ omap_mux_apply_subset(package_subset, superset);
+ omap_mux_apply_pins(package_balls, superset);
+ omap_mux_set_board(board_subset);
+ omap_mux_init_dynamic(board_subset, superset, flags);
+
+ return 0;
+}
+
+#endif
+
+/*----------------------------------------------------------------------------*/
+
int __init omap2_mux_init(void)
{
u32 mux_pbase;
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
new file mode 100644
index 0000000..a8453f5
--- /dev/null
+++ b/arch/arm/mach-omap2/mux.h
@@ -0,0 +1,125 @@
+/*
+ * Copyright (C) 2009 Nokia
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define OMAP_MUX_TERMINATOR 0xffff
+
+/* 34xx mux mode options for each pin. See TRM for options */
+#define OMAP_MUX_MODE0 0
+#define OMAP_MUX_MODE1 1
+#define OMAP_MUX_MODE2 2
+#define OMAP_MUX_MODE3 3
+#define OMAP_MUX_MODE4 4
+#define OMAP_MUX_MODE5 5
+#define OMAP_MUX_MODE6 6
+#define OMAP_MUX_MODE7 7
+
+/* 24xx/34xx mux bit defines */
+#define OMAP_PULL_ENA (1 << 3)
+#define OMAP_PULL_UP (1 << 4)
+#define OMAP_ALTELECTRICALSEL (1 << 5)
+
+/* 34xx specific mux bit defines */
+#define OMAP_INPUT_EN (1 << 8)
+#define OMAP_OFF_EN (1 << 9)
+#define OMAP_OFFOUT_EN (1 << 10)
+#define OMAP_OFFOUT_VAL (1 << 11)
+#define OMAP_OFF_PULL_EN (1 << 12)
+#define OMAP_OFF_PULL_UP (1 << 13)
+#define OMAP_WAKEUP_EN (1 << 14)
+
+/* Active pin states */
+#define OMAP_PIN_OUTPUT 0
+#define OMAP_PIN_INPUT OMAP_INPUT_EN
+#define OMAP_PIN_INPUT_PULLUP (OMAP_PULL_ENA | OMAP_INPUT_EN \
+ | OMAP_PULL_UP)
+#define OMAP_PIN_INPUT_PULLDOWN (OMAP_PULL_ENA | OMAP_INPUT_EN)
+
+/* Off mode states */
+#define OMAP_PIN_OFF_NONE 0
+#define OMAP_PIN_OFF_OUTPUT_HIGH (OMAP_OFF_EN | OMAP_OFFOUT_EN \
+ | OMAP_OFFOUT_VAL)
+#define OMAP_PIN_OFF_OUTPUT_LOW (OMAP_OFF_EN | OMAP_OFFOUT_EN)
+#define OMAP_PIN_OFF_INPUT_PULLUP (OMAP_OFF_EN | OMAP_OFF_PULL_EN \
+ | OMAP_OFF_PULL_UP)
+#define OMAP_PIN_OFF_INPUT_PULLDOWN (OMAP_OFF_EN | OMAP_OFF_PULL_EN)
+#define OMAP_PIN_OFF_WAKEUPENABLE OMAP_WAKEUP_EN
+
+/* Flags for struct omap_board_mux */
+#define OMAP_MUX_DYNAMIC (1 << 0) /* Keep mux in memory */
+
+/* Flags for omap_mux_init */
+#define OMAP_MUX_ALL_DYNAMIC (1 << 16) /* Always in memory */
+#define OMAP_PACKAGE_MASK 0xffff
+#define OMAP_PACKAGE_CUS 3 /* 423-pin 0.65 */
+#define OMAP_PACKAGE_CBB 2 /* 515-pin 0.40 0.50 */
+#define OMAP_PACKAGE_CBC 1 /* 515-pin 0.50 0.65 */
+
+
+#define OMAP_MUX_NR_MODES 8 /* Available modes */
+#define OMAP_MUX_NR_SIDES 2 /* Bottom & top */
+
+/**
+ * struct omap_mux - data for omap mux register offset and it's value
+ * @reg_offset: mux register offset from the mux base
+ * @gpio: GPIO number
+ * @muxnames: available signal modes for a ball
+ */
+struct omap_mux {
+ u16 reg_offset;
+ u16 gpio;
+#ifdef CONFIG_DEBUG_FS
+ char *muxnames[OMAP_MUX_NR_MODES];
+ char *balls[OMAP_MUX_NR_SIDES];
+#endif
+};
+
+/**
+ * struct omap_ball - data for balls on omap package
+ * @reg_offset: mux register offset from the mux base
+ * @balls: available balls on the package
+ */
+struct omap_ball {
+ u16 reg_offset;
+ char *balls[OMAP_MUX_NR_SIDES];
+};
+
+/**
+ * struct omap_board_mux - data for initializing mux registers
+ * @reg_offset: mux register offset from the mux base
+ * @mux_value: desired mux value to set
+ * @flags: extra flags
+ */
+struct omap_board_mux {
+ u16 reg_offset;
+ u16 value;
+ u32 flags;
+};
+
+#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_ARCH_OMAP34XX)
+
+int omap3_mux_init(struct omap_board_mux *board_mux_config, int flags);
+int omap_mux_init(u32 mux_pbase, u32 mux_size,
+ struct omap_mux *superset,
+ struct omap_mux *package_subset,
+ struct omap_board_mux *board_subset,
+ struct omap_ball *package_balls,
+ int flags);
+int omap_mux_set(u16 val, u16 mux_offset, int flags);
+
+#else
+
+static inline int omap3_mux_init(struct omap_board_mux *board_mux_config,
+ int flags)
+{
+}
+static inline int omap_mux_set(u16 val, u16 mux_offset, int flags)
+{
+}
+
+#endif
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx
2009-10-29 20:35 [PATCH 0/5] New mux code for 34xx Tony Lindgren
2009-10-29 20:36 ` [PATCH 1/5] omap2: mux: intoduce omap_mux_{read,write} Tony Lindgren
2009-10-29 20:36 ` [PATCH 2/5] omap: mux: Add new style pin multiplexing code for omap3 Tony Lindgren
@ 2009-10-29 20:36 ` Tony Lindgren
2009-11-01 10:30 ` Mike Rapoport
2009-10-29 20:36 ` [PATCH 4/5] omap: mux: Add new style init functions to omap3 board-*.c files Tony Lindgren
` (3 subsequent siblings)
6 siblings, 1 reply; 23+ messages in thread
From: Tony Lindgren @ 2009-10-29 20:36 UTC (permalink / raw)
To: linux-omap; +Cc: mike.rapoport
Add new style mux data for 34xx. This should also
work with 3630 easily by adding the processor subset
and ball data.
Note that this data is __initdata, and gets optimized
out if CONFIG_OMAP_MUX is not set. Also, the debug data
gets optimized out if CONFIG_DEBUG_FS is not set.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/Makefile | 4
arch/arm/mach-omap2/mux.h | 2
arch/arm/mach-omap2/mux34xx.c | 1552 +++++++++++++++++++++++++++++++++++++++++
arch/arm/mach-omap2/mux34xx.h | 352 +++++++++
4 files changed, 1910 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/mux34xx.c
create mode 100644 arch/arm/mach-omap2/mux34xx.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 03cb4fc..4b6d7b9 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -23,6 +23,10 @@ obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o
obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o
obj-$(CONFIG_ARCH_OMAP3) += sram34xx.o
+ifeq ($(CONFIG_OMAP_MUX),y)
+obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o
+endif
+
# SMS/SDRC
obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
# obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index a8453f5..0d52318 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -7,6 +7,8 @@
* published by the Free Software Foundation.
*/
+#include "mux34xx.h"
+
#define OMAP_MUX_TERMINATOR 0xffff
/* 34xx mux mode options for each pin. See TRM for options */
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
new file mode 100644
index 0000000..62c2b6a
--- /dev/null
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -0,0 +1,1552 @@
+/*
+ * Copyright (C) 2009 Nokia
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include "mux.h"
+
+#ifdef CONFIG_DEBUG_FS
+
+#define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
+{ \
+ .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
+ .gpio = (g), \
+ .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \
+}
+
+#else
+
+#define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
+{ \
+ .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
+ .gpio = (g), \
+}
+
+#endif
+
+#define _OMAP3_BALLENTRY(M0, bb, bt) \
+{ \
+ .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
+ .balls = { bb, bt }, \
+}
+
+/*
+ * Superset of all mux modes, same as the CBC package
+ */
+static struct omap_mux __initdata omap3_muxmodes[] = {
+ _OMAP3_MUXENTRY(CAM_D0, 99,
+ "cam_d0", NULL, NULL, NULL,
+ "gpio_99", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D10, 109,
+ "cam_d10", NULL, NULL, NULL,
+ "gpio_109", "hw_dbg8", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D11, 110,
+ "cam_d11", NULL, NULL, NULL,
+ "gpio_110", "hw_dbg9", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D1, 100,
+ "cam_d1", NULL, NULL, NULL,
+ "gpio_100", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D2, 101,
+ "cam_d2", NULL, NULL, NULL,
+ "gpio_101", "hw_dbg4", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D3, 102,
+ "cam_d3", NULL, NULL, NULL,
+ "gpio_102", "hw_dbg5", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D4, 103,
+ "cam_d4", NULL, NULL, NULL,
+ "gpio_103", "hw_dbg6", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D5, 104,
+ "cam_d5", NULL, NULL, NULL,
+ "gpio_104", "hw_dbg7", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D6, 105,
+ "cam_d6", NULL, NULL, NULL,
+ "gpio_105", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D7, 106,
+ "cam_d7", NULL, NULL, NULL,
+ "gpio_106", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D8, 107,
+ "cam_d8", NULL, NULL, NULL,
+ "gpio_107", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D9, 108,
+ "cam_d9", NULL, NULL, NULL,
+ "gpio_108", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_FLD, 98,
+ "cam_fld", NULL, "cam_global_reset", NULL,
+ "gpio_98", "hw_dbg3", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_HS, 94,
+ "cam_hs", NULL, NULL, NULL,
+ "gpio_94", "hw_dbg0", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_PCLK, 97,
+ "cam_pclk", NULL, NULL, NULL,
+ "gpio_97", "hw_dbg2", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_STROBE, 126,
+ "cam_strobe", NULL, NULL, NULL,
+ "gpio_126", "hw_dbg11", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_VS, 95,
+ "cam_vs", NULL, NULL, NULL,
+ "gpio_95", "hw_dbg1", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_WEN, 167,
+ "cam_wen", NULL, "cam_shutter", NULL,
+ "gpio_167", "hw_dbg10", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_XCLKA, 96,
+ "cam_xclka", NULL, NULL, NULL,
+ "gpio_96", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_XCLKB, 111,
+ "cam_xclkb", NULL, NULL, NULL,
+ "gpio_111", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CSI2_DX0, 112,
+ "csi2_dx0", NULL, NULL, NULL,
+ "gpio_112", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CSI2_DX1, 114,
+ "csi2_dx1", NULL, NULL, NULL,
+ "gpio_114", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CSI2_DY0, 113,
+ "csi2_dy0", NULL, NULL, NULL,
+ "gpio_113", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CSI2_DY1, 115,
+ "csi2_dy1", NULL, NULL, NULL,
+ "gpio_115", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_ACBIAS, 69,
+ "dss_acbias", NULL, NULL, NULL,
+ "gpio_69", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA0, 70,
+ "dss_data0", NULL, "uart1_cts", NULL,
+ "gpio_70", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA10, 80,
+ "dss_data10", NULL, NULL, NULL,
+ "gpio_80", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA11, 81,
+ "dss_data11", NULL, NULL, NULL,
+ "gpio_81", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA12, 82,
+ "dss_data12", NULL, NULL, NULL,
+ "gpio_82", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA13, 83,
+ "dss_data13", NULL, NULL, NULL,
+ "gpio_83", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA14, 84,
+ "dss_data14", NULL, NULL, NULL,
+ "gpio_84", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA15, 85,
+ "dss_data15", NULL, NULL, NULL,
+ "gpio_85", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA16, 86,
+ "dss_data16", NULL, NULL, NULL,
+ "gpio_86", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA17, 87,
+ "dss_data17", NULL, NULL, NULL,
+ "gpio_87", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA18, 88,
+ "dss_data18", NULL, "mcspi3_clk", "dss_data0",
+ "gpio_88", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA19, 89,
+ "dss_data19", NULL, "mcspi3_simo", "dss_data1",
+ "gpio_89", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA1, 71,
+ "dss_data1", NULL, "uart1_rts", NULL,
+ "gpio_71", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA20, 90,
+ "dss_data20", NULL, "mcspi3_somi", "dss_data2",
+ "gpio_90", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA21, 91,
+ "dss_data21", NULL, "mcspi3_cs0", "dss_data3",
+ "gpio_91", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA22, 92,
+ "dss_data22", NULL, "mcspi3_cs1", "dss_data4",
+ "gpio_92", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA23, 93,
+ "dss_data23", NULL, NULL, "dss_data5",
+ "gpio_93", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA2, 72,
+ "dss_data2", NULL, NULL, NULL,
+ "gpio_72", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA3, 73,
+ "dss_data3", NULL, NULL, NULL,
+ "gpio_73", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA4, 74,
+ "dss_data4", NULL, "uart3_rx_irrx", NULL,
+ "gpio_74", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA5, 75,
+ "dss_data5", NULL, "uart3_tx_irtx", NULL,
+ "gpio_75", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA6, 76,
+ "dss_data6", NULL, "uart1_tx", NULL,
+ "gpio_76", "hw_dbg14", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA7, 77,
+ "dss_data7", NULL, "uart1_rx", NULL,
+ "gpio_77", "hw_dbg15", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA8, 78,
+ "dss_data8", NULL, NULL, NULL,
+ "gpio_78", "hw_dbg16", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA9, 79,
+ "dss_data9", NULL, NULL, NULL,
+ "gpio_79", "hw_dbg17", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_HSYNC, 67,
+ "dss_hsync", NULL, NULL, NULL,
+ "gpio_67", "hw_dbg13", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_PCLK, 66,
+ "dss_pclk", NULL, NULL, NULL,
+ "gpio_66", "hw_dbg12", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_VSYNC, 68,
+ "dss_vsync", NULL, NULL, NULL,
+ "gpio_68", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(ETK_CLK, 12,
+ "etk_clk", "mcbsp5_clkx", "mmc3_clk", "hsusb1_stp",
+ "gpio_12", "mm1_rxdp", "hsusb1_tll_stp", "hw_dbg0"),
+ _OMAP3_MUXENTRY(ETK_CTL, 13,
+ "etk_ctl", NULL, "mmc3_cmd", "hsusb1_clk",
+ "gpio_13", NULL, "hsusb1_tll_clk", "hw_dbg1"),
+ _OMAP3_MUXENTRY(ETK_D0, 14,
+ "etk_d0", "mcspi3_simo", "mmc3_dat4", "hsusb1_data0",
+ "gpio_14", "mm1_rxrcv", "hsusb1_tll_data0", "hw_dbg2"),
+ _OMAP3_MUXENTRY(ETK_D10, 24,
+ "etk_d10", NULL, "uart1_rx", "hsusb2_clk",
+ "gpio_24", NULL, "hsusb2_tll_clk", "hw_dbg12"),
+ _OMAP3_MUXENTRY(ETK_D11, 25,
+ "etk_d11", NULL, NULL, "hsusb2_stp",
+ "gpio_25", "mm2_rxdp", "hsusb2_tll_stp", "hw_dbg13"),
+ _OMAP3_MUXENTRY(ETK_D12, 26,
+ "etk_d12", NULL, NULL, "hsusb2_dir",
+ "gpio_26", NULL, "hsusb2_tll_dir", "hw_dbg14"),
+ _OMAP3_MUXENTRY(ETK_D13, 27,
+ "etk_d13", NULL, NULL, "hsusb2_nxt",
+ "gpio_27", "mm2_rxdm", "hsusb2_tll_nxt", "hw_dbg15"),
+ _OMAP3_MUXENTRY(ETK_D14, 28,
+ "etk_d14", NULL, NULL, "hsusb2_data0",
+ "gpio_28", "mm2_rxrcv", "hsusb2_tll_data0", "hw_dbg16"),
+ _OMAP3_MUXENTRY(ETK_D15, 29,
+ "etk_d15", NULL, NULL, "hsusb2_data1",
+ "gpio_29", "mm2_txse0", "hsusb2_tll_data1", "hw_dbg17"),
+ _OMAP3_MUXENTRY(ETK_D1, 15,
+ "etk_d1", "mcspi3_somi", NULL, "hsusb1_data1",
+ "gpio_15", "mm1_txse0", "hsusb1_tll_data1", "hw_dbg3"),
+ _OMAP3_MUXENTRY(ETK_D2, 16,
+ "etk_d2", "mcspi3_cs0", NULL, "hsusb1_data2",
+ "gpio_16", "mm1_txdat", "hsusb1_tll_data2", "hw_dbg4"),
+ _OMAP3_MUXENTRY(ETK_D3, 17,
+ "etk_d3", "mcspi3_clk", "mmc3_dat3", "hsusb1_data7",
+ "gpio_17", NULL, "hsusb1_tll_data7", "hw_dbg5"),
+ _OMAP3_MUXENTRY(ETK_D4, 18,
+ "etk_d4", "mcbsp5_dr", "mmc3_dat0", "hsusb1_data4",
+ "gpio_18", NULL, "hsusb1_tll_data4", "hw_dbg6"),
+ _OMAP3_MUXENTRY(ETK_D5, 19,
+ "etk_d5", "mcbsp5_fsx", "mmc3_dat1", "hsusb1_data5",
+ "gpio_19", NULL, "hsusb1_tll_data5", "hw_dbg7"),
+ _OMAP3_MUXENTRY(ETK_D6, 20,
+ "etk_d6", "mcbsp5_dx", "mmc3_dat2", "hsusb1_data6",
+ "gpio_20", NULL, "hsusb1_tll_data6", "hw_dbg8"),
+ _OMAP3_MUXENTRY(ETK_D7, 21,
+ "etk_d7", "mcspi3_cs1", "mmc3_dat7", "hsusb1_data3",
+ "gpio_21", "mm1_txen_n", "hsusb1_tll_data3", "hw_dbg9"),
+ _OMAP3_MUXENTRY(ETK_D8, 22,
+ "etk_d8", "sys_drm_msecure", "mmc3_dat6", "hsusb1_dir",
+ "gpio_22", NULL, "hsusb1_tll_dir", "hw_dbg10"),
+ _OMAP3_MUXENTRY(ETK_D9, 23,
+ "etk_d9", "sys_secure_indicator", "mmc3_dat5", "hsusb1_nxt",
+ "gpio_23", "mm1_rxdm", "hsusb1_tll_nxt", "hw_dbg11"),
+ _OMAP3_MUXENTRY(GPMC_A10, 43,
+ "gpmc_a10", "sys_ndmareq3", NULL, NULL,
+ "gpio_43", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A1, 34,
+ "gpmc_a1", NULL, NULL, NULL,
+ "gpio_34", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A2, 35,
+ "gpmc_a2", NULL, NULL, NULL,
+ "gpio_35", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A3, 36,
+ "gpmc_a3", NULL, NULL, NULL,
+ "gpio_36", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A4, 37,
+ "gpmc_a4", NULL, NULL, NULL,
+ "gpio_37", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A5, 38,
+ "gpmc_a5", NULL, NULL, NULL,
+ "gpio_38", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A6, 39,
+ "gpmc_a6", NULL, NULL, NULL,
+ "gpio_39", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A7, 40,
+ "gpmc_a7", NULL, NULL, NULL,
+ "gpio_40", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A8, 41,
+ "gpmc_a8", NULL, NULL, NULL,
+ "gpio_41", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_A9, 42,
+ "gpmc_a9", "sys_ndmareq2", NULL, NULL,
+ "gpio_42", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_CLK, 59,
+ "gpmc_clk", NULL, NULL, NULL,
+ "gpio_59", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_D10, 46,
+ "gpmc_d10", NULL, NULL, NULL,
+ "gpio_46", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_D11, 47,
+ "gpmc_d11", NULL, NULL, NULL,
+ "gpio_47", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_D12, 48,
+ "gpmc_d12", NULL, NULL, NULL,
+ "gpio_48", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_D13, 49,
+ "gpmc_d13", NULL, NULL, NULL,
+ "gpio_49", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_D14, 50,
+ "gpmc_d14", NULL, NULL, NULL,
+ "gpio_50", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_D15, 51,
+ "gpmc_d15", NULL, NULL, NULL,
+ "gpio_51", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_D8, 44,
+ "gpmc_d8", NULL, NULL, NULL,
+ "gpio_44", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_D9, 45,
+ "gpmc_d9", NULL, NULL, NULL,
+ "gpio_45", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NBE0_CLE, 60,
+ "gpmc_nbe0_cle", NULL, NULL, NULL,
+ "gpio_60", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NBE1, 61,
+ "gpmc_nbe1", NULL, NULL, NULL,
+ "gpio_61", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NCS1, 52,
+ "gpmc_ncs1", NULL, NULL, NULL,
+ "gpio_52", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NCS2, 53,
+ "gpmc_ncs2", NULL, NULL, NULL,
+ "gpio_53", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NCS3, 54,
+ "gpmc_ncs3", "sys_ndmareq0", NULL, NULL,
+ "gpio_54", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NCS4, 55,
+ "gpmc_ncs4", "sys_ndmareq1", "mcbsp4_clkx", "gpt9_pwm_evt",
+ "gpio_55", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NCS5, 56,
+ "gpmc_ncs5", "sys_ndmareq2", "mcbsp4_dr", "gpt10_pwm_evt",
+ "gpio_56", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NCS6, 57,
+ "gpmc_ncs6", "sys_ndmareq3", "mcbsp4_dx", "gpt11_pwm_evt",
+ "gpio_57", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NCS7, 58,
+ "gpmc_ncs7", "gpmc_io_dir", "mcbsp4_fsx", "gpt8_pwm_evt",
+ "gpio_58", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_NWP, 62,
+ "gpmc_nwp", NULL, NULL, NULL,
+ "gpio_62", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_WAIT1, 63,
+ "gpmc_wait1", NULL, NULL, NULL,
+ "gpio_63", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_WAIT2, 64,
+ "gpmc_wait2", NULL, NULL, NULL,
+ "gpio_64", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(GPMC_WAIT3, 65,
+ "gpmc_wait3", "sys_ndmareq1", NULL, NULL,
+ "gpio_65", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HDQ_SIO, 170,
+ "hdq_sio", "sys_altclk", "i2c2_sccbe", "i2c3_sccbe",
+ "gpio_170", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_CLK, 120,
+ "hsusb0_clk", NULL, NULL, NULL,
+ "gpio_120", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DATA0, 125,
+ "hsusb0_data0", NULL, "uart3_tx_irtx", NULL,
+ "gpio_125", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DATA1, 130,
+ "hsusb0_data1", NULL, "uart3_rx_irrx", NULL,
+ "gpio_130", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DATA2, 131,
+ "hsusb0_data2", NULL, "uart3_rts_sd", NULL,
+ "gpio_131", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DATA3, 169,
+ "hsusb0_data3", NULL, "uart3_cts_rctx", NULL,
+ "gpio_169", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DATA4, 188,
+ "hsusb0_data4", NULL, NULL, NULL,
+ "gpio_188", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DATA5, 189,
+ "hsusb0_data5", NULL, NULL, NULL,
+ "gpio_189", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DATA6, 190,
+ "hsusb0_data6", NULL, NULL, NULL,
+ "gpio_190", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DATA7, 191,
+ "hsusb0_data7", NULL, NULL, NULL,
+ "gpio_191", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_DIR, 122,
+ "hsusb0_dir", NULL, NULL, NULL,
+ "gpio_122", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_NXT, 124,
+ "hsusb0_nxt", NULL, NULL, NULL,
+ "gpio_124", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(HSUSB0_STP, 121,
+ "hsusb0_stp", NULL, NULL, NULL,
+ "gpio_121", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(I2C2_SCL, 168,
+ "i2c2_scl", NULL, NULL, NULL,
+ "gpio_168", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(I2C2_SDA, 183,
+ "i2c2_sda", NULL, NULL, NULL,
+ "gpio_183", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(I2C3_SCL, 184,
+ "i2c3_scl", NULL, NULL, NULL,
+ "gpio_184", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(I2C3_SDA, 185,
+ "i2c3_sda", NULL, NULL, NULL,
+ "gpio_185", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(I2C4_SCL, 0,
+ "i2c4_scl", "sys_nvmode1", NULL, NULL,
+ NULL, NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(I2C4_SDA, 0,
+ "i2c4_sda", "sys_nvmode2", NULL, NULL,
+ NULL, NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(JTAG_EMU0, 11,
+ "jtag_emu0", NULL, NULL, NULL,
+ "gpio_11", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(JTAG_EMU1, 31,
+ "jtag_emu1", NULL, NULL, NULL,
+ "gpio_31", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP1_CLKR, 156,
+ "mcbsp1_clkr", "mcspi4_clk", NULL, NULL,
+ "gpio_156", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP1_CLKX, 162,
+ "mcbsp1_clkx", NULL, "mcbsp3_clkx", NULL,
+ "gpio_162", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP1_DR, 159,
+ "mcbsp1_dr", "mcspi4_somi", "mcbsp3_dr", NULL,
+ "gpio_159", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP1_DX, 158,
+ "mcbsp1_dx", "mcspi4_simo", "mcbsp3_dx", NULL,
+ "gpio_158", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP1_FSR, 157,
+ "mcbsp1_fsr", NULL, "cam_global_reset", NULL,
+ "gpio_157", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP1_FSX, 161,
+ "mcbsp1_fsx", "mcspi4_cs0", "mcbsp3_fsx", NULL,
+ "gpio_161", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP2_CLKX, 117,
+ "mcbsp2_clkx", NULL, NULL, NULL,
+ "gpio_117", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP2_DR, 118,
+ "mcbsp2_dr", NULL, NULL, NULL,
+ "gpio_118", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP2_DX, 119,
+ "mcbsp2_dx", NULL, NULL, NULL,
+ "gpio_119", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP2_FSX, 116,
+ "mcbsp2_fsx", NULL, NULL, NULL,
+ "gpio_116", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP3_CLKX, 142,
+ "mcbsp3_clkx", "uart2_tx", NULL, NULL,
+ "gpio_142", "hsusb3_tll_data6", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP3_DR, 141,
+ "mcbsp3_dr", "uart2_rts", NULL, NULL,
+ "gpio_141", "hsusb3_tll_data5", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP3_DX, 140,
+ "mcbsp3_dx", "uart2_cts", NULL, NULL,
+ "gpio_140", "hsusb3_tll_data4", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP3_FSX, 143,
+ "mcbsp3_fsx", "uart2_rx", NULL, NULL,
+ "gpio_143", "hsusb3_tll_data7", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP4_CLKX, 152,
+ "mcbsp4_clkx", NULL, NULL, NULL,
+ "gpio_152", "hsusb3_tll_data1", "mm3_txse0", "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP4_DR, 153,
+ "mcbsp4_dr", NULL, NULL, NULL,
+ "gpio_153", "hsusb3_tll_data0", "mm3_rxrcv", "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP4_DX, 154,
+ "mcbsp4_dx", NULL, NULL, NULL,
+ "gpio_154", "hsusb3_tll_data2", "mm3_txdat", "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP4_FSX, 155,
+ "mcbsp4_fsx", NULL, NULL, NULL,
+ "gpio_155", "hsusb3_tll_data3", "mm3_txen_n", "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP_CLKS, 160,
+ "mcbsp_clks", NULL, "cam_shutter", NULL,
+ "gpio_160", "uart1_cts", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI1_CLK, 171,
+ "mcspi1_clk", "mmc2_dat4", NULL, NULL,
+ "gpio_171", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI1_CS0, 174,
+ "mcspi1_cs0", "mmc2_dat7", NULL, NULL,
+ "gpio_174", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI1_CS1, 175,
+ "mcspi1_cs1", NULL, NULL, "mmc3_cmd",
+ "gpio_175", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI1_CS2, 176,
+ "mcspi1_cs2", NULL, NULL, "mmc3_clk",
+ "gpio_176", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI1_CS3, 177,
+ "mcspi1_cs3", NULL, "hsusb2_tll_data2", "hsusb2_data2",
+ "gpio_177", "mm2_txdat", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI1_SIMO, 172,
+ "mcspi1_simo", "mmc2_dat5", NULL, NULL,
+ "gpio_172", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI1_SOMI, 173,
+ "mcspi1_somi", "mmc2_dat6", NULL, NULL,
+ "gpio_173", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI2_CLK, 178,
+ "mcspi2_clk", NULL, "hsusb2_tll_data7", "hsusb2_data7",
+ "gpio_178", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI2_CS0, 181,
+ "mcspi2_cs0", "gpt11_pwm_evt", "hsusb2_tll_data6", "hsusb2_data6",
+ "gpio_181", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI2_CS1, 182,
+ "mcspi2_cs1", "gpt8_pwm_evt", "hsusb2_tll_data3", "hsusb2_data3",
+ "gpio_182", "mm2_txen_n", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI2_SIMO, 179,
+ "mcspi2_simo", "gpt9_pwm_evt", "hsusb2_tll_data4", "hsusb2_data4",
+ "gpio_179", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCSPI2_SOMI, 180,
+ "mcspi2_somi", "gpt10_pwm_evt", "hsusb2_tll_data5", "hsusb2_data5",
+ "gpio_180", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_CLK, 120,
+ "mmc1_clk", NULL, NULL, NULL,
+ "gpio_120", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_CMD, 121,
+ "mmc1_cmd", NULL, NULL, NULL,
+ "gpio_121", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_DAT0, 122,
+ "mmc1_dat0", NULL, NULL, NULL,
+ "gpio_122", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_DAT1, 123,
+ "mmc1_dat1", NULL, NULL, NULL,
+ "gpio_123", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_DAT2, 124,
+ "mmc1_dat2", NULL, NULL, NULL,
+ "gpio_124", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_DAT3, 125,
+ "mmc1_dat3", NULL, NULL, NULL,
+ "gpio_125", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_DAT4, 126,
+ "mmc1_dat4", NULL, NULL, NULL,
+ "gpio_126", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_DAT5, 127,
+ "mmc1_dat5", NULL, NULL, NULL,
+ "gpio_127", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_DAT6, 128,
+ "mmc1_dat6", NULL, NULL, NULL,
+ "gpio_128", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC1_DAT7, 129,
+ "mmc1_dat7", NULL, NULL, NULL,
+ "gpio_129", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_CLK, 130,
+ "mmc2_clk", "mcspi3_clk", NULL, NULL,
+ "gpio_130", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_CMD, 131,
+ "mmc2_cmd", "mcspi3_simo", NULL, NULL,
+ "gpio_131", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT0, 132,
+ "mmc2_dat0", "mcspi3_somi", NULL, NULL,
+ "gpio_132", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT1, 133,
+ "mmc2_dat1", NULL, NULL, NULL,
+ "gpio_133", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT2, 134,
+ "mmc2_dat2", "mcspi3_cs1", NULL, NULL,
+ "gpio_134", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT3, 135,
+ "mmc2_dat3", "mcspi3_cs0", NULL, NULL,
+ "gpio_135", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT4, 136,
+ "mmc2_dat4", "mmc2_dir_dat0", NULL, "mmc3_dat0",
+ "gpio_136", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT5, 137,
+ "mmc2_dat5", "mmc2_dir_dat1", "cam_global_reset", "mmc3_dat1",
+ "gpio_137", "hsusb3_tll_stp", "mm3_rxdp", "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT6, 138,
+ "mmc2_dat6", "mmc2_dir_cmd", "cam_shutter", "mmc3_dat2",
+ "gpio_138", "hsusb3_tll_dir", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT7, 139,
+ "mmc2_dat7", "mmc2_clkin", NULL, "mmc3_dat3",
+ "gpio_139", "hsusb3_tll_nxt", "mm3_rxdm", "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_BOOT0, 2,
+ "sys_boot0", NULL, NULL, NULL,
+ "gpio_2", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_BOOT1, 3,
+ "sys_boot1", NULL, NULL, NULL,
+ "gpio_3", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_BOOT2, 4,
+ "sys_boot2", NULL, NULL, NULL,
+ "gpio_4", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_BOOT3, 5,
+ "sys_boot3", NULL, NULL, NULL,
+ "gpio_5", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_BOOT4, 6,
+ "sys_boot4", "mmc2_dir_dat2", NULL, NULL,
+ "gpio_6", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_BOOT5, 7,
+ "sys_boot5", "mmc2_dir_dat3", NULL, NULL,
+ "gpio_7", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_BOOT6, 8,
+ "sys_boot6", NULL, NULL, NULL,
+ "gpio_8", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_CLKOUT1, 10,
+ "sys_clkout1", NULL, NULL, NULL,
+ "gpio_10", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_CLKOUT2, 186,
+ "sys_clkout2", NULL, NULL, NULL,
+ "gpio_186", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_CLKREQ, 1,
+ "sys_clkreq", NULL, NULL, NULL,
+ "gpio_1", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_NIRQ, 0,
+ "sys_nirq", NULL, NULL, NULL,
+ "gpio_0", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_NRESWARM, 30,
+ "sys_nreswarm", NULL, NULL, NULL,
+ "gpio_30", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(SYS_OFF_MODE, 9,
+ "sys_off_mode", NULL, NULL, NULL,
+ "gpio_9", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART1_CTS, 150,
+ "uart1_cts", NULL, NULL, NULL,
+ "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART1_RTS, 149,
+ "uart1_rts", NULL, NULL, NULL,
+ "gpio_149", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART1_RX, 151,
+ "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk",
+ "gpio_151", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART1_TX, 148,
+ "uart1_tx", NULL, NULL, NULL,
+ "gpio_148", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART2_CTS, 144,
+ "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL,
+ "gpio_144", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART2_RTS, 145,
+ "uart2_rts", "mcbsp3_dr", "gpt10_pwm_evt", NULL,
+ "gpio_145", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART2_RX, 147,
+ "uart2_rx", "mcbsp3_fsx", "gpt8_pwm_evt", NULL,
+ "gpio_147", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART2_TX, 146,
+ "uart2_tx", "mcbsp3_clkx", "gpt11_pwm_evt", NULL,
+ "gpio_146", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART3_CTS_RCTX, 163,
+ "uart3_cts_rctx", NULL, NULL, NULL,
+ "gpio_163", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART3_RTS_SD, 164,
+ "uart3_rts_sd", NULL, NULL, NULL,
+ "gpio_164", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART3_RX_IRRX, 165,
+ "uart3_rx_irrx", NULL, NULL, NULL,
+ "gpio_165", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART3_TX_IRTX, 166,
+ "uart3_tx_irtx", NULL, NULL, NULL,
+ "gpio_166", NULL, NULL, "safe_mode"),
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+
+/*
+ * Pins different on CBC package comapared to CBC package
+ */
+struct omap_mux __initdata omap3_cbc_subset[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+
+/*
+ * Balls for CBC package
+ * 515-pin s-PBGA Package, 0.65mm Ball Pitch (Top), 0.50mm Ball Pitch (Bottom)
+ *
+ * FIXME: What's up with the outdated TI documentation? See:
+ *
+ * http://wiki.davincidsp.com/index.php/Datasheet_Errata_for_OMAP35x_CBC_Package
+ * http://community.ti.com/forums/t/10982.aspx
+ */
+#ifdef CONFIG_DEBUG_FS
+struct omap_ball __initdata omap3_cbc_ball[] = {
+ _OMAP3_BALLENTRY(CAM_D0, "ae16", NULL),
+ _OMAP3_BALLENTRY(CAM_D1, "ae15", NULL),
+ _OMAP3_BALLENTRY(CAM_D10, "d25", NULL),
+ _OMAP3_BALLENTRY(CAM_D11, "e26", NULL),
+ _OMAP3_BALLENTRY(CAM_D2, "a24", NULL),
+ _OMAP3_BALLENTRY(CAM_D3, "b24", NULL),
+ _OMAP3_BALLENTRY(CAM_D4, "d24", NULL),
+ _OMAP3_BALLENTRY(CAM_D5, "c24", NULL),
+ _OMAP3_BALLENTRY(CAM_D6, "p25", NULL),
+ _OMAP3_BALLENTRY(CAM_D7, "p26", NULL),
+ _OMAP3_BALLENTRY(CAM_D8, "n25", NULL),
+ _OMAP3_BALLENTRY(CAM_D9, "n26", NULL),
+ _OMAP3_BALLENTRY(CAM_FLD, "b23", NULL),
+ _OMAP3_BALLENTRY(CAM_HS, "c23", NULL),
+ _OMAP3_BALLENTRY(CAM_PCLK, "c26", NULL),
+ _OMAP3_BALLENTRY(CAM_STROBE, "d26", NULL),
+ _OMAP3_BALLENTRY(CAM_VS, "d23", NULL),
+ _OMAP3_BALLENTRY(CAM_WEN, "a23", NULL),
+ _OMAP3_BALLENTRY(CAM_XCLKA, "c25", NULL),
+ _OMAP3_BALLENTRY(CAM_XCLKB, "e25", NULL),
+ _OMAP3_BALLENTRY(CSI2_DX0, "ad17", NULL),
+ _OMAP3_BALLENTRY(CSI2_DX1, "ae18", NULL),
+ _OMAP3_BALLENTRY(CSI2_DY0, "ad16", NULL),
+ _OMAP3_BALLENTRY(CSI2_DY1, "ae17", NULL),
+ _OMAP3_BALLENTRY(DSS_ACBIAS, "f26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA0, "ae21", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA1, "ae22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA10, "ac26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA11, "ad26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA12, "aa25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA13, "y25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA14, "aa26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA15, "ab26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA16, "l25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA17, "l26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA18, "m24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA19, "m26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA2, "ae23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA20, "f25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA21, "n24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA22, "ac25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA23, "ab25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA3, "ae24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA4, "ad23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA5, "ad24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA6, "g26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA7, "h25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA8, "h26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA9, "j26", NULL),
+ _OMAP3_BALLENTRY(DSS_HSYNC, "k24", NULL),
+ _OMAP3_BALLENTRY(DSS_PCLK, "g25", NULL),
+ _OMAP3_BALLENTRY(DSS_VSYNC, "m25", NULL),
+ _OMAP3_BALLENTRY(ETK_CLK, "ab2", NULL),
+ _OMAP3_BALLENTRY(ETK_CTL, "ab3", NULL),
+ _OMAP3_BALLENTRY(ETK_D0, "ac3", NULL),
+ _OMAP3_BALLENTRY(ETK_D1, "ad4", NULL),
+ _OMAP3_BALLENTRY(ETK_D10, "ae4", NULL),
+ _OMAP3_BALLENTRY(ETK_D11, "af6", NULL),
+ _OMAP3_BALLENTRY(ETK_D12, "ae6", NULL),
+ _OMAP3_BALLENTRY(ETK_D13, "af7", NULL),
+ _OMAP3_BALLENTRY(ETK_D14, "af9", NULL),
+ _OMAP3_BALLENTRY(ETK_D15, "ae9", NULL),
+ _OMAP3_BALLENTRY(ETK_D2, "ad3", NULL),
+ _OMAP3_BALLENTRY(ETK_D3, "aa3", NULL),
+ _OMAP3_BALLENTRY(ETK_D4, "y3", NULL),
+ _OMAP3_BALLENTRY(ETK_D5, "ab1", NULL),
+ _OMAP3_BALLENTRY(ETK_D6, "ae3", NULL),
+ _OMAP3_BALLENTRY(ETK_D7, "ad2", NULL),
+ _OMAP3_BALLENTRY(ETK_D8, "aa4", NULL),
+ _OMAP3_BALLENTRY(ETK_D9, "v2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A1, "j2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A10, "d2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A2, "h1", NULL),
+ _OMAP3_BALLENTRY(GPMC_A3, "h2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A4, "g2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A5, "f1", NULL),
+ _OMAP3_BALLENTRY(GPMC_A6, "f2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A7, "e1", NULL),
+ _OMAP3_BALLENTRY(GPMC_A8, "e2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A9, "d1", NULL),
+ _OMAP3_BALLENTRY(GPMC_CLK, "n1", "l1"),
+ _OMAP3_BALLENTRY(GPMC_D10, "t1", "n1"),
+ _OMAP3_BALLENTRY(GPMC_D11, "u2", "p2"),
+ _OMAP3_BALLENTRY(GPMC_D12, "u1", "p1"),
+ _OMAP3_BALLENTRY(GPMC_D13, "p1", "m1"),
+ _OMAP3_BALLENTRY(GPMC_D14, "l2", "j2"),
+ _OMAP3_BALLENTRY(GPMC_D15, "m2", "k2"),
+ _OMAP3_BALLENTRY(GPMC_D8, "v1", "r1"),
+ _OMAP3_BALLENTRY(GPMC_D9, "y1", "t1"),
+ _OMAP3_BALLENTRY(GPMC_NBE0_CLE, "k2", NULL),
+ _OMAP3_BALLENTRY(GPMC_NBE1, "j1", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS1, "ad1", "w1"),
+ _OMAP3_BALLENTRY(GPMC_NCS2, "a3", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS3, "b6", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS4, "b4", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS5, "c4", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS6, "b5", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS7, "c5", NULL),
+ _OMAP3_BALLENTRY(GPMC_NWP, "ac6", "y5"),
+ _OMAP3_BALLENTRY(GPMC_WAIT1, "ac8", "y8"),
+ _OMAP3_BALLENTRY(GPMC_WAIT2, "b3", NULL),
+ _OMAP3_BALLENTRY(GPMC_WAIT3, "c6", NULL),
+ _OMAP3_BALLENTRY(HDQ_SIO, "j23", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_CLK, "w19", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA0, "v20", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA1, "y20", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA2, "v18", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA3, "w20", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA4, "w17", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA5, "y18", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA6, "y19", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA7, "y17", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DIR, "v19", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_NXT, "w18", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_STP, "u20", NULL),
+ _OMAP3_BALLENTRY(I2C2_SCL, "c2", NULL),
+ _OMAP3_BALLENTRY(I2C2_SDA, "c1", NULL),
+ _OMAP3_BALLENTRY(I2C3_SCL, "ab4", NULL),
+ _OMAP3_BALLENTRY(I2C3_SDA, "ac4", NULL),
+ _OMAP3_BALLENTRY(I2C4_SCL, "ad15", NULL),
+ _OMAP3_BALLENTRY(I2C4_SDA, "w16", NULL),
+ _OMAP3_BALLENTRY(JTAG_EMU0, "y15", NULL),
+ _OMAP3_BALLENTRY(JTAG_EMU1, "y14", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_CLKR, "u19", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_CLKX, "t17", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_DR, "t20", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_DX, "u17", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_FSR, "v17", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_FSX, "p20", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_CLKX, "r18", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_DR, "t18", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_DX, "r19", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_FSX, "u18", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_CLKX, "u3", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_DR, "n3", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_DX, "p3", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_FSX, "w3", NULL),
+ _OMAP3_BALLENTRY(MCBSP4_CLKX, "v3", NULL),
+ _OMAP3_BALLENTRY(MCBSP4_DR, "u4", NULL),
+ _OMAP3_BALLENTRY(MCBSP4_DX, "r3", NULL),
+ _OMAP3_BALLENTRY(MCBSP4_FSX, "t3", NULL),
+ _OMAP3_BALLENTRY(MCBSP_CLKS, "t19", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CLK, "p9", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS0, "r7", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS1, "r8", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS2, "r9", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS3, "t8", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_SIMO, "p8", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_SOMI, "p7", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CLK, "w7", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CS0, "v8", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CS1, "v9", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_SIMO, "w8", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_SOMI, "u8", NULL),
+ _OMAP3_BALLENTRY(MMC1_CLK, "n19", NULL),
+ _OMAP3_BALLENTRY(MMC1_CMD, "l18", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT0, "m19", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT1, "m18", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT2, "k18", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT3, "n20", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT4, "m20", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT5, "p17", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT6, "p18", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT7, "p19", NULL),
+ _OMAP3_BALLENTRY(MMC2_CLK, "w10", NULL),
+ _OMAP3_BALLENTRY(MMC2_CMD, "r10", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT0, "t10", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT1, "t9", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT2, "u10", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT3, "u9", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT4, "v10", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT5, "m3", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT6, "l3", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT7, "k3", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT0, "f3", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT1, "d3", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT2, "c3", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT3, "e3", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT4, "e4", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT5, "g3", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT6, "d4", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKOUT1, "ae14", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKOUT2, "w11", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKREQ, "w15", NULL),
+ _OMAP3_BALLENTRY(SYS_NIRQ, "v16", NULL),
+ _OMAP3_BALLENTRY(SYS_NRESWARM, "ad7", "aa5"),
+ _OMAP3_BALLENTRY(SYS_OFF_MODE, "v12", NULL),
+ _OMAP3_BALLENTRY(UART1_CTS, "w2", NULL),
+ _OMAP3_BALLENTRY(UART1_RTS, "r2", NULL),
+ _OMAP3_BALLENTRY(UART1_RX, "h3", NULL),
+ _OMAP3_BALLENTRY(UART1_TX, "l4", NULL),
+ _OMAP3_BALLENTRY(UART2_CTS, "y24", NULL),
+ _OMAP3_BALLENTRY(UART2_RTS, "aa24", NULL),
+ _OMAP3_BALLENTRY(UART2_RX, "ad21", NULL),
+ _OMAP3_BALLENTRY(UART2_TX, "ad22", NULL),
+ _OMAP3_BALLENTRY(UART3_CTS_RCTX, "f23", NULL),
+ _OMAP3_BALLENTRY(UART3_RTS_SD, "f24", NULL),
+ _OMAP3_BALLENTRY(UART3_RX_IRRX, "h24", NULL),
+ _OMAP3_BALLENTRY(UART3_TX_IRTX, "g24", NULL),
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define omap3_cbc_ball NULL
+#endif
+
+/*
+ * Pins different on CUS package comapared to CBC package
+ */
+struct omap_mux __initdata omap3_cus_subset[] = {
+ _OMAP3_MUXENTRY(CAM_D10, 109,
+ "cam_d10", NULL, NULL, NULL,
+ "gpio_109", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D11, 110,
+ "cam_d11", NULL, NULL, NULL,
+ "gpio_110", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D2, 101,
+ "cam_d2", NULL, NULL, NULL,
+ "gpio_101", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D3, 102,
+ "cam_d3", NULL, NULL, NULL,
+ "gpio_102", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D4, 103,
+ "cam_d4", NULL, NULL, NULL,
+ "gpio_103", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D5, 104,
+ "cam_d5", NULL, NULL, NULL,
+ "gpio_104", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_FLD, 98,
+ "cam_fld", NULL, "cam_global_reset", NULL,
+ "gpio_98", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_HS, 94,
+ "cam_hs", NULL, NULL, NULL,
+ "gpio_94", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_PCLK, 97,
+ "cam_pclk", NULL, NULL, NULL,
+ "gpio_97", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_STROBE, 126,
+ "cam_strobe", NULL, NULL, NULL,
+ "gpio_126", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_VS, 95,
+ "cam_vs", NULL, NULL, NULL,
+ "gpio_95", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_WEN, 167,
+ "cam_wen", NULL, "cam_shutter", NULL,
+ "gpio_167", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA6, 76,
+ "dss_data6", NULL, "uart1_tx", NULL,
+ "gpio_76", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA7, 77,
+ "dss_data7", NULL, "uart1_rx", NULL,
+ "gpio_77", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA8, 78,
+ "dss_data8", NULL, NULL, NULL,
+ "gpio_78", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA9, 79,
+ "dss_data9", NULL, NULL, NULL,
+ "gpio_79", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_HSYNC, 67,
+ "dss_hsync", NULL, NULL, NULL,
+ "gpio_67", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_PCLK, 66,
+ "dss_pclk", NULL, NULL, NULL,
+ "gpio_66", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(ETK_CLK, 12,
+ "etk_clk", "mcbsp5_clkx", "mmc3_clk", "hsusb1_stp",
+ "gpio_12", "mm1_rxdp", "hsusb1_tll_stp", NULL),
+ _OMAP3_MUXENTRY(ETK_CTL, 13,
+ "etk_ctl", NULL, "mmc3_cmd", "hsusb1_clk",
+ "gpio_13", NULL, "hsusb1_tll_clk", NULL),
+ _OMAP3_MUXENTRY(ETK_D0, 14,
+ "etk_d0", "mcspi3_simo", "mmc3_dat4", "hsusb1_data0",
+ "gpio_14", "mm1_rxrcv", "hsusb1_tll_data0", NULL),
+ _OMAP3_MUXENTRY(ETK_D1, 15,
+ "etk_d1", "mcspi3_somi", NULL, "hsusb1_data1",
+ "gpio_15", "mm1_txse0", "hsusb1_tll_data1", NULL),
+ _OMAP3_MUXENTRY(ETK_D10, 24,
+ "etk_d10", NULL, "uart1_rx", "hsusb2_clk",
+ "gpio_24", NULL, "hsusb2_tll_clk", NULL),
+ _OMAP3_MUXENTRY(ETK_D11, 25,
+ "etk_d11", NULL, NULL, "hsusb2_stp",
+ "gpio_25", "mm2_rxdp", "hsusb2_tll_stp", NULL),
+ _OMAP3_MUXENTRY(ETK_D12, 26,
+ "etk_d12", NULL, NULL, "hsusb2_dir",
+ "gpio_26", NULL, "hsusb2_tll_dir", NULL),
+ _OMAP3_MUXENTRY(ETK_D13, 27,
+ "etk_d13", NULL, NULL, "hsusb2_nxt",
+ "gpio_27", "mm2_rxdm", "hsusb2_tll_nxt", NULL),
+ _OMAP3_MUXENTRY(ETK_D14, 28,
+ "etk_d14", NULL, NULL, "hsusb2_data0",
+ "gpio_28", "mm2_rxrcv", "hsusb2_tll_data0", NULL),
+ _OMAP3_MUXENTRY(ETK_D15, 29,
+ "etk_d15", NULL, NULL, "hsusb2_data1",
+ "gpio_29", "mm2_txse0", "hsusb2_tll_data1", NULL),
+ _OMAP3_MUXENTRY(ETK_D2, 16,
+ "etk_d2", "mcspi3_cs0", NULL, "hsusb1_data2",
+ "gpio_16", "mm1_txdat", "hsusb1_tll_data2", NULL),
+ _OMAP3_MUXENTRY(ETK_D3, 17,
+ "etk_d3", "mcspi3_clk", "mmc3_dat3", "hsusb1_data7",
+ "gpio_17", NULL, "hsusb1_tll_data7", NULL),
+ _OMAP3_MUXENTRY(ETK_D4, 18,
+ "etk_d4", "mcbsp5_dr", "mmc3_dat0", "hsusb1_data4",
+ "gpio_18", NULL, "hsusb1_tll_data4", NULL),
+ _OMAP3_MUXENTRY(ETK_D5, 19,
+ "etk_d5", "mcbsp5_fsx", "mmc3_dat1", "hsusb1_data5",
+ "gpio_19", NULL, "hsusb1_tll_data5", NULL),
+ _OMAP3_MUXENTRY(ETK_D6, 20,
+ "etk_d6", "mcbsp5_dx", "mmc3_dat2", "hsusb1_data6",
+ "gpio_20", NULL, "hsusb1_tll_data6", NULL),
+ _OMAP3_MUXENTRY(ETK_D7, 21,
+ "etk_d7", "mcspi3_cs1", "mmc3_dat7", "hsusb1_data3",
+ "gpio_21", "mm1_txen_n", "hsusb1_tll_data3", NULL),
+ _OMAP3_MUXENTRY(ETK_D8, 22,
+ "etk_d8", "sys_drm_msecure", "mmc3_dat6", "hsusb1_dir",
+ "gpio_22", NULL, "hsusb1_tll_dir", NULL),
+ _OMAP3_MUXENTRY(ETK_D9, 23,
+ "etk_d9", "sys_secure_indicator", "mmc3_dat5", "hsusb1_nxt",
+ "gpio_23", "mm1_rxdm", "hsusb1_tll_nxt", NULL),
+ _OMAP3_MUXENTRY(MCBSP3_CLKX, 142,
+ "mcbsp3_clkx", "uart2_tx", NULL, NULL,
+ "gpio_142", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP3_DR, 141,
+ "mcbsp3_dr", "uart2_rts", NULL, NULL,
+ "gpio_141", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP3_DX, 140,
+ "mcbsp3_dx", "uart2_cts", NULL, NULL,
+ "gpio_140", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MCBSP3_FSX, 143,
+ "mcbsp3_fsx", "uart2_rx", NULL, NULL,
+ "gpio_143", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT5, 137,
+ "mmc2_dat5", "mmc2_dir_dat1", "cam_global_reset", "mmc3_dat1",
+ "gpio_137", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT6, 138,
+ "mmc2_dat6", "mmc2_dir_cmd", "cam_shutter", "mmc3_dat2",
+ "gpio_138", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(MMC2_DAT7, 139,
+ "mmc2_dat7", "mmc2_clkin", NULL, "mmc3_dat3",
+ "gpio_139", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(UART1_CTS, 150,
+ "uart1_cts", NULL, NULL, NULL,
+ "gpio_150", NULL, NULL, "safe_mode"),
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+
+/*
+ * Balls for CUS package
+ * 423-pin s-PBGA Package, 0.65mm Ball Pitch (Bottom)
+ */
+#ifdef CONFIG_DEBUG_FS
+struct omap_ball __initdata omap3_cus_ball[] = {
+ _OMAP3_BALLENTRY(CAM_D0, "ab18", NULL),
+ _OMAP3_BALLENTRY(CAM_D1, "ac18", NULL),
+ _OMAP3_BALLENTRY(CAM_D10, "f21", NULL),
+ _OMAP3_BALLENTRY(CAM_D11, "g21", NULL),
+ _OMAP3_BALLENTRY(CAM_D2, "g19", NULL),
+ _OMAP3_BALLENTRY(CAM_D3, "f19", NULL),
+ _OMAP3_BALLENTRY(CAM_D4, "g20", NULL),
+ _OMAP3_BALLENTRY(CAM_D5, "b21", NULL),
+ _OMAP3_BALLENTRY(CAM_D6, "l24", NULL),
+ _OMAP3_BALLENTRY(CAM_D7, "k24", NULL),
+ _OMAP3_BALLENTRY(CAM_D8, "j23", NULL),
+ _OMAP3_BALLENTRY(CAM_D9, "k23", NULL),
+ _OMAP3_BALLENTRY(CAM_FLD, "h24", NULL),
+ _OMAP3_BALLENTRY(CAM_HS, "a22", NULL),
+ _OMAP3_BALLENTRY(CAM_PCLK, "j19", NULL),
+ _OMAP3_BALLENTRY(CAM_STROBE, "j20", NULL),
+ _OMAP3_BALLENTRY(CAM_VS, "e18", NULL),
+ _OMAP3_BALLENTRY(CAM_WEN, "f18", NULL),
+ _OMAP3_BALLENTRY(CAM_XCLKA, "b22", NULL),
+ _OMAP3_BALLENTRY(CAM_XCLKB, "c22", NULL),
+ _OMAP3_BALLENTRY(DSS_ACBIAS, "j21", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA0, "ac19", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA1, "ab19", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA10, "ac22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA11, "ac23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA12, "ab22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA13, "y22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA14, "w22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA15, "v22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA16, "j22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA17, "g23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA18, "g24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA19, "h23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA2, "ad20", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA20, "d23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA21, "k22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA22, "v21", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA23, "w21", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA3, "ac20", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA4, "ad21", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA5, "ac21", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA6, "d24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA7, "e23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA8, "e24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA9, "f23", NULL),
+ _OMAP3_BALLENTRY(DSS_HSYNC, "e22", NULL),
+ _OMAP3_BALLENTRY(DSS_PCLK, "g22", NULL),
+ _OMAP3_BALLENTRY(DSS_VSYNC, "f22", NULL),
+ _OMAP3_BALLENTRY(ETK_CLK, "ac1", NULL),
+ _OMAP3_BALLENTRY(ETK_CTL, "ad3", NULL),
+ _OMAP3_BALLENTRY(ETK_D0, "ad6", NULL),
+ _OMAP3_BALLENTRY(ETK_D1, "ac6", NULL),
+ _OMAP3_BALLENTRY(ETK_D10, "ac3", NULL),
+ _OMAP3_BALLENTRY(ETK_D11, "ac9", NULL),
+ _OMAP3_BALLENTRY(ETK_D12, "ac10", NULL),
+ _OMAP3_BALLENTRY(ETK_D13, "ad11", NULL),
+ _OMAP3_BALLENTRY(ETK_D14, "ac11", NULL),
+ _OMAP3_BALLENTRY(ETK_D15, "ad12", NULL),
+ _OMAP3_BALLENTRY(ETK_D2, "ac7", NULL),
+ _OMAP3_BALLENTRY(ETK_D3, "ad8", NULL),
+ _OMAP3_BALLENTRY(ETK_D4, "ac5", NULL),
+ _OMAP3_BALLENTRY(ETK_D5, "ad2", NULL),
+ _OMAP3_BALLENTRY(ETK_D6, "ac8", NULL),
+ _OMAP3_BALLENTRY(ETK_D7, "ad9", NULL),
+ _OMAP3_BALLENTRY(ETK_D8, "ac4", NULL),
+ _OMAP3_BALLENTRY(ETK_D9, "ad5", NULL),
+ _OMAP3_BALLENTRY(GPMC_A1, "k4", NULL),
+ _OMAP3_BALLENTRY(GPMC_A10, "g2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A2, "k3", NULL),
+ _OMAP3_BALLENTRY(GPMC_A3, "k2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A4, "j4", NULL),
+ _OMAP3_BALLENTRY(GPMC_A5, "j3", NULL),
+ _OMAP3_BALLENTRY(GPMC_A6, "j2", NULL),
+ _OMAP3_BALLENTRY(GPMC_A7, "j1", NULL),
+ _OMAP3_BALLENTRY(GPMC_A8, "h1", NULL),
+ _OMAP3_BALLENTRY(GPMC_A9, "h2", NULL),
+ _OMAP3_BALLENTRY(GPMC_CLK, "w2", NULL),
+ _OMAP3_BALLENTRY(GPMC_D10, "u1", NULL),
+ _OMAP3_BALLENTRY(GPMC_D11, "r3", NULL),
+ _OMAP3_BALLENTRY(GPMC_D12, "t3", NULL),
+ _OMAP3_BALLENTRY(GPMC_D13, "u2", NULL),
+ _OMAP3_BALLENTRY(GPMC_D14, "v1", NULL),
+ _OMAP3_BALLENTRY(GPMC_D15, "v2", NULL),
+ _OMAP3_BALLENTRY(GPMC_D8, "r2", NULL),
+ _OMAP3_BALLENTRY(GPMC_D9, "t2", NULL),
+ _OMAP3_BALLENTRY(GPMC_NBE0_CLE, "k5", NULL),
+ _OMAP3_BALLENTRY(GPMC_NBE1, "l1", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS3, "d2", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS4, "f4", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS5, "g5", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS6, "f3", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS7, "g4", NULL),
+ _OMAP3_BALLENTRY(GPMC_NWP, "e1", NULL),
+ _OMAP3_BALLENTRY(GPMC_WAIT3, "c2", NULL),
+ _OMAP3_BALLENTRY(HDQ_SIO, "a24", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_CLK, "r21", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA0, "t24", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA1, "t23", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA2, "u24", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA3, "u23", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA4, "w24", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA5, "v23", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA6, "w23", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA7, "t22", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DIR, "p23", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_NXT, "r22", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_STP, "r23", NULL),
+ _OMAP3_BALLENTRY(I2C2_SCL, "ac15", NULL),
+ _OMAP3_BALLENTRY(I2C2_SDA, "ac14", NULL),
+ _OMAP3_BALLENTRY(I2C3_SCL, "ac13", NULL),
+ _OMAP3_BALLENTRY(I2C3_SDA, "ac12", NULL),
+ _OMAP3_BALLENTRY(I2C4_SCL, "y16", NULL),
+ _OMAP3_BALLENTRY(I2C4_SDA, "y15", NULL),
+ _OMAP3_BALLENTRY(JTAG_EMU0, "ac24", NULL),
+ _OMAP3_BALLENTRY(JTAG_EMU1, "ad24", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_CLKR, "w19", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_CLKX, "v18", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_DR, "y18", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_DX, "w18", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_FSR, "ab20", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_FSX, "aa19", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_CLKX, "t21", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_DR, "v19", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_DX, "r20", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_FSX, "v20", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_CLKX, "w4", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_DR, "v5", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_DX, "v6", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_FSX, "v4", NULL),
+ _OMAP3_BALLENTRY(MCBSP_CLKS, "aa18", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CLK, "t5", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS0, "t6", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS3, "r5", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_SIMO, "r4", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_SOMI, "t4", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CLK, "n5", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CS0, "m5", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CS1, "m4", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_SIMO, "n4", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_SOMI, "n3", NULL),
+ _OMAP3_BALLENTRY(MMC1_CLK, "m23", NULL),
+ _OMAP3_BALLENTRY(MMC1_CMD, "l23", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT0, "m22", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT1, "m21", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT2, "m20", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT3, "n23", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT4, "n22", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT5, "n21", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT6, "n20", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT7, "p24", NULL),
+ _OMAP3_BALLENTRY(MMC2_CLK, "y1", NULL),
+ _OMAP3_BALLENTRY(MMC2_CMD, "ab5", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT0, "ab3", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT1, "y3", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT2, "w3", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT3, "v3", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT4, "ab2", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT5, "aa2", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT6, "y2", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT7, "aa1", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT0, "ab12", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT1, "ac16", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT2, "ad17", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT3, "ad18", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT4, "ac17", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT5, "ab16", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT6, "aa15", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKOUT1, "y7", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKOUT2, "aa6", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKREQ, "y13", NULL),
+ _OMAP3_BALLENTRY(SYS_NIRQ, "w16", NULL),
+ _OMAP3_BALLENTRY(SYS_NRESWARM, "y10", NULL),
+ _OMAP3_BALLENTRY(SYS_OFF_MODE, "ad23", NULL),
+ _OMAP3_BALLENTRY(UART1_CTS, "ac2", NULL),
+ _OMAP3_BALLENTRY(UART1_RTS, "w6", NULL),
+ _OMAP3_BALLENTRY(UART1_RX, "v7", NULL),
+ _OMAP3_BALLENTRY(UART1_TX, "w7", NULL),
+ _OMAP3_BALLENTRY(UART3_CTS_RCTX, "a23", NULL),
+ _OMAP3_BALLENTRY(UART3_RTS_SD, "b23", NULL),
+ _OMAP3_BALLENTRY(UART3_RX_IRRX, "b24", NULL),
+ _OMAP3_BALLENTRY(UART3_TX_IRTX, "c23", NULL),
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define omap3_cus_ball NULL
+#endif
+
+/*
+ * Pins different on CBB package comapared to CBC package
+ */
+struct omap_mux __initdata omap3_cbb_subset[] = {
+ _OMAP3_MUXENTRY(CAM_D10, 109,
+ "cam_d10", NULL, NULL, NULL,
+ "gpio_109", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D11, 110,
+ "cam_d11", NULL, NULL, NULL,
+ "gpio_110", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D2, 101,
+ "cam_d2", NULL, NULL, NULL,
+ "gpio_101", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D3, 102,
+ "cam_d3", NULL, NULL, NULL,
+ "gpio_102", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D4, 103,
+ "cam_d4", NULL, NULL, NULL,
+ "gpio_103", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_D5, 104,
+ "cam_d5", NULL, NULL, NULL,
+ "gpio_104", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_FLD, 98,
+ "cam_fld", NULL, "cam_global_reset", NULL,
+ "gpio_98", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_HS, 94,
+ "cam_hs", NULL, NULL, NULL,
+ "gpio_94", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_PCLK, 97,
+ "cam_pclk", NULL, NULL, NULL,
+ "gpio_97", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_STROBE, 126,
+ "cam_strobe", NULL, NULL, NULL,
+ "gpio_126", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_VS, 95,
+ "cam_vs", NULL, NULL, NULL,
+ "gpio_95", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(CAM_WEN, 167,
+ "cam_wen", NULL, "cam_shutter", NULL,
+ "gpio_167", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA6, 76,
+ "dss_data6", NULL, "uart1_tx", NULL,
+ "gpio_76", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA7, 77,
+ "dss_data7", NULL, "uart1_rx", NULL,
+ "gpio_77", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA8, 78,
+ "dss_data8", NULL, NULL, NULL,
+ "gpio_78", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_DATA9, 79,
+ "dss_data9", NULL, NULL, NULL,
+ "gpio_79", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_HSYNC, 67,
+ "dss_hsync", NULL, NULL, NULL,
+ "gpio_67", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(DSS_PCLK, 66,
+ "dss_pclk", NULL, NULL, NULL,
+ "gpio_66", NULL, NULL, "safe_mode"),
+ _OMAP3_MUXENTRY(ETK_CLK, 12,
+ "etk_clk", "mcbsp5_clkx", "mmc3_clk", "hsusb1_stp",
+ "gpio_12", "mm1_rxdp", "hsusb1_tll_stp", NULL),
+ _OMAP3_MUXENTRY(ETK_CTL, 13,
+ "etk_ctl", NULL, "mmc3_cmd", "hsusb1_clk",
+ "gpio_13", NULL, "hsusb1_tll_clk", NULL),
+ _OMAP3_MUXENTRY(ETK_D0, 14,
+ "etk_d0", "mcspi3_simo", "mmc3_dat4", "hsusb1_data0",
+ "gpio_14", "mm1_rxrcv", "hsusb1_tll_data0", NULL),
+ _OMAP3_MUXENTRY(ETK_D1, 15,
+ "etk_d1", "mcspi3_somi", NULL, "hsusb1_data1",
+ "gpio_15", "mm1_txse0", "hsusb1_tll_data1", NULL),
+ _OMAP3_MUXENTRY(ETK_D10, 24,
+ "etk_d10", NULL, "uart1_rx", "hsusb2_clk",
+ "gpio_24", NULL, "hsusb2_tll_clk", NULL),
+ _OMAP3_MUXENTRY(ETK_D11, 25,
+ "etk_d11", NULL, NULL, "hsusb2_stp",
+ "gpio_25", "mm2_rxdp", "hsusb2_tll_stp", NULL),
+ _OMAP3_MUXENTRY(ETK_D12, 26,
+ "etk_d12", NULL, NULL, "hsusb2_dir",
+ "gpio_26", NULL, "hsusb2_tll_dir", NULL),
+ _OMAP3_MUXENTRY(ETK_D13, 27,
+ "etk_d13", NULL, NULL, "hsusb2_nxt",
+ "gpio_27", "mm2_rxdm", "hsusb2_tll_nxt", NULL),
+ _OMAP3_MUXENTRY(ETK_D14, 28,
+ "etk_d14", NULL, NULL, "hsusb2_data0",
+ "gpio_28", "mm2_rxrcv", "hsusb2_tll_data0", NULL),
+ _OMAP3_MUXENTRY(ETK_D15, 29,
+ "etk_d15", NULL, NULL, "hsusb2_data1",
+ "gpio_29", "mm2_txse0", "hsusb2_tll_data1", NULL),
+ _OMAP3_MUXENTRY(ETK_D2, 16,
+ "etk_d2", "mcspi3_cs0", NULL, "hsusb1_data2",
+ "gpio_16", "mm1_txdat", "hsusb1_tll_data2", NULL),
+ _OMAP3_MUXENTRY(ETK_D3, 17,
+ "etk_d3", "mcspi3_clk", "mmc3_dat3", "hsusb1_data7",
+ "gpio_17", NULL, "hsusb1_tll_data7", NULL),
+ _OMAP3_MUXENTRY(ETK_D4, 18,
+ "etk_d4", "mcbsp5_dr", "mmc3_dat0", "hsusb1_data4",
+ "gpio_18", NULL, "hsusb1_tll_data4", NULL),
+ _OMAP3_MUXENTRY(ETK_D5, 19,
+ "etk_d5", "mcbsp5_fsx", "mmc3_dat1", "hsusb1_data5",
+ "gpio_19", NULL, "hsusb1_tll_data5", NULL),
+ _OMAP3_MUXENTRY(ETK_D6, 20,
+ "etk_d6", "mcbsp5_dx", "mmc3_dat2", "hsusb1_data6",
+ "gpio_20", NULL, "hsusb1_tll_data6", NULL),
+ _OMAP3_MUXENTRY(ETK_D7, 21,
+ "etk_d7", "mcspi3_cs1", "mmc3_dat7", "hsusb1_data3",
+ "gpio_21", "mm1_txen_n", "hsusb1_tll_data3", NULL),
+ _OMAP3_MUXENTRY(ETK_D8, 22,
+ "etk_d8", "sys_drm_msecure", "mmc3_dat6", "hsusb1_dir",
+ "gpio_22", NULL, "hsusb1_tll_dir", NULL),
+ _OMAP3_MUXENTRY(ETK_D9, 23,
+ "etk_d9", "sys_secure_indicator", "mmc3_dat5", "hsusb1_nxt",
+ "gpio_23", "mm1_rxdm", "hsusb1_tll_nxt", NULL),
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+
+/*
+ * Balls for CBB package
+ * 515-pin s-PBGA Package, 0.50mm Ball Pitch (Top), 0.40mm Ball Pitch (Bottom)
+ */
+#ifdef CONFIG_DEBUG_FS
+struct omap_ball __initdata omap3_cbb_ball[] = {
+ _OMAP3_BALLENTRY(CAM_D0, "ag17", NULL),
+ _OMAP3_BALLENTRY(CAM_D1, "ah17", NULL),
+ _OMAP3_BALLENTRY(CAM_D10, "b25", NULL),
+ _OMAP3_BALLENTRY(CAM_D11, "c26", NULL),
+ _OMAP3_BALLENTRY(CAM_D2, "b24", NULL),
+ _OMAP3_BALLENTRY(CAM_D3, "c24", NULL),
+ _OMAP3_BALLENTRY(CAM_D4, "d24", NULL),
+ _OMAP3_BALLENTRY(CAM_D5, "a25", NULL),
+ _OMAP3_BALLENTRY(CAM_D6, "k28", NULL),
+ _OMAP3_BALLENTRY(CAM_D7, "l28", NULL),
+ _OMAP3_BALLENTRY(CAM_D8, "k27", NULL),
+ _OMAP3_BALLENTRY(CAM_D9, "l27", NULL),
+ _OMAP3_BALLENTRY(CAM_FLD, "c23", NULL),
+ _OMAP3_BALLENTRY(CAM_HS, "a24", NULL),
+ _OMAP3_BALLENTRY(CAM_PCLK, "c27", NULL),
+ _OMAP3_BALLENTRY(CAM_STROBE, "d25", NULL),
+ _OMAP3_BALLENTRY(CAM_VS, "a23", NULL),
+ _OMAP3_BALLENTRY(CAM_WEN, "b23", NULL),
+ _OMAP3_BALLENTRY(CAM_XCLKA, "c25", NULL),
+ _OMAP3_BALLENTRY(CAM_XCLKB, "b26", NULL),
+ _OMAP3_BALLENTRY(CSI2_DX0, "ag19", NULL),
+ _OMAP3_BALLENTRY(CSI2_DX1, "ag18", NULL),
+ _OMAP3_BALLENTRY(CSI2_DY0, "ah19", NULL),
+ _OMAP3_BALLENTRY(CSI2_DY1, "ah18", NULL),
+ _OMAP3_BALLENTRY(DSS_ACBIAS, "e27", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA0, "ag22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA1, "ah22", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA10, "ad28", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA11, "ad27", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA12, "ab28", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA13, "ab27", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA14, "aa28", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA15, "aa27", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA16, "g25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA17, "h27", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA18, "h26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA19, "h25", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA2, "ag23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA20, "e28", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA21, "j26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA22, "ac27", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA23, "ac28", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA3, "ah23", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA4, "ag24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA5, "ah24", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA6, "e26", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA7, "f28", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA8, "f27", NULL),
+ _OMAP3_BALLENTRY(DSS_DATA9, "g26", NULL),
+ _OMAP3_BALLENTRY(DSS_HSYNC, "d26", NULL),
+ _OMAP3_BALLENTRY(DSS_PCLK, "d28", NULL),
+ _OMAP3_BALLENTRY(DSS_VSYNC, "d27", NULL),
+ _OMAP3_BALLENTRY(ETK_CLK, "af10", NULL),
+ _OMAP3_BALLENTRY(ETK_CTL, "ae10", NULL),
+ _OMAP3_BALLENTRY(ETK_D0, "af11", NULL),
+ _OMAP3_BALLENTRY(ETK_D1, "ag12", NULL),
+ _OMAP3_BALLENTRY(ETK_D10, "ae7", NULL),
+ _OMAP3_BALLENTRY(ETK_D11, "af7", NULL),
+ _OMAP3_BALLENTRY(ETK_D12, "ag7", NULL),
+ _OMAP3_BALLENTRY(ETK_D13, "ah7", NULL),
+ _OMAP3_BALLENTRY(ETK_D14, "ag8", NULL),
+ _OMAP3_BALLENTRY(ETK_D15, "ah8", NULL),
+ _OMAP3_BALLENTRY(ETK_D2, "ah12", NULL),
+ _OMAP3_BALLENTRY(ETK_D3, "ae13", NULL),
+ _OMAP3_BALLENTRY(ETK_D4, "ae11", NULL),
+ _OMAP3_BALLENTRY(ETK_D5, "ah9", NULL),
+ _OMAP3_BALLENTRY(ETK_D6, "af13", NULL),
+ _OMAP3_BALLENTRY(ETK_D7, "ah14", NULL),
+ _OMAP3_BALLENTRY(ETK_D8, "af9", NULL),
+ _OMAP3_BALLENTRY(ETK_D9, "ag9", NULL),
+ _OMAP3_BALLENTRY(GPMC_A1, "n4", "ac15"),
+ _OMAP3_BALLENTRY(GPMC_A10, "k3", "ab19"),
+ _OMAP3_BALLENTRY(GPMC_A2, "m4", "ab15"),
+ _OMAP3_BALLENTRY(GPMC_A3, "l4", "ac16"),
+ _OMAP3_BALLENTRY(GPMC_A4, "k4", "ab16"),
+ _OMAP3_BALLENTRY(GPMC_A5, "t3", "ac17"),
+ _OMAP3_BALLENTRY(GPMC_A6, "r3", "ab17"),
+ _OMAP3_BALLENTRY(GPMC_A7, "n3", "ac18"),
+ _OMAP3_BALLENTRY(GPMC_A8, "m3", "ab18"),
+ _OMAP3_BALLENTRY(GPMC_A9, "l3", "ac19"),
+ _OMAP3_BALLENTRY(GPMC_CLK, "t4", "w2"),
+ _OMAP3_BALLENTRY(GPMC_D10, "p1", "ab4"),
+ _OMAP3_BALLENTRY(GPMC_D11, "r1", "ac4"),
+ _OMAP3_BALLENTRY(GPMC_D12, "r2", "ab6"),
+ _OMAP3_BALLENTRY(GPMC_D13, "t2", "ac6"),
+ _OMAP3_BALLENTRY(GPMC_D14, "w1", "ab7"),
+ _OMAP3_BALLENTRY(GPMC_D15, "y1", "ac7"),
+ _OMAP3_BALLENTRY(GPMC_D8, "h2", "ab3"),
+ _OMAP3_BALLENTRY(GPMC_D9, "k2", "ac3"),
+ _OMAP3_BALLENTRY(GPMC_NBE0_CLE, "g3", "ac12"),
+ _OMAP3_BALLENTRY(GPMC_NBE1, "u3", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS1, "h3", "y1"),
+ _OMAP3_BALLENTRY(GPMC_NCS2, "v8", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS3, "u8", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS4, "t8", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS5, "r8", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS6, "p8", NULL),
+ _OMAP3_BALLENTRY(GPMC_NCS7, "n8", NULL),
+ _OMAP3_BALLENTRY(GPMC_NWP, "h1", "ab10"),
+ _OMAP3_BALLENTRY(GPMC_WAIT1, "l8", "ac10"),
+ _OMAP3_BALLENTRY(GPMC_WAIT2, "k8", NULL),
+ _OMAP3_BALLENTRY(GPMC_WAIT3, "j8", NULL),
+ _OMAP3_BALLENTRY(HDQ_SIO, "j25", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_CLK, "t28", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA0, "t27", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA1, "u28", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA2, "u27", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA3, "u26", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA4, "u25", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA5, "v28", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA6, "v27", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DATA7, "v26", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_DIR, "r28", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_NXT, "t26", NULL),
+ _OMAP3_BALLENTRY(HSUSB0_STP, "t25", NULL),
+ _OMAP3_BALLENTRY(I2C2_SCL, "af15", NULL),
+ _OMAP3_BALLENTRY(I2C2_SDA, "ae15", NULL),
+ _OMAP3_BALLENTRY(I2C3_SCL, "af14", NULL),
+ _OMAP3_BALLENTRY(I2C3_SDA, "ag14", NULL),
+ _OMAP3_BALLENTRY(I2C4_SCL, "ad26", NULL),
+ _OMAP3_BALLENTRY(I2C4_SDA, "ae26", NULL),
+ _OMAP3_BALLENTRY(JTAG_EMU0, "aa11", NULL),
+ _OMAP3_BALLENTRY(JTAG_EMU1, "aa10", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_CLKR, "y21", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_CLKX, "w21", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_DR, "u21", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_DX, "v21", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_FSR, "aa21", NULL),
+ _OMAP3_BALLENTRY(MCBSP1_FSX, "k26", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_CLKX, "n21", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_DR, "r21", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_DX, "m21", NULL),
+ _OMAP3_BALLENTRY(MCBSP2_FSX, "p21", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_CLKX, "af5", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_DR, "ae6", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_DX, "af6", NULL),
+ _OMAP3_BALLENTRY(MCBSP3_FSX, "ae5", NULL),
+ _OMAP3_BALLENTRY(MCBSP4_CLKX, "ae1", NULL),
+ _OMAP3_BALLENTRY(MCBSP4_DR, "ad1", NULL),
+ _OMAP3_BALLENTRY(MCBSP4_DX, "ad2", NULL),
+ _OMAP3_BALLENTRY(MCBSP4_FSX, "ac1", NULL),
+ _OMAP3_BALLENTRY(MCBSP_CLKS, "t21", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CLK, "ab3", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS0, "ac2", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS1, "ac3", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS2, "ab1", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_CS3, "ab2", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_SIMO, "ab4", NULL),
+ _OMAP3_BALLENTRY(MCSPI1_SOMI, "aa4", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CLK, "aa3", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CS0, "y4", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_CS1, "v3", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_SIMO, "y2", NULL),
+ _OMAP3_BALLENTRY(MCSPI2_SOMI, "y3", NULL),
+ _OMAP3_BALLENTRY(MMC1_CLK, "n28", NULL),
+ _OMAP3_BALLENTRY(MMC1_CMD, "m27", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT0, "n27", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT1, "n26", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT2, "n25", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT3, "p28", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT4, "p27", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT5, "p26", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT6, "r27", NULL),
+ _OMAP3_BALLENTRY(MMC1_DAT7, "r25", NULL),
+ _OMAP3_BALLENTRY(MMC2_CLK, "ae2", NULL),
+ _OMAP3_BALLENTRY(MMC2_CMD, "ag5", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT0, "ah5", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT1, "ah4", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT2, "ag4", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT3, "af4", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT4, "ae4", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT5, "ah3", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT6, "af3", NULL),
+ _OMAP3_BALLENTRY(MMC2_DAT7, "ae3", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT0, "ah26", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT1, "ag26", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT2, "ae14", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT3, "af18", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT4, "af19", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT5, "ae21", NULL),
+ _OMAP3_BALLENTRY(SYS_BOOT6, "af21", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKOUT1, "ag25", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKOUT2, "ae22", NULL),
+ _OMAP3_BALLENTRY(SYS_CLKREQ, "af25", NULL),
+ _OMAP3_BALLENTRY(SYS_NIRQ, "af26", NULL),
+ _OMAP3_BALLENTRY(SYS_NRESWARM, "af24", NULL),
+ _OMAP3_BALLENTRY(SYS_OFF_MODE, "af22", NULL),
+ _OMAP3_BALLENTRY(UART1_CTS, "w8", NULL),
+ _OMAP3_BALLENTRY(UART1_RTS, "aa9", NULL),
+ _OMAP3_BALLENTRY(UART1_RX, "y8", NULL),
+ _OMAP3_BALLENTRY(UART1_TX, "aa8", NULL),
+ _OMAP3_BALLENTRY(UART2_CTS, "ab26", NULL),
+ _OMAP3_BALLENTRY(UART2_RTS, "ab25", NULL),
+ _OMAP3_BALLENTRY(UART2_RX, "ad25", NULL),
+ _OMAP3_BALLENTRY(UART2_TX, "aa25", NULL),
+ _OMAP3_BALLENTRY(UART3_CTS_RCTX, "h18", NULL),
+ _OMAP3_BALLENTRY(UART3_RTS_SD, "h19", NULL),
+ _OMAP3_BALLENTRY(UART3_RX_IRRX, "h20", NULL),
+ _OMAP3_BALLENTRY(UART3_TX_IRTX, "h21", NULL),
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define omap3_cbb_ball NULL
+#endif
+
+int __init omap3_mux_init(struct omap_board_mux *board_subset, int flags)
+{
+ struct omap_mux *package_subset;
+ struct omap_ball *package_balls;
+
+ switch (flags & OMAP_PACKAGE_MASK) {
+ case (OMAP_PACKAGE_CBC):
+ package_subset = omap3_cbc_subset;
+ package_balls = omap3_cbc_ball;
+ break;
+ case (OMAP_PACKAGE_CBB):
+ package_subset = omap3_cbb_subset;
+ package_balls = omap3_cbb_ball;
+ break;
+ case (OMAP_PACKAGE_CUS):
+ package_subset = omap3_cus_subset;
+ package_balls = omap3_cus_ball;
+ break;
+ default:
+ printk(KERN_ERR "mux: Unknown omap package, mux disabled\n");
+ return -EINVAL;
+ }
+
+ return omap_mux_init(OMAP3_CONTROL_PADCONF_MUX_PBASE,
+ OMAP3_CONTROL_PADCONF_MUX_SIZE,
+ omap3_muxmodes, package_subset, board_subset,
+ package_balls, flags);
+}
diff --git a/arch/arm/mach-omap2/mux34xx.h b/arch/arm/mach-omap2/mux34xx.h
new file mode 100644
index 0000000..8c5f261
--- /dev/null
+++ b/arch/arm/mach-omap2/mux34xx.h
@@ -0,0 +1,352 @@
+/*
+ * Copyright (C) 2009 Nokia
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define OMAP3_CONTROL_PADCONF_MUX_PBASE 0x48002030LU
+
+#define OMAP3_MUX(mode0, mux_value, mux_flags) \
+{ \
+ .reg_offset = (OMAP3_CONTROL_PADCONF_##mode0##_OFFSET), \
+ .value = (mux_value), \
+ .flags = (mux_flags), \
+}
+
+/*
+ * OMAP3 CONTROL_PADCONF* register offsets for pin-muxing
+ *
+ * Extracted from the TRM. Add 0x48002030 to these values to get the
+ * absolute addresses. The name in the macro is the mode-0 name of
+ * the pin. NOTE: These registers are 16-bits wide.
+ */
+#define OMAP3_CONTROL_PADCONF_SDRC_D0_OFFSET 0x000
+#define OMAP3_CONTROL_PADCONF_SDRC_D1_OFFSET 0x002
+#define OMAP3_CONTROL_PADCONF_SDRC_D2_OFFSET 0x004
+#define OMAP3_CONTROL_PADCONF_SDRC_D3_OFFSET 0x006
+#define OMAP3_CONTROL_PADCONF_SDRC_D4_OFFSET 0x008
+#define OMAP3_CONTROL_PADCONF_SDRC_D5_OFFSET 0x00a
+#define OMAP3_CONTROL_PADCONF_SDRC_D6_OFFSET 0x00c
+#define OMAP3_CONTROL_PADCONF_SDRC_D7_OFFSET 0x00e
+#define OMAP3_CONTROL_PADCONF_SDRC_D8_OFFSET 0x010
+#define OMAP3_CONTROL_PADCONF_SDRC_D9_OFFSET 0x012
+#define OMAP3_CONTROL_PADCONF_SDRC_D10_OFFSET 0x014
+#define OMAP3_CONTROL_PADCONF_SDRC_D11_OFFSET 0x016
+#define OMAP3_CONTROL_PADCONF_SDRC_D12_OFFSET 0x018
+#define OMAP3_CONTROL_PADCONF_SDRC_D13_OFFSET 0x01a
+#define OMAP3_CONTROL_PADCONF_SDRC_D14_OFFSET 0x01c
+#define OMAP3_CONTROL_PADCONF_SDRC_D15_OFFSET 0x01e
+#define OMAP3_CONTROL_PADCONF_SDRC_D16_OFFSET 0x020
+#define OMAP3_CONTROL_PADCONF_SDRC_D17_OFFSET 0x022
+#define OMAP3_CONTROL_PADCONF_SDRC_D18_OFFSET 0x024
+#define OMAP3_CONTROL_PADCONF_SDRC_D19_OFFSET 0x026
+#define OMAP3_CONTROL_PADCONF_SDRC_D20_OFFSET 0x028
+#define OMAP3_CONTROL_PADCONF_SDRC_D21_OFFSET 0x02a
+#define OMAP3_CONTROL_PADCONF_SDRC_D22_OFFSET 0x02c
+#define OMAP3_CONTROL_PADCONF_SDRC_D23_OFFSET 0x02e
+#define OMAP3_CONTROL_PADCONF_SDRC_D24_OFFSET 0x030
+#define OMAP3_CONTROL_PADCONF_SDRC_D25_OFFSET 0x032
+#define OMAP3_CONTROL_PADCONF_SDRC_D26_OFFSET 0x034
+#define OMAP3_CONTROL_PADCONF_SDRC_D27_OFFSET 0x036
+#define OMAP3_CONTROL_PADCONF_SDRC_D28_OFFSET 0x038
+#define OMAP3_CONTROL_PADCONF_SDRC_D29_OFFSET 0x03a
+#define OMAP3_CONTROL_PADCONF_SDRC_D30_OFFSET 0x03c
+#define OMAP3_CONTROL_PADCONF_SDRC_D31_OFFSET 0x03e
+#define OMAP3_CONTROL_PADCONF_SDRC_CLK_OFFSET 0x040
+#define OMAP3_CONTROL_PADCONF_SDRC_DQS0_OFFSET 0x042
+#define OMAP3_CONTROL_PADCONF_SDRC_CKE0_OFFSET 0x232
+#define OMAP3_CONTROL_PADCONF_SDRC_CKE1_OFFSET 0x234
+#define OMAP3_CONTROL_PADCONF_SDRC_DQS1_OFFSET 0x044
+#define OMAP3_CONTROL_PADCONF_SDRC_DQS2_OFFSET 0x046
+#define OMAP3_CONTROL_PADCONF_SDRC_DQS3_OFFSET 0x048
+#define OMAP3_CONTROL_PADCONF_GPMC_A1_OFFSET 0x04a
+#define OMAP3_CONTROL_PADCONF_GPMC_A2_OFFSET 0x04c
+#define OMAP3_CONTROL_PADCONF_GPMC_A3_OFFSET 0x04e
+#define OMAP3_CONTROL_PADCONF_GPMC_A4_OFFSET 0x050
+#define OMAP3_CONTROL_PADCONF_GPMC_A5_OFFSET 0x052
+#define OMAP3_CONTROL_PADCONF_GPMC_A6_OFFSET 0x054
+#define OMAP3_CONTROL_PADCONF_GPMC_A7_OFFSET 0x056
+#define OMAP3_CONTROL_PADCONF_GPMC_A8_OFFSET 0x058
+#define OMAP3_CONTROL_PADCONF_GPMC_A9_OFFSET 0x05a
+#define OMAP3_CONTROL_PADCONF_GPMC_A10_OFFSET 0x05c
+#define OMAP3_CONTROL_PADCONF_GPMC_D0_OFFSET 0x05e
+#define OMAP3_CONTROL_PADCONF_GPMC_D1_OFFSET 0x060
+#define OMAP3_CONTROL_PADCONF_GPMC_D2_OFFSET 0x062
+#define OMAP3_CONTROL_PADCONF_GPMC_D3_OFFSET 0x064
+#define OMAP3_CONTROL_PADCONF_GPMC_D4_OFFSET 0x066
+#define OMAP3_CONTROL_PADCONF_GPMC_D5_OFFSET 0x068
+#define OMAP3_CONTROL_PADCONF_GPMC_D6_OFFSET 0x06a
+#define OMAP3_CONTROL_PADCONF_GPMC_D7_OFFSET 0x06c
+#define OMAP3_CONTROL_PADCONF_GPMC_D8_OFFSET 0x06e
+#define OMAP3_CONTROL_PADCONF_GPMC_D9_OFFSET 0x070
+#define OMAP3_CONTROL_PADCONF_GPMC_D10_OFFSET 0x072
+#define OMAP3_CONTROL_PADCONF_GPMC_D11_OFFSET 0x074
+#define OMAP3_CONTROL_PADCONF_GPMC_D12_OFFSET 0x076
+#define OMAP3_CONTROL_PADCONF_GPMC_D13_OFFSET 0x078
+#define OMAP3_CONTROL_PADCONF_GPMC_D14_OFFSET 0x07a
+#define OMAP3_CONTROL_PADCONF_GPMC_D15_OFFSET 0x07c
+#define OMAP3_CONTROL_PADCONF_GPMC_NCS0_OFFSET 0x07e
+#define OMAP3_CONTROL_PADCONF_GPMC_NCS1_OFFSET 0x080
+#define OMAP3_CONTROL_PADCONF_GPMC_NCS2_OFFSET 0x082
+#define OMAP3_CONTROL_PADCONF_GPMC_NCS3_OFFSET 0x084
+#define OMAP3_CONTROL_PADCONF_GPMC_NCS4_OFFSET 0x086
+#define OMAP3_CONTROL_PADCONF_GPMC_NCS5_OFFSET 0x088
+#define OMAP3_CONTROL_PADCONF_GPMC_NCS6_OFFSET 0x08a
+#define OMAP3_CONTROL_PADCONF_GPMC_NCS7_OFFSET 0x08c
+#define OMAP3_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x08e
+#define OMAP3_CONTROL_PADCONF_GPMC_NADV_ALE_OFFSET 0x090
+#define OMAP3_CONTROL_PADCONF_GPMC_NOE_OFFSET 0x092
+#define OMAP3_CONTROL_PADCONF_GPMC_NWE_OFFSET 0x094
+#define OMAP3_CONTROL_PADCONF_GPMC_NBE0_CLE_OFFSET 0x096
+#define OMAP3_CONTROL_PADCONF_GPMC_NBE1_OFFSET 0x098
+#define OMAP3_CONTROL_PADCONF_GPMC_NWP_OFFSET 0x09a
+#define OMAP3_CONTROL_PADCONF_GPMC_WAIT0_OFFSET 0x09c
+#define OMAP3_CONTROL_PADCONF_GPMC_WAIT1_OFFSET 0x09e
+#define OMAP3_CONTROL_PADCONF_GPMC_WAIT2_OFFSET 0x0a0
+#define OMAP3_CONTROL_PADCONF_GPMC_WAIT3_OFFSET 0x0a2
+#define OMAP3_CONTROL_PADCONF_DSS_PCLK_OFFSET 0x0a4
+#define OMAP3_CONTROL_PADCONF_DSS_HSYNC_OFFSET 0x0a6
+#define OMAP3_CONTROL_PADCONF_DSS_VSYNC_OFFSET 0x0a8
+#define OMAP3_CONTROL_PADCONF_DSS_ACBIAS_OFFSET 0x0aa
+#define OMAP3_CONTROL_PADCONF_DSS_DATA0_OFFSET 0x0ac
+#define OMAP3_CONTROL_PADCONF_DSS_DATA1_OFFSET 0x0ae
+#define OMAP3_CONTROL_PADCONF_DSS_DATA2_OFFSET 0x0b0
+#define OMAP3_CONTROL_PADCONF_DSS_DATA3_OFFSET 0x0b2
+#define OMAP3_CONTROL_PADCONF_DSS_DATA4_OFFSET 0x0b4
+#define OMAP3_CONTROL_PADCONF_DSS_DATA5_OFFSET 0x0b6
+#define OMAP3_CONTROL_PADCONF_DSS_DATA6_OFFSET 0x0b8
+#define OMAP3_CONTROL_PADCONF_DSS_DATA7_OFFSET 0x0ba
+#define OMAP3_CONTROL_PADCONF_DSS_DATA8_OFFSET 0x0bc
+#define OMAP3_CONTROL_PADCONF_DSS_DATA9_OFFSET 0x0be
+#define OMAP3_CONTROL_PADCONF_DSS_DATA10_OFFSET 0x0c0
+#define OMAP3_CONTROL_PADCONF_DSS_DATA11_OFFSET 0x0c2
+#define OMAP3_CONTROL_PADCONF_DSS_DATA12_OFFSET 0x0c4
+#define OMAP3_CONTROL_PADCONF_DSS_DATA13_OFFSET 0x0c6
+#define OMAP3_CONTROL_PADCONF_DSS_DATA14_OFFSET 0x0c8
+#define OMAP3_CONTROL_PADCONF_DSS_DATA15_OFFSET 0x0ca
+#define OMAP3_CONTROL_PADCONF_DSS_DATA16_OFFSET 0x0cc
+#define OMAP3_CONTROL_PADCONF_DSS_DATA17_OFFSET 0x0ce
+#define OMAP3_CONTROL_PADCONF_DSS_DATA18_OFFSET 0x0d0
+#define OMAP3_CONTROL_PADCONF_DSS_DATA19_OFFSET 0x0d2
+#define OMAP3_CONTROL_PADCONF_DSS_DATA20_OFFSET 0x0d4
+#define OMAP3_CONTROL_PADCONF_DSS_DATA21_OFFSET 0x0d6
+#define OMAP3_CONTROL_PADCONF_DSS_DATA22_OFFSET 0x0d8
+#define OMAP3_CONTROL_PADCONF_DSS_DATA23_OFFSET 0x0da
+#define OMAP3_CONTROL_PADCONF_CAM_HS_OFFSET 0x0dc
+#define OMAP3_CONTROL_PADCONF_CAM_VS_OFFSET 0x0de
+#define OMAP3_CONTROL_PADCONF_CAM_XCLKA_OFFSET 0x0e0
+#define OMAP3_CONTROL_PADCONF_CAM_PCLK_OFFSET 0x0e2
+#define OMAP3_CONTROL_PADCONF_CAM_FLD_OFFSET 0x0e4
+#define OMAP3_CONTROL_PADCONF_CAM_D0_OFFSET 0x0e6
+#define OMAP3_CONTROL_PADCONF_CAM_D1_OFFSET 0x0e8
+#define OMAP3_CONTROL_PADCONF_CAM_D2_OFFSET 0x0ea
+#define OMAP3_CONTROL_PADCONF_CAM_D3_OFFSET 0x0ec
+#define OMAP3_CONTROL_PADCONF_CAM_D4_OFFSET 0x0ee
+#define OMAP3_CONTROL_PADCONF_CAM_D5_OFFSET 0x0f0
+#define OMAP3_CONTROL_PADCONF_CAM_D6_OFFSET 0x0f2
+#define OMAP3_CONTROL_PADCONF_CAM_D7_OFFSET 0x0f4
+#define OMAP3_CONTROL_PADCONF_CAM_D8_OFFSET 0x0f6
+#define OMAP3_CONTROL_PADCONF_CAM_D9_OFFSET 0x0f8
+#define OMAP3_CONTROL_PADCONF_CAM_D10_OFFSET 0x0fa
+#define OMAP3_CONTROL_PADCONF_CAM_D11_OFFSET 0x0fc
+#define OMAP3_CONTROL_PADCONF_CAM_XCLKB_OFFSET 0x0fe
+#define OMAP3_CONTROL_PADCONF_CAM_WEN_OFFSET 0x100
+#define OMAP3_CONTROL_PADCONF_CAM_STROBE_OFFSET 0x102
+#define OMAP3_CONTROL_PADCONF_CSI2_DX0_OFFSET 0x104
+#define OMAP3_CONTROL_PADCONF_CSI2_DY0_OFFSET 0x106
+#define OMAP3_CONTROL_PADCONF_CSI2_DX1_OFFSET 0x108
+#define OMAP3_CONTROL_PADCONF_CSI2_DY1_OFFSET 0x10a
+#define OMAP3_CONTROL_PADCONF_MCBSP2_FSX_OFFSET 0x10c
+#define OMAP3_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET 0x10e
+#define OMAP3_CONTROL_PADCONF_MCBSP2_DR_OFFSET 0x110
+#define OMAP3_CONTROL_PADCONF_MCBSP2_DX_OFFSET 0x112
+#define OMAP3_CONTROL_PADCONF_MMC1_CLK_OFFSET 0x114
+#define OMAP3_CONTROL_PADCONF_MMC1_CMD_OFFSET 0x116
+#define OMAP3_CONTROL_PADCONF_MMC1_DAT0_OFFSET 0x118
+#define OMAP3_CONTROL_PADCONF_MMC1_DAT1_OFFSET 0x11a
+#define OMAP3_CONTROL_PADCONF_MMC1_DAT2_OFFSET 0x11c
+#define OMAP3_CONTROL_PADCONF_MMC1_DAT3_OFFSET 0x11e
+#define OMAP3_CONTROL_PADCONF_MMC1_DAT4_OFFSET 0x120
+#define OMAP3_CONTROL_PADCONF_MMC1_DAT5_OFFSET 0x122
+#define OMAP3_CONTROL_PADCONF_MMC1_DAT6_OFFSET 0x124
+#define OMAP3_CONTROL_PADCONF_MMC1_DAT7_OFFSET 0x126
+#define OMAP3_CONTROL_PADCONF_MMC2_CLK_OFFSET 0x128
+#define OMAP3_CONTROL_PADCONF_MMC2_CMD_OFFSET 0x12a
+#define OMAP3_CONTROL_PADCONF_MMC2_DAT0_OFFSET 0x12c
+#define OMAP3_CONTROL_PADCONF_MMC2_DAT1_OFFSET 0x12e
+#define OMAP3_CONTROL_PADCONF_MMC2_DAT2_OFFSET 0x130
+#define OMAP3_CONTROL_PADCONF_MMC2_DAT3_OFFSET 0x132
+#define OMAP3_CONTROL_PADCONF_MMC2_DAT4_OFFSET 0x134
+#define OMAP3_CONTROL_PADCONF_MMC2_DAT5_OFFSET 0x136
+#define OMAP3_CONTROL_PADCONF_MMC2_DAT6_OFFSET 0x138
+#define OMAP3_CONTROL_PADCONF_MMC2_DAT7_OFFSET 0x13a
+#define OMAP3_CONTROL_PADCONF_MCBSP3_DX_OFFSET 0x13c
+#define OMAP3_CONTROL_PADCONF_MCBSP3_DR_OFFSET 0x13e
+#define OMAP3_CONTROL_PADCONF_MCBSP3_CLKX_OFFSET 0x140
+#define OMAP3_CONTROL_PADCONF_MCBSP3_FSX_OFFSET 0x142
+#define OMAP3_CONTROL_PADCONF_UART2_CTS_OFFSET 0x144
+#define OMAP3_CONTROL_PADCONF_UART2_RTS_OFFSET 0x146
+#define OMAP3_CONTROL_PADCONF_UART2_TX_OFFSET 0x148
+#define OMAP3_CONTROL_PADCONF_UART2_RX_OFFSET 0x14a
+#define OMAP3_CONTROL_PADCONF_UART1_TX_OFFSET 0x14c
+#define OMAP3_CONTROL_PADCONF_UART1_RTS_OFFSET 0x14e
+#define OMAP3_CONTROL_PADCONF_UART1_CTS_OFFSET 0x150
+#define OMAP3_CONTROL_PADCONF_UART1_RX_OFFSET 0x152
+#define OMAP3_CONTROL_PADCONF_MCBSP4_CLKX_OFFSET 0x154
+#define OMAP3_CONTROL_PADCONF_MCBSP4_DR_OFFSET 0x156
+#define OMAP3_CONTROL_PADCONF_MCBSP4_DX_OFFSET 0x158
+#define OMAP3_CONTROL_PADCONF_MCBSP4_FSX_OFFSET 0x15a
+#define OMAP3_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET 0x15c
+#define OMAP3_CONTROL_PADCONF_MCBSP1_FSR_OFFSET 0x15e
+#define OMAP3_CONTROL_PADCONF_MCBSP1_DX_OFFSET 0x160
+#define OMAP3_CONTROL_PADCONF_MCBSP1_DR_OFFSET 0x162
+#define OMAP3_CONTROL_PADCONF_MCBSP_CLKS_OFFSET 0x164
+#define OMAP3_CONTROL_PADCONF_MCBSP1_FSX_OFFSET 0x166
+#define OMAP3_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET 0x168
+#define OMAP3_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET 0x16a
+#define OMAP3_CONTROL_PADCONF_UART3_RTS_SD_OFFSET 0x16c
+#define OMAP3_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET 0x16e
+#define OMAP3_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET 0x170
+#define OMAP3_CONTROL_PADCONF_HSUSB0_CLK_OFFSET 0x172
+#define OMAP3_CONTROL_PADCONF_HSUSB0_STP_OFFSET 0x174
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DIR_OFFSET 0x176
+#define OMAP3_CONTROL_PADCONF_HSUSB0_NXT_OFFSET 0x178
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA0_OFFSET 0x17a
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA1_OFFSET 0x17c
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA2_OFFSET 0x17e
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA3_OFFSET 0x180
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA4_OFFSET 0x182
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA5_OFFSET 0x184
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA6_OFFSET 0x186
+#define OMAP3_CONTROL_PADCONF_HSUSB0_DATA7_OFFSET 0x188
+#define OMAP3_CONTROL_PADCONF_I2C1_SCL_OFFSET 0x18a
+#define OMAP3_CONTROL_PADCONF_I2C1_SDA_OFFSET 0x18c
+#define OMAP3_CONTROL_PADCONF_I2C2_SCL_OFFSET 0x18e
+#define OMAP3_CONTROL_PADCONF_I2C2_SDA_OFFSET 0x190
+#define OMAP3_CONTROL_PADCONF_I2C3_SCL_OFFSET 0x192
+#define OMAP3_CONTROL_PADCONF_I2C3_SDA_OFFSET 0x194
+#define OMAP3_CONTROL_PADCONF_HDQ_SIO_OFFSET 0x196
+#define OMAP3_CONTROL_PADCONF_MCSPI1_CLK_OFFSET 0x198
+#define OMAP3_CONTROL_PADCONF_MCSPI1_SIMO_OFFSET 0x19a
+#define OMAP3_CONTROL_PADCONF_MCSPI1_SOMI_OFFSET 0x19c
+#define OMAP3_CONTROL_PADCONF_MCSPI1_CS0_OFFSET 0x19e
+#define OMAP3_CONTROL_PADCONF_MCSPI1_CS1_OFFSET 0x1a0
+#define OMAP3_CONTROL_PADCONF_MCSPI1_CS2_OFFSET 0x1a2
+#define OMAP3_CONTROL_PADCONF_MCSPI1_CS3_OFFSET 0x1a4
+#define OMAP3_CONTROL_PADCONF_MCSPI2_CLK_OFFSET 0x1a6
+#define OMAP3_CONTROL_PADCONF_MCSPI2_SIMO_OFFSET 0x1a8
+#define OMAP3_CONTROL_PADCONF_MCSPI2_SOMI_OFFSET 0x1aa
+#define OMAP3_CONTROL_PADCONF_MCSPI2_CS0_OFFSET 0x1ac
+#define OMAP3_CONTROL_PADCONF_MCSPI2_CS1_OFFSET 0x1ae
+#define OMAP3_CONTROL_PADCONF_SYS_NIRQ_OFFSET 0x1b0
+#define OMAP3_CONTROL_PADCONF_SYS_CLKOUT2_OFFSET 0x1b2
+#define OMAP3_CONTROL_PADCONF_ETK_CLK_OFFSET 0x5a8
+#define OMAP3_CONTROL_PADCONF_ETK_CTL_OFFSET 0x5aa
+#define OMAP3_CONTROL_PADCONF_ETK_D0_OFFSET 0x5ac
+#define OMAP3_CONTROL_PADCONF_ETK_D1_OFFSET 0x5ae
+#define OMAP3_CONTROL_PADCONF_ETK_D2_OFFSET 0x5b0
+#define OMAP3_CONTROL_PADCONF_ETK_D3_OFFSET 0x5b2
+#define OMAP3_CONTROL_PADCONF_ETK_D4_OFFSET 0x5b4
+#define OMAP3_CONTROL_PADCONF_ETK_D5_OFFSET 0x5b6
+#define OMAP3_CONTROL_PADCONF_ETK_D6_OFFSET 0x5b8
+#define OMAP3_CONTROL_PADCONF_ETK_D7_OFFSET 0x5ba
+#define OMAP3_CONTROL_PADCONF_ETK_D8_OFFSET 0x5bc
+#define OMAP3_CONTROL_PADCONF_ETK_D9_OFFSET 0x5be
+#define OMAP3_CONTROL_PADCONF_ETK_D10_OFFSET 0x5c0
+#define OMAP3_CONTROL_PADCONF_ETK_D11_OFFSET 0x5c2
+#define OMAP3_CONTROL_PADCONF_ETK_D12_OFFSET 0x5c4
+#define OMAP3_CONTROL_PADCONF_ETK_D13_OFFSET 0x5c6
+#define OMAP3_CONTROL_PADCONF_ETK_D14_OFFSET 0x5c8
+#define OMAP3_CONTROL_PADCONF_ETK_D15_OFFSET 0x5ca
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD0_OFFSET 0x1b4
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD1_OFFSET 0x1b6
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD2_OFFSET 0x1b8
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD3_OFFSET 0x1ba
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD4_OFFSET 0x1bc
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD5_OFFSET 0x1be
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD6_OFFSET 0x1c0
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD7_OFFSET 0x1c2
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD8_OFFSET 0x1c4
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD9_OFFSET 0x1c6
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD10_OFFSET 0x1c8
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD11_OFFSET 0x1ca
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD12_OFFSET 0x1cc
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD13_OFFSET 0x1ce
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD14_OFFSET 0x1d0
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD15_OFFSET 0x1d2
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD16_OFFSET 0x1d4
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD17_OFFSET 0x1d6
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD18_OFFSET 0x1d8
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD19_OFFSET 0x1da
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD20_OFFSET 0x1dc
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD21_OFFSET 0x1de
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD22_OFFSET 0x1e0
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD23_OFFSET 0x1e2
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD24_OFFSET 0x1e4
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD25_OFFSET 0x1e6
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD26_OFFSET 0x1e8
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD27_OFFSET 0x1ea
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD28_OFFSET 0x1ec
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD29_OFFSET 0x1ee
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD30_OFFSET 0x1f0
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD31_OFFSET 0x1f2
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD32_OFFSET 0x1f4
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD33_OFFSET 0x1f6
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD34_OFFSET 0x1f8
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD35_OFFSET 0x1fa
+#define OMAP3_CONTROL_PADCONF_SAD2D_MCAD36_OFFSET 0x1fc
+#define OMAP3_CONTROL_PADCONF_SAD2D_CLK26MI_OFFSET 0x1fe
+#define OMAP3_CONTROL_PADCONF_SAD2D_NRESPWRON_OFFSET 0x200
+#define OMAP3_CONTROL_PADCONF_SAD2D_NRESWARM_OFFSET 0x202
+#define OMAP3_CONTROL_PADCONF_SAD2D_ARMNIRQ_OFFSET 0x204
+#define OMAP3_CONTROL_PADCONF_SAD2D_UMAFIQ_OFFSET 0x206
+#define OMAP3_CONTROL_PADCONF_SAD2D_SPINT_OFFSET 0x208
+#define OMAP3_CONTROL_PADCONF_SAD2D_FRINT_OFFSET 0x20a
+#define OMAP3_CONTROL_PADCONF_SAD2D_DMAREQ0_OFFSET 0x20c
+#define OMAP3_CONTROL_PADCONF_SAD2D_DMAREQ1_OFFSET 0x20e
+#define OMAP3_CONTROL_PADCONF_SAD2D_DMAREQ2_OFFSET 0x210
+#define OMAP3_CONTROL_PADCONF_SAD2D_DMAREQ3_OFFSET 0x212
+#define OMAP3_CONTROL_PADCONF_SAD2D_NTRST_OFFSET 0x214
+#define OMAP3_CONTROL_PADCONF_SAD2D_TDI_OFFSET 0x216
+#define OMAP3_CONTROL_PADCONF_SAD2D_TDO_OFFSET 0x218
+#define OMAP3_CONTROL_PADCONF_SAD2D_TMS_OFFSET 0x21a
+#define OMAP3_CONTROL_PADCONF_SAD2D_TCK_OFFSET 0x21c
+#define OMAP3_CONTROL_PADCONF_SAD2D_RTCK_OFFSET 0x21e
+#define OMAP3_CONTROL_PADCONF_SAD2D_MSTDBY_OFFSET 0x220
+#define OMAP3_CONTROL_PADCONF_SAD2D_IDLEREQ_OFFSET 0x222
+#define OMAP3_CONTROL_PADCONF_SAD2D_IDLEACK_OFFSET 0x224
+#define OMAP3_CONTROL_PADCONF_SAD2D_MWRITE_OFFSET 0x226
+#define OMAP3_CONTROL_PADCONF_SAD2D_SWRITE_OFFSET 0x228
+#define OMAP3_CONTROL_PADCONF_SAD2D_MREAD_OFFSET 0x22a
+#define OMAP3_CONTROL_PADCONF_SAD2D_SREAD_OFFSET 0x22c
+#define OMAP3_CONTROL_PADCONF_SAD2D_MBUSFLAG_OFFSET 0x22e
+#define OMAP3_CONTROL_PADCONF_SAD2D_SBUSFLAG_OFFSET 0x230
+#define OMAP3_CONTROL_PADCONF_I2C4_SCL_OFFSET 0x9d0
+#define OMAP3_CONTROL_PADCONF_I2C4_SDA_OFFSET 0x9d2
+#define OMAP3_CONTROL_PADCONF_SYS_32K_OFFSET 0x9d4
+#define OMAP3_CONTROL_PADCONF_SYS_CLKREQ_OFFSET 0x9d6
+#define OMAP3_CONTROL_PADCONF_SYS_NRESWARM_OFFSET 0x9d8
+#define OMAP3_CONTROL_PADCONF_SYS_BOOT0_OFFSET 0x9da
+#define OMAP3_CONTROL_PADCONF_SYS_BOOT1_OFFSET 0x9dc
+#define OMAP3_CONTROL_PADCONF_SYS_BOOT2_OFFSET 0x9de
+#define OMAP3_CONTROL_PADCONF_SYS_BOOT3_OFFSET 0x9e0
+#define OMAP3_CONTROL_PADCONF_SYS_BOOT4_OFFSET 0x9e2
+#define OMAP3_CONTROL_PADCONF_SYS_BOOT5_OFFSET 0x9e4
+#define OMAP3_CONTROL_PADCONF_SYS_BOOT6_OFFSET 0x9e6
+#define OMAP3_CONTROL_PADCONF_SYS_OFF_MODE_OFFSET 0x9e8
+#define OMAP3_CONTROL_PADCONF_SYS_CLKOUT1_OFFSET 0x9ea
+#define OMAP3_CONTROL_PADCONF_JTAG_NTRST_OFFSET 0x9ec
+#define OMAP3_CONTROL_PADCONF_JTAG_TCK_OFFSET 0x9ee
+#define OMAP3_CONTROL_PADCONF_JTAG_TMS_TMSC_OFFSET 0x9f0
+#define OMAP3_CONTROL_PADCONF_JTAG_TDI_OFFSET 0x9f2
+#define OMAP3_CONTROL_PADCONF_JTAG_EMU0_OFFSET 0x9f4
+#define OMAP3_CONTROL_PADCONF_JTAG_EMU1_OFFSET 0x9f6
+#define OMAP3_CONTROL_PADCONF_SAD2D_SWAKEUP_OFFSET 0xa1c
+#define OMAP3_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0xa1e
+#define OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET 0xa20
+
+#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
+ (OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 4/5] omap: mux: Add new style init functions to omap3 board-*.c files
2009-10-29 20:35 [PATCH 0/5] New mux code for 34xx Tony Lindgren
` (2 preceding siblings ...)
2009-10-29 20:36 ` [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx Tony Lindgren
@ 2009-10-29 20:36 ` Tony Lindgren
2009-10-29 20:36 ` [PATCH 5/5] omap: mux: Add debugfs support for new mux code Tony Lindgren
` (2 subsequent siblings)
6 siblings, 0 replies; 23+ messages in thread
From: Tony Lindgren @ 2009-10-29 20:36 UTC (permalink / raw)
To: linux-omap; +Cc: mike.rapoport
Add new style mux init functions to omap3 board-*.c files
REVISIT: Check package type for each board CBB for now
REVISIT: Remove OMAP_MUX_ALL_DYNAMIC debug option
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/board-3430sdp.c | 9 +++++++++
arch/arm/mach-omap2/board-cm-t35.c | 9 +++++++++
arch/arm/mach-omap2/board-ldp.c | 9 +++++++++
arch/arm/mach-omap2/board-omap3beagle.c | 9 +++++++++
arch/arm/mach-omap2/board-omap3evm.c | 9 +++++++++
arch/arm/mach-omap2/board-omap3pandora.c | 9 +++++++++
arch/arm/mach-omap2/board-overo.c | 8 ++++++++
arch/arm/mach-omap2/board-rx51.c | 10 ++++++++++
arch/arm/mach-omap2/board-zoom2.c | 8 ++++++++
9 files changed, 80 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index a3c1271..94d850d 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -41,6 +41,7 @@
#include <plat/control.h>
#include <plat/gpmc-smc91x.h>
+#include "mux.h"
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "mmc-twl4030.h"
@@ -496,6 +497,12 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.reset_gpio_port[2] = -EINVAL
};
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
+
static void __init omap_3430sdp_init(void)
{
omap3430_i2c_init();
@@ -513,6 +520,8 @@ static void __init omap_3430sdp_init(void)
board_smc91x_init();
enable_board_wakeup_source();
usb_ehci_init(&ehci_pdata);
+
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
static void __init omap_3430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 0a39513..3a07807 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -45,6 +45,7 @@
#include <mach/hardware.h>
+#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
#include "mmc-twl4030.h"
@@ -451,6 +452,12 @@ static void __init cm_t35_map_io(void)
omap2_map_common_io();
}
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
+
static void __init cm_t35_init(void)
{
omap_serial_init();
@@ -463,6 +470,8 @@ static void __init cm_t35_init(void)
usb_musb_init();
omap_cfg_reg(AF26_34XX_SYS_NIRQ);
+
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
MACHINE_START(CM_T35, "Compulab CM-T35")
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index c062238..28b4480 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -43,6 +43,7 @@
#include <plat/control.h>
#include <plat/usb.h>
+#include "mux.h"
#include "mmc-twl4030.h"
#define LDP_SMSC911X_CS 1
@@ -374,6 +375,12 @@ static struct platform_device *ldp_devices[] __initdata = {
&ldp_gpio_keys_device,
};
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
+
static void __init omap_ldp_init(void)
{
omap_i2c_init();
@@ -389,6 +396,8 @@ static void __init omap_ldp_init(void)
twl4030_mmc_init(mmc);
/* link regulators to MMC adapters */
ldp_vmmc1_supply.dev = mmc[0].dev;
+
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
static void __init omap_ldp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 6cb99f6..5bb096a 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -45,6 +45,7 @@
#include <plat/usb.h>
#include <plat/timer-gp.h>
+#include "mux.h"
#include "mmc-twl4030.h"
#define GPMC_CS0_BASE 0x60
@@ -412,6 +413,12 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.reset_gpio_port[2] = -EINVAL
};
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
+
static void __init omap3_beagle_init(void)
{
omap3_beagle_i2c_init();
@@ -431,6 +438,8 @@ static void __init omap3_beagle_init(void)
/* Ensure SDRC pins are mux'd for self-refresh */
omap_cfg_reg(H16_34XX_SDRC_CKE0);
omap_cfg_reg(H17_34XX_SDRC_CKE1);
+
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
static void __init omap3_beagle_map_io(void)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index b9b0f4c..77b1a20 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -41,6 +41,7 @@
#include <plat/common.h>
#include <plat/mcspi.h>
+#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
#include "mmc-twl4030.h"
@@ -355,6 +356,12 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.reset_gpio_port[2] = -EINVAL
};
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
+
static void __init omap3_evm_init(void)
{
omap3_evm_i2c_init();
@@ -374,6 +381,8 @@ static void __init omap3_evm_init(void)
omap_cfg_reg(AF4_34XX_GPIO135_OUT);
usb_ehci_init(&ehci_pdata);
ads7846_dev_init();
+
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
static void __init omap3_evm_map_io(void)
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 581a18d..d1ea8d5 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -42,6 +42,7 @@
#include <plat/usb.h>
#include <plat/mux.h>
+#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
#include "mmc-twl4030.h"
@@ -399,6 +400,12 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.reset_gpio_port[2] = -EINVAL
};
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
+
static void __init omap3pandora_init(void)
{
omap3pandora_i2c_init();
@@ -415,6 +422,8 @@ static void __init omap3pandora_init(void)
/* Ensure SDRC pins are mux'd for self-refresh */
omap_cfg_reg(H16_34XX_SDRC_CKE0);
omap_cfg_reg(H17_34XX_SDRC_CKE1);
+
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
static void __init omap3pandora_map_io(void)
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 92f3f3a..63e85c2 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -47,6 +47,7 @@
#include <plat/mux.h>
#include <plat/usb.h>
+#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
#include "mmc-twl4030.h"
@@ -395,6 +396,11 @@ static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.reset_gpio_port[2] = -EINVAL
};
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
static void __init overo_init(void)
{
@@ -446,6 +452,8 @@ static void __init overo_init(void)
else
printk(KERN_ERR "could not obtain gpio for "
"OVERO_GPIO_USBH_CPEN\n");
+
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
static void __init overo_map_io(void)
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index f1e7e5b..6bfe4db 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -30,6 +30,8 @@
#include <plat/gpmc.h>
#include <plat/usb.h>
+#include "mux.h"
+
static struct omap_lcd_config rx51_lcd_config = {
.ctrl_name = "internal",
};
@@ -64,6 +66,12 @@ static void __init rx51_init_irq(void)
extern void __init rx51_peripherals_init(void);
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
+
static void __init rx51_init(void)
{
omap_serial_init();
@@ -73,6 +81,8 @@ static void __init rx51_init(void)
/* Ensure SDRC pins are mux'd for self-refresh */
omap_cfg_reg(H16_34XX_SDRC_CKE0);
omap_cfg_reg(H17_34XX_SDRC_CKE1);
+
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
static void __init rx51_map_io(void)
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index 4ad9b94..69eebb9 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -24,6 +24,7 @@
#include <plat/common.h>
#include <plat/usb.h>
+#include "mux.h"
#include "mmc-twl4030.h"
#include "sdram-micron-mt46h32m32lf-6.h"
@@ -267,12 +268,19 @@ static int __init omap_i2c_init(void)
extern int __init omap_zoom2_debugboard_init(void);
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#endif
+
static void __init omap_zoom2_init(void)
{
omap_i2c_init();
omap_serial_init();
omap_zoom2_debugboard_init();
usb_musb_init();
+ omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
static void __init omap_zoom2_map_io(void)
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 5/5] omap: mux: Add debugfs support for new mux code
2009-10-29 20:35 [PATCH 0/5] New mux code for 34xx Tony Lindgren
` (3 preceding siblings ...)
2009-10-29 20:36 ` [PATCH 4/5] omap: mux: Add new style init functions to omap3 board-*.c files Tony Lindgren
@ 2009-10-29 20:36 ` Tony Lindgren
2009-10-29 21:19 ` [PATCH 0/5] New mux code for 34xx Mike Rapoport
2009-11-01 10:29 ` Mike Rapoport
6 siblings, 0 replies; 23+ messages in thread
From: Tony Lindgren @ 2009-10-29 20:36 UTC (permalink / raw)
To: linux-omap; +Cc: mike.rapoport
Add debugfs support for new mux code
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/mux.c | 143 +++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 143 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 45e6d4d..a31bcfa 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -28,6 +28,9 @@
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/list.h>
+#include <linux/ctype.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
#include <asm/system.h>
@@ -780,6 +783,146 @@ static void __init omap_mux_apply_pins(struct omap_ball *b,
}
}
+#define OMAP_MUX_MAX_NR_FLAGS 10
+#define OMAP_MUX_TEST_FLAG(val, mask) \
+ if (((val) & (mask)) == (mask)) { \
+ i++; \
+ flags[i] = #mask; \
+ }
+
+/* REVISIT: Add checking for non-optimal mux settings */
+static inline void omap_mux_decode(struct seq_file *s, u16 val)
+{
+ char *flags[OMAP_MUX_MAX_NR_FLAGS];
+ char mode[14];
+ int i = -1;
+
+ sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
+ i++;
+ flags[i] = mode;
+
+ OMAP_MUX_TEST_FLAG(val, OMAP_PIN_OFF_WAKEUPENABLE);
+ if (val & OMAP_OFF_EN) {
+ if (!(val & OMAP_OFFOUT_EN)) {
+ if (!(val & OMAP_OFF_PULL_UP)) {
+ OMAP_MUX_TEST_FLAG(val,
+ OMAP_PIN_OFF_INPUT_PULLDOWN);
+ } else {
+ OMAP_MUX_TEST_FLAG(val,
+ OMAP_PIN_OFF_INPUT_PULLUP);
+ }
+ } else {
+ if (!(val & OMAP_OFFOUT_VAL)) {
+ OMAP_MUX_TEST_FLAG(val,
+ OMAP_PIN_OFF_OUTPUT_LOW);
+ } else {
+ OMAP_MUX_TEST_FLAG(val,
+ OMAP_PIN_OFF_OUTPUT_HIGH);
+ }
+ }
+ } else {
+ i++;
+ flags[i] = "OMAP_PIN_OFF_NONE";
+ }
+
+ if (val & OMAP_INPUT_EN) {
+ if (val & OMAP_PULL_ENA) {
+ if (!(val & OMAP_PULL_UP)) {
+ OMAP_MUX_TEST_FLAG(val,
+ OMAP_PIN_INPUT_PULLDOWN);
+ } else {
+ OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT_PULLUP);
+ }
+ }
+ OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT);
+ } else {
+ i++;
+ flags[i] = "OMAP_PIN_OUTPUT";
+ }
+
+ do {
+ seq_printf(s, "%s", flags[i]);
+ if (i > 0)
+ seq_printf(s, " | ");
+ } while (i-- > 0);
+}
+
+#define OMAP_MUX_DEFNAME_LEN 16
+
+static int omap_mux_dbg_show(struct seq_file *s, void *unused)
+{
+ struct omap_mux_entry *e;
+
+ list_for_each_entry_reverse(e, &muxmodes, node) {
+ struct omap_mux *m = &e->mux;
+ char m0_def[OMAP_MUX_DEFNAME_LEN];
+ char *m0_name = m->muxnames[0];
+ u16 val;
+ int i, mode;
+
+ if (!m0_name)
+ continue;
+
+ for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
+ if (m0_name[i] == '\0') {
+ m0_def[i] = m0_name[i];
+ break;
+ }
+ m0_def[i] = toupper(m0_name[i]);
+ }
+ val = omap_mux_read(m->reg_offset);
+ mode = val & 0x7;
+
+ seq_printf(s, "OMAP%i_MUX(%s, ",
+ cpu_is_omap34xx() ? 3: 0, m0_def);
+ omap_mux_decode(s, val);
+ seq_printf(s, ", 0),\n");
+
+ seq_printf(s, "padconf: %s\tsignal: %s:\toffset: 0x%03x\t"
+ "value: 0x%04x\n",
+ m->muxnames[0], m->muxnames[mode], m->reg_offset, val);
+ seq_printf(s, "m0: %-11s\tm1: %-10s\tm2: %-10s\tm3: %-10s\n"
+ "m4: %-10s\tm5: %-10s\tm6: %-10s\tm7: %-10s\n",
+ m->muxnames[0] ? m->muxnames[0] : "",
+ m->muxnames[1] ? m->muxnames[1] : "",
+ m->muxnames[2] ? m->muxnames[2] : "",
+ m->muxnames[3] ? m->muxnames[3] : "",
+ m->muxnames[4] ? m->muxnames[4] : "",
+ m->muxnames[5] ? m->muxnames[5] : "",
+ m->muxnames[6] ? m->muxnames[6] : "",
+ m->muxnames[7] ? m->muxnames[7] : "");
+ seq_printf(s, "phys: 0x%08lx\tball bottom: %s\t "
+ "ball top: %s\n\n",
+ cpu_is_omap34xx() ?
+ OMAP3_CONTROL_PADCONF_MUX_PBASE + m->reg_offset : 0,
+ m->balls[0] ? m->balls[0] : "",
+ m->balls[1] ? m->balls[1] : "");
+ }
+
+ return 0;
+}
+
+static int omap_mux_dbg_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, omap_mux_dbg_show, &inode->i_private);
+}
+
+static const struct file_operations omap_mux_dbg_fops = {
+ .open = omap_mux_dbg_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static int __init omap_mux_dbg_init(void)
+{
+ (void)debugfs_create_file("omap_mux", S_IRUGO, NULL, NULL,
+ &omap_mux_dbg_fops);
+
+ return 0;
+}
+late_initcall(omap_mux_dbg_init);
+
#else /* CONFIG_DEBUG_FS */
static inline void omap_mux_apply_pins(struct omap_ball *b,
^ permalink raw reply related [flat|nested] 23+ messages in thread
* Re: [PATCH 0/5] New mux code for 34xx
2009-10-29 20:35 [PATCH 0/5] New mux code for 34xx Tony Lindgren
` (4 preceding siblings ...)
2009-10-29 20:36 ` [PATCH 5/5] omap: mux: Add debugfs support for new mux code Tony Lindgren
@ 2009-10-29 21:19 ` Mike Rapoport
2009-10-29 21:59 ` Tony Lindgren
2009-11-01 10:29 ` Mike Rapoport
6 siblings, 1 reply; 23+ messages in thread
From: Mike Rapoport @ 2009-10-29 21:19 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap
Hi Tony,
On Thu, Oct 29, 2009 at 10:35 PM, Tony Lindgren <tony@atomide.com> wrote:
> Hi all,
>
> Here's an initial version of the new mux code to play with.
> Big thanks to Paul & Benoit for the 34xx mux data!
>
> To try out the new code, compile a kernel with CONFIG_OMAP_MUX
> and CONFIG_DEBUG_FS and these patches. The series is also
> availabe in the l-o git in mux branch.
Great work! I'm too sleepy now to make proper review, and I'm trying
not to take work home, so I'll pull and test your patches only next
week.
And, still, I'm missing PXA-style defines for particular pin
configuration :) I really like
OMAP3_CAM_D0_GPIO_99,
more than
OMAP3_MUX(CAM_D0, OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE |
OMAP_MUX_MODE4, 0),
:)
> To see the mux configuration on your board:
>
> # mount -t debugfs debugfs /sys/kernel/debug
> # cat /sys/kernel/debug/omap_mux | less
> OMAP3_MUX(CAM_D0, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABLE
> | OMAP_MUX_MODE4, 0),
> padconf: cam_d0 signal: gpio_99: offset: 0x0e6 value: 0x4104
> m0: cam_d0 m1: m2: m3:
> m4: gpio_99 m5: m6: m7: safe_mode
> phys: 0x48002116 ball bottom: ag17 ball top:
>
> OMAP3_MUX(CAM_D10, OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE | OMAP_MUX_MODE7, 0),
> padconf: cam_d10 signal: safe_mode: offset: 0x0fa value: 0x0007
> m0: cam_d10 m1: m2: m3:
> m4: gpio_109 m5: m6: m7: safe_mode
> phys: 0x4800212a ball bottom: b25 ball top:
> ...
>
> Then to produce a list of board mux entries from a working
> system, do:
>
> # cat /sys/kernel/debug/omap_mux | grep OMAP3_MUX
> OMAP3_MUX(CAM_D0, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABLE
> | OMAP_MUX_MODE4, 0),
> OMAP3_MUX(CAM_D10, OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE | OMAP_MUX_MODE7, 0),
> OMAP3_MUX(CAM_D11, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABL
> E | OMAP_MUX_MODE4, 0),
> OMAP3_MUX(CAM_D1, OMAP_PIN_INPUT | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_NONE | O
> MAP_PIN_OFF_WAKEUPENABLE | OMAP_MUX_MODE4, 0),
> ...
>
> Currenly no write support to tweak the pins via debugfs,
> but I'll add that soon with command line support too.
>
> I have not really verified the data yet, but it mostly looks
> right. Adding support for 3630 and omap4 should be easy
> after generating the data. It's currently implemented only
> for 34xx.
>
> I guess the next step would be to convert all omap3 calls
> to omap_cfg_reg() to use omap_mux_set() instead with the
> new data and make sure things work. Then we can remove the
> old data for 34xx.
>
> Comments welcome as always.
>
> Regards,
>
> Tony
>
>
> ---
>
> Mike Rapoport (1):
> omap2: mux: intoduce omap_mux_{read,write}
>
> Tony Lindgren (4):
> omap: mux: Add debugfs support for new mux code
> omap: mux: Add new style init functions to omap3 board-*.c files
> omap: mux: Add new style pin multiplexing data for 34xx
> omap: mux: Add new style pin multiplexing code for omap3
>
>
> arch/arm/mach-omap2/Makefile | 4
> arch/arm/mach-omap2/board-3430sdp.c | 9
> arch/arm/mach-omap2/board-cm-t35.c | 9
> arch/arm/mach-omap2/board-ldp.c | 9
> arch/arm/mach-omap2/board-omap3beagle.c | 9
> arch/arm/mach-omap2/board-omap3evm.c | 9
> arch/arm/mach-omap2/board-omap3pandora.c | 9
> arch/arm/mach-omap2/board-overo.c | 8
> arch/arm/mach-omap2/board-rx51.c | 10
> arch/arm/mach-omap2/board-zoom2.c | 8
> arch/arm/mach-omap2/mux.c | 424 ++++++++
> arch/arm/mach-omap2/mux.h | 127 ++
> arch/arm/mach-omap2/mux34xx.c | 1552 ++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/mux34xx.h | 352 +++++++
> 14 files changed, 2533 insertions(+), 6 deletions(-)
> create mode 100644 arch/arm/mach-omap2/mux.h
> create mode 100644 arch/arm/mach-omap2/mux34xx.c
> create mode 100644 arch/arm/mach-omap2/mux34xx.h
>
> --
> Signature
>
--
Sincerely Yours,
Mike.
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/5] New mux code for 34xx
2009-10-29 21:19 ` [PATCH 0/5] New mux code for 34xx Mike Rapoport
@ 2009-10-29 21:59 ` Tony Lindgren
0 siblings, 0 replies; 23+ messages in thread
From: Tony Lindgren @ 2009-10-29 21:59 UTC (permalink / raw)
To: Mike Rapoport; +Cc: linux-omap
* Mike Rapoport <mike.rapoport@gmail.com> [091029 14:19]:
> Hi Tony,
>
> On Thu, Oct 29, 2009 at 10:35 PM, Tony Lindgren <tony@atomide.com> wrote:
> > Hi all,
> >
> > Here's an initial version of the new mux code to play with.
> > Big thanks to Paul & Benoit for the 34xx mux data!
> >
> > To try out the new code, compile a kernel with CONFIG_OMAP_MUX
> > and CONFIG_DEBUG_FS and these patches. The series is also
> > availabe in the l-o git in mux branch.
>
> Great work! I'm too sleepy now to make proper review, and I'm trying
> not to take work home, so I'll pull and test your patches only next
> week.
OK, I guess what we now need to figure out if can we just convert
all omap_cfg_reg() straight to omap_mux_set().
> And, still, I'm missing PXA-style defines for particular pin
> configuration :) I really like
> OMAP3_CAM_D0_GPIO_99,
> more than
> OMAP3_MUX(CAM_D0, OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE |
> OMAP_MUX_MODE4, 0),
> :)
Yeah too many options.. Maybe we could have some macro like
OMAP_MUX_GPIO_OUT(99)? We should be able to find it now with
the gpio number during init, don't know if we want to keep
all the gpio to mux mappings in memory except for active gpio
pins.
Regards,
Tony
>
> > To see the mux configuration on your board:
> >
> > # mount -t debugfs debugfs /sys/kernel/debug
> > # cat /sys/kernel/debug/omap_mux | less
> > OMAP3_MUX(CAM_D0, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABLE
> > | OMAP_MUX_MODE4, 0),
> > padconf: cam_d0 signal: gpio_99: offset: 0x0e6 value: 0x4104
> > m0: cam_d0 m1: m2: m3:
> > m4: gpio_99 m5: m6: m7: safe_mode
> > phys: 0x48002116 ball bottom: ag17 ball top:
> >
> > OMAP3_MUX(CAM_D10, OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE | OMAP_MUX_MODE7, 0),
> > padconf: cam_d10 signal: safe_mode: offset: 0x0fa value: 0x0007
> > m0: cam_d10 m1: m2: m3:
> > m4: gpio_109 m5: m6: m7: safe_mode
> > phys: 0x4800212a ball bottom: b25 ball top:
> > ...
> >
> > Then to produce a list of board mux entries from a working
> > system, do:
> >
> > # cat /sys/kernel/debug/omap_mux | grep OMAP3_MUX
> > OMAP3_MUX(CAM_D0, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABLE
> > | OMAP_MUX_MODE4, 0),
> > OMAP3_MUX(CAM_D10, OMAP_PIN_OUTPUT | OMAP_PIN_OFF_NONE | OMAP_MUX_MODE7, 0),
> > OMAP3_MUX(CAM_D11, OMAP_PIN_INPUT | OMAP_PIN_OFF_NONE | OMAP_PIN_OFF_WAKEUPENABL
> > E | OMAP_MUX_MODE4, 0),
> > OMAP3_MUX(CAM_D1, OMAP_PIN_INPUT | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_NONE | O
> > MAP_PIN_OFF_WAKEUPENABLE | OMAP_MUX_MODE4, 0),
> > ...
> >
> > Currenly no write support to tweak the pins via debugfs,
> > but I'll add that soon with command line support too.
> >
> > I have not really verified the data yet, but it mostly looks
> > right. Adding support for 3630 and omap4 should be easy
> > after generating the data. It's currently implemented only
> > for 34xx.
> >
> > I guess the next step would be to convert all omap3 calls
> > to omap_cfg_reg() to use omap_mux_set() instead with the
> > new data and make sure things work. Then we can remove the
> > old data for 34xx.
> >
> > Comments welcome as always.
> >
> > Regards,
> >
> > Tony
> >
> >
> > ---
> >
> > Mike Rapoport (1):
> > omap2: mux: intoduce omap_mux_{read,write}
> >
> > Tony Lindgren (4):
> > omap: mux: Add debugfs support for new mux code
> > omap: mux: Add new style init functions to omap3 board-*.c files
> > omap: mux: Add new style pin multiplexing data for 34xx
> > omap: mux: Add new style pin multiplexing code for omap3
> >
> >
> > arch/arm/mach-omap2/Makefile | 4
> > arch/arm/mach-omap2/board-3430sdp.c | 9
> > arch/arm/mach-omap2/board-cm-t35.c | 9
> > arch/arm/mach-omap2/board-ldp.c | 9
> > arch/arm/mach-omap2/board-omap3beagle.c | 9
> > arch/arm/mach-omap2/board-omap3evm.c | 9
> > arch/arm/mach-omap2/board-omap3pandora.c | 9
> > arch/arm/mach-omap2/board-overo.c | 8
> > arch/arm/mach-omap2/board-rx51.c | 10
> > arch/arm/mach-omap2/board-zoom2.c | 8
> > arch/arm/mach-omap2/mux.c | 424 ++++++++
> > arch/arm/mach-omap2/mux.h | 127 ++
> > arch/arm/mach-omap2/mux34xx.c | 1552 ++++++++++++++++++++++++++++++
> > arch/arm/mach-omap2/mux34xx.h | 352 +++++++
> > 14 files changed, 2533 insertions(+), 6 deletions(-)
> > create mode 100644 arch/arm/mach-omap2/mux.h
> > create mode 100644 arch/arm/mach-omap2/mux34xx.c
> > create mode 100644 arch/arm/mach-omap2/mux34xx.h
> >
> > --
> > Signature
> >
>
>
>
> --
> Sincerely Yours,
> Mike.
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/5] New mux code for 34xx
2009-10-29 20:35 [PATCH 0/5] New mux code for 34xx Tony Lindgren
` (5 preceding siblings ...)
2009-10-29 21:19 ` [PATCH 0/5] New mux code for 34xx Mike Rapoport
@ 2009-11-01 10:29 ` Mike Rapoport
2009-11-02 18:56 ` Tony Lindgren
6 siblings, 1 reply; 23+ messages in thread
From: Mike Rapoport @ 2009-11-01 10:29 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, mike.rapoport
Hi Tony,
Tony Lindgren wrote:
> Hi all,
>
> Here's an initial version of the new mux code to play with.
> Big thanks to Paul & Benoit for the 34xx mux data!
I've tried your patches, they seem to work just fine on CM-T35.
> To try out the new code, compile a kernel with CONFIG_OMAP_MUX
> and CONFIG_DEBUG_FS and these patches. The series is also
> availabe in the l-o git in mux branch.
[ snip ]
>
> Comments welcome as always.
There are some comments on patches 2 (Add new style pin multiplexing code for
omap3) and 3 (Add new style pin multiplexing data for 34xx). No nitpicking for
now, but checkpatch.pl is unhappy with the patchset :)
> Regards,
>
> Tony
>
>
> ---
>
> Mike Rapoport (1):
> omap2: mux: intoduce omap_mux_{read,write}
>
> Tony Lindgren (4):
> omap: mux: Add debugfs support for new mux code
> omap: mux: Add new style init functions to omap3 board-*.c files
> omap: mux: Add new style pin multiplexing data for 34xx
> omap: mux: Add new style pin multiplexing code for omap3
>
>
> arch/arm/mach-omap2/Makefile | 4
> arch/arm/mach-omap2/board-3430sdp.c | 9
> arch/arm/mach-omap2/board-cm-t35.c | 9
> arch/arm/mach-omap2/board-ldp.c | 9
> arch/arm/mach-omap2/board-omap3beagle.c | 9
> arch/arm/mach-omap2/board-omap3evm.c | 9
> arch/arm/mach-omap2/board-omap3pandora.c | 9
> arch/arm/mach-omap2/board-overo.c | 8
> arch/arm/mach-omap2/board-rx51.c | 10
> arch/arm/mach-omap2/board-zoom2.c | 8
> arch/arm/mach-omap2/mux.c | 424 ++++++++
> arch/arm/mach-omap2/mux.h | 127 ++
> arch/arm/mach-omap2/mux34xx.c | 1552 ++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/mux34xx.h | 352 +++++++
> 14 files changed, 2533 insertions(+), 6 deletions(-)
> create mode 100644 arch/arm/mach-omap2/mux.h
> create mode 100644 arch/arm/mach-omap2/mux34xx.c
> create mode 100644 arch/arm/mach-omap2/mux34xx.h
>
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 2/5] omap: mux: Add new style pin multiplexing code for omap3
2009-10-29 20:36 ` [PATCH 2/5] omap: mux: Add new style pin multiplexing code for omap3 Tony Lindgren
@ 2009-11-01 10:30 ` Mike Rapoport
2009-11-02 18:54 ` Tony Lindgren
0 siblings, 1 reply; 23+ messages in thread
From: Mike Rapoport @ 2009-11-01 10:30 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, mike.rapoport
Tony Lindgren wrote:
> Initially only for 34xx. Keep the old code working
> until the data has been converted to the new style
> format.
>
> REVISIT: Add support for cmdline parsing
> REVISIT: Add a function to get mux register by GPIO pin
> REVISIT: Add a function to set an array of mux entries
>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
> arch/arm/mach-omap2/mux.c | 237 +++++++++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/mux.h | 125 ++++++++++++++++++++++++
> 2 files changed, 362 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-omap2/mux.h
>
> diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
> index 9841423..45e6d4d 100644
> --- a/arch/arm/mach-omap2/mux.c
> +++ b/arch/arm/mach-omap2/mux.c
> @@ -27,12 +27,15 @@
> #include <linux/init.h>
> #include <linux/io.h>
> #include <linux/spinlock.h>
> +#include <linux/list.h>
>
> #include <asm/system.h>
>
> #include <plat/control.h>
> #include <plat/mux.h>
>
> +#include "mux.h"
Wouldn't <mach/mux.h> be better?
> #ifdef CONFIG_OMAP_MUX
>
> #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
> @@ -626,6 +629,11 @@ static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
> #endif
>
> #ifdef CONFIG_ARCH_OMAP34XX
> +
> +/*
> + * NOTE: This function will disappear soon, please use the new
> + * omap_mux_set() instead
> + */
I think it's worth adding more visible notice, e.g. marking the function
deprecated or adding a WARN statement to its body.
> static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
> {
> static DEFINE_SPINLOCK(mux_spin_lock);
> @@ -644,6 +652,235 @@ static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
> #define omap34xx_cfg_reg NULL
> #endif
>
> +/*----------------------------------------------------------------------------*/
> +
> +#ifdef CONFIG_ARCH_OMAP34XX
> +
> +static LIST_HEAD(muxmodes);
> +static DEFINE_MUTEX(muxmode_mutex);
> +
> +/*
> + * REVISIT: See if pin is set dynamic, and add it to the list
> + */
> +int omap_mux_set(u16 val, u16 mux_offset, int flags)
> +{
> + omap_mux_write(val, mux_offset);
> +
> + return 0;
> +}
> +
> +struct omap_mux_entry {
> + struct omap_mux mux;
> + struct list_head node;
> +};
> +
> +static struct omap_mux *omap_mux_list_add(struct omap_mux *src)
> +{
> + struct omap_mux_entry *entry;
> + struct omap_mux *m;
> +
> + int i;
> +
> + entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL);
> + if (!entry)
> + return NULL;
> +
> + m = &entry->mux;
> + memcpy(m, src, sizeof(struct omap_mux_entry));
> +
> +#ifdef CONFIG_DEBUG_FS
> + for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
> + if (src->muxnames[i]) {
> + m->muxnames[i] =
> + kzalloc(strlen(src->muxnames[i]) + 1,
> + GFP_KERNEL);
> + if (!m->muxnames[i])
> + goto free_names;
> + strcpy(m->muxnames[i], src->muxnames[i]);
> + }
> + }
> + for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
> + if (src->balls[i]) {
> + m->balls[i] =
> + kzalloc(strlen(src->balls[i]) + 1,
> + GFP_KERNEL);
> + if (!m->balls[i])
> + goto free_balls;
> + strcpy(m->balls[i], src->balls[i]);
> + }
> + }
> +#endif
> +
> + mutex_lock(&muxmode_mutex);
> + list_add(&entry->node, &muxmodes);
> + mutex_unlock(&muxmode_mutex);
> +
> + return m;
> +
> +#ifdef CONFIG_DEBUG_FS
> +free_balls:
> + for (i = 0; i < OMAP_MUX_NR_SIDES; i++)
> + if (m->balls[i])
> + kfree(m->balls[i]);
> +free_names:
> + for (i = 0; i < OMAP_MUX_NR_MODES; i++)
> + if (m->muxnames[i])
> + kfree(m->muxnames[i]);
> +#endif
> +
> + kfree(entry);
> +
> + return NULL;
> +}
> +
> +static void __init omap_mux_apply_subset(struct omap_mux *p,
> + struct omap_mux *superset)
> +{
I'm not sure it is required.
Is it for sure that CBC package will remain superset of all possible mux modes
for all OMAP3 variants through entire OMAP3 lifespan? What about OMAP3630 and
OMAP3517? Are their packages also subset of the CBC one?
I'd rather keep the entire tables for different packages/CPU variants. They are
anyway __initdata, so they would be discarded later during boot. And, keeping
the full tables rather than differences makes omap_mux_apply_subset and
unnecessary and omap_mux_apply_pins much simpler.
If we keep the full tables instead of diffs we could do something like:
static struct omap_mux *muxmodes;
static void __init omap_mux_apply_subset(struct omap_mux *p)
{
muxmodes = p;
}
> + while (p->reg_offset != OMAP_MUX_TERMINATOR) {
> + struct omap_mux *s = superset;
> + int found = 0;
> +
> + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
> + if (s->reg_offset == p->reg_offset) {
> + *s = *p;
> + found++;
> + break;
> + }
> + s++;
> + }
> + if (!found)
> + printk(KERN_ERR "mux: Unknown entry offset 0x%x\n",
> + p->reg_offset);
> + p++;
> + }
> +}
> +
> +#ifdef CONFIG_DEBUG_FS
> +
> +static void __init omap_mux_apply_pins(struct omap_ball *b,
> + struct omap_mux *superset)
> +{
> + while (b->reg_offset != OMAP_MUX_TERMINATOR) {
> + struct omap_mux *s = superset;
> + int found = 0;
> +
> + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
> + if (s->reg_offset == b->reg_offset) {
> + s->balls[0] = b->balls[0];
> + s->balls[1] = b->balls[1];
> + found++;
> + break;
> + }
Again, if we keep the full tables instead of diffs we don't need the nested
loop. Provided that balls table has pins in the same order as the mux table we
could have only the assignments here.
> + s++;
> + }
> + if (!found)
> + printk(KERN_ERR "mux: Unknown ball offset 0x%x\n",
> + b->reg_offset);
> + b++;
> + }
> +}
> +
> +#else /* CONFIG_DEBUG_FS */
> +
> +static inline void omap_mux_apply_pins(struct omap_ball *b,
> + struct omap_mux *superset)
> +{
> +}
> +
> +#endif /* CONFIG_DEBUG_FS */
> +
> +static void __init omap_mux_set_board(struct omap_board_mux *board)
> +{
> + while (board->reg_offset != OMAP_MUX_TERMINATOR) {
> + omap_mux_write(board->value, board->reg_offset);
> + board++;
> + }
> +}
> +
> +static void __init omap_mux_init_dynamic(struct omap_board_mux *board_subset,
> + struct omap_mux *superset,
> + int flags)
> +{
> + struct omap_mux *s = superset;
> + int always_dynamic = flags & OMAP_MUX_ALL_DYNAMIC;
> +
> + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
> + struct omap_mux *entry;
> +
> + if (!always_dynamic) {
> + u16 mode;
> +
> + /* GPIO pins must be always dynamic for PM */
> + mode = omap_mux_read(s->reg_offset) & 0x7;
> + if (mode != OMAP_MUX_MODE4)
> + continue;
> + }
> +
> + entry = omap_mux_list_add(s);
> + if (!entry) {
> + printk(KERN_ERR "mux: Could not add entry\n");
> + return;
> + }
> + s++;
> + }
> +
> + if (always_dynamic)
> + return;
> +
> + /* Search for pins set as dynamic in the board-*.c file */
> + while (board_subset->reg_offset != OMAP_MUX_TERMINATOR) {
> +
> + /* GPIO pins are always dynamic, and already handled */
> + if ((board_subset->value & 0x7) == OMAP_MUX_MODE4)
> + continue;
> +
> + if (!(board_subset->flags & OMAP_MUX_DYNAMIC))
> + continue;
> +
> + s = superset;
> + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
> + if (s->reg_offset == board_subset->reg_offset) {
> + struct omap_mux *entry = omap_mux_list_add(s);
> + if (!entry) {
> + printk(KERN_ERR "mux: Could not add "
> + "board entry\n");
> + return;
> + }
> + }
> + s++;
> + }
> + board_subset++;
> + }
> +}
> +
> +/*
> + * Do not call this from board-*.c files, use omap3_mux_init() instead
> + */
> +int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
> + struct omap_mux *superset,
> + struct omap_mux *package_subset,
> + struct omap_board_mux *board_subset,
> + struct omap_ball *package_balls,
> + int flags)
> +{
> + /*
> + * REVISIT: Do the ioremap with mux_pbase here once after the old
> + * code is gone
> + * REVISIT: Do not initialize again if already called
> + */
> +
> + omap_mux_apply_subset(package_subset, superset);
> + omap_mux_apply_pins(package_balls, superset);
> + omap_mux_set_board(board_subset);
> + omap_mux_init_dynamic(board_subset, superset, flags);
With full tables for each package we won't need superset here.
> +
> + return 0;
> +}
> +
> +#endif
> +
> +/*----------------------------------------------------------------------------*/
> +
> int __init omap2_mux_init(void)
> {
> u32 mux_pbase;
> diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
> new file mode 100644
> index 0000000..a8453f5
> --- /dev/null
> +++ b/arch/arm/mach-omap2/mux.h
Wouldn't arch/arm/mach-omap2/include/mach/mux.h be better?
> @@ -0,0 +1,125 @@
> +/*
> + * Copyright (C) 2009 Nokia
> + * Copyright (C) 2009 Texas Instruments
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#define OMAP_MUX_TERMINATOR 0xffff
> +
> +/* 34xx mux mode options for each pin. See TRM for options */
> +#define OMAP_MUX_MODE0 0
> +#define OMAP_MUX_MODE1 1
> +#define OMAP_MUX_MODE2 2
> +#define OMAP_MUX_MODE3 3
> +#define OMAP_MUX_MODE4 4
> +#define OMAP_MUX_MODE5 5
> +#define OMAP_MUX_MODE6 6
> +#define OMAP_MUX_MODE7 7
> +
> +/* 24xx/34xx mux bit defines */
> +#define OMAP_PULL_ENA (1 << 3)
> +#define OMAP_PULL_UP (1 << 4)
> +#define OMAP_ALTELECTRICALSEL (1 << 5)
> +
> +/* 34xx specific mux bit defines */
> +#define OMAP_INPUT_EN (1 << 8)
> +#define OMAP_OFF_EN (1 << 9)
> +#define OMAP_OFFOUT_EN (1 << 10)
> +#define OMAP_OFFOUT_VAL (1 << 11)
> +#define OMAP_OFF_PULL_EN (1 << 12)
> +#define OMAP_OFF_PULL_UP (1 << 13)
> +#define OMAP_WAKEUP_EN (1 << 14)
> +
> +/* Active pin states */
> +#define OMAP_PIN_OUTPUT 0
> +#define OMAP_PIN_INPUT OMAP_INPUT_EN
> +#define OMAP_PIN_INPUT_PULLUP (OMAP_PULL_ENA | OMAP_INPUT_EN \
> + | OMAP_PULL_UP)
> +#define OMAP_PIN_INPUT_PULLDOWN (OMAP_PULL_ENA | OMAP_INPUT_EN)
> +
> +/* Off mode states */
> +#define OMAP_PIN_OFF_NONE 0
> +#define OMAP_PIN_OFF_OUTPUT_HIGH (OMAP_OFF_EN | OMAP_OFFOUT_EN \
> + | OMAP_OFFOUT_VAL)
> +#define OMAP_PIN_OFF_OUTPUT_LOW (OMAP_OFF_EN | OMAP_OFFOUT_EN)
> +#define OMAP_PIN_OFF_INPUT_PULLUP (OMAP_OFF_EN | OMAP_OFF_PULL_EN \
> + | OMAP_OFF_PULL_UP)
> +#define OMAP_PIN_OFF_INPUT_PULLDOWN (OMAP_OFF_EN | OMAP_OFF_PULL_EN)
> +#define OMAP_PIN_OFF_WAKEUPENABLE OMAP_WAKEUP_EN
> +
> +/* Flags for struct omap_board_mux */
> +#define OMAP_MUX_DYNAMIC (1 << 0) /* Keep mux in memory */
> +
> +/* Flags for omap_mux_init */
> +#define OMAP_MUX_ALL_DYNAMIC (1 << 16) /* Always in memory */
> +#define OMAP_PACKAGE_MASK 0xffff
> +#define OMAP_PACKAGE_CUS 3 /* 423-pin 0.65 */
> +#define OMAP_PACKAGE_CBB 2 /* 515-pin 0.40 0.50 */
> +#define OMAP_PACKAGE_CBC 1 /* 515-pin 0.50 0.65 */
> +
> +
> +#define OMAP_MUX_NR_MODES 8 /* Available modes */
> +#define OMAP_MUX_NR_SIDES 2 /* Bottom & top */
> +
> +/**
> + * struct omap_mux - data for omap mux register offset and it's value
> + * @reg_offset: mux register offset from the mux base
> + * @gpio: GPIO number
> + * @muxnames: available signal modes for a ball
> + */
> +struct omap_mux {
> + u16 reg_offset;
> + u16 gpio;
> +#ifdef CONFIG_DEBUG_FS
> + char *muxnames[OMAP_MUX_NR_MODES];
> + char *balls[OMAP_MUX_NR_SIDES];
> +#endif
> +};
> +
> +/**
> + * struct omap_ball - data for balls on omap package
> + * @reg_offset: mux register offset from the mux base
> + * @balls: available balls on the package
> + */
> +struct omap_ball {
> + u16 reg_offset;
> + char *balls[OMAP_MUX_NR_SIDES];
> +};
> +
> +/**
> + * struct omap_board_mux - data for initializing mux registers
> + * @reg_offset: mux register offset from the mux base
> + * @mux_value: desired mux value to set
> + * @flags: extra flags
> + */
> +struct omap_board_mux {
> + u16 reg_offset;
> + u16 value;
> + u32 flags;
> +};
> +
> +#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_ARCH_OMAP34XX)
> +
> +int omap3_mux_init(struct omap_board_mux *board_mux_config, int flags);
> +int omap_mux_init(u32 mux_pbase, u32 mux_size,
> + struct omap_mux *superset,
> + struct omap_mux *package_subset,
> + struct omap_board_mux *board_subset,
> + struct omap_ball *package_balls,
> + int flags);
> +int omap_mux_set(u16 val, u16 mux_offset, int flags);
> +
> +#else
> +
> +static inline int omap3_mux_init(struct omap_board_mux *board_mux_config,
> + int flags)
> +{
> +}
> +static inline int omap_mux_set(u16 val, u16 mux_offset, int flags)
> +{
> +}
> +
> +#endif
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx
2009-10-29 20:36 ` [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx Tony Lindgren
@ 2009-11-01 10:30 ` Mike Rapoport
2009-11-02 19:10 ` Tony Lindgren
0 siblings, 1 reply; 23+ messages in thread
From: Mike Rapoport @ 2009-11-01 10:30 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, mike.rapoport
Tony Lindgren wrote:
> Add new style mux data for 34xx. This should also
> work with 3630 easily by adding the processor subset
> and ball data.
>
> Note that this data is __initdata, and gets optimized
> out if CONFIG_OMAP_MUX is not set. Also, the debug data
> gets optimized out if CONFIG_DEBUG_FS is not set.
>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
> arch/arm/mach-omap2/Makefile | 4
> arch/arm/mach-omap2/mux.h | 2
> arch/arm/mach-omap2/mux34xx.c | 1552 +++++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-omap2/mux34xx.h | 352 +++++++++
> 4 files changed, 1910 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-omap2/mux34xx.c
> create mode 100644 arch/arm/mach-omap2/mux34xx.h
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index 03cb4fc..4b6d7b9 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -23,6 +23,10 @@ obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o
> obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o
> obj-$(CONFIG_ARCH_OMAP3) += sram34xx.o
>
> +ifeq ($(CONFIG_OMAP_MUX),y)
> +obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o
> +endif
> +
> # SMS/SDRC
> obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
> # obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o
> diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
> index a8453f5..0d52318 100644
> --- a/arch/arm/mach-omap2/mux.h
> +++ b/arch/arm/mach-omap2/mux.h
> @@ -7,6 +7,8 @@
> * published by the Free Software Foundation.
> */
>
> +#include "mux34xx.h"
> +
> #define OMAP_MUX_TERMINATOR 0xffff
>
> /* 34xx mux mode options for each pin. See TRM for options */
> diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
> new file mode 100644
> index 0000000..62c2b6a
> --- /dev/null
> +++ b/arch/arm/mach-omap2/mux34xx.c
> @@ -0,0 +1,1552 @@
> +/*
> + * Copyright (C) 2009 Nokia
> + * Copyright (C) 2009 Texas Instruments
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/init.h>
> +
> +#include "mux.h"
> +
> +#ifdef CONFIG_DEBUG_FS
> +
> +#define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
> +{ \
> + .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
> + .gpio = (g), \
> + .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \
> +}
> +
> +#else
> +
> +#define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
> +{ \
> + .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
> + .gpio = (g), \
> +}
> +
> +#endif
> +
> +#define _OMAP3_BALLENTRY(M0, bb, bt) \
> +{ \
> + .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
> + .balls = { bb, bt }, \
> +}
> +
> +/*
> + * Superset of all mux modes, same as the CBC package
> + */
> +static struct omap_mux __initdata omap3_muxmodes[] = {
Is the CBS package for sure will be superset of all possible OMAP3
variants/packages?
> + _OMAP3_MUXENTRY(CAM_D0, 99,
> + "cam_d0", NULL, NULL, NULL,
> + "gpio_99", NULL, NULL, "safe_mode"),
[ snip ]
> + { .reg_offset = OMAP_MUX_TERMINATOR },
> +};
> +
> +/*
> + * Pins different on CBC package comapared to CBC package
> + */
> +struct omap_mux __initdata omap3_cbc_subset[] = {
> + { .reg_offset = OMAP_MUX_TERMINATOR },
> +};
> +
> +/*
> + * Balls for CBC package
> + * 515-pin s-PBGA Package, 0.65mm Ball Pitch (Top), 0.50mm Ball Pitch (Bottom)
> + *
> + * FIXME: What's up with the outdated TI documentation? See:
> + *
> + * http://wiki.davincidsp.com/index.php/Datasheet_Errata_for_OMAP35x_CBC_Package
> + * http://community.ti.com/forums/t/10982.aspx
> + */
> +#ifdef CONFIG_DEBUG_FS
> +struct omap_ball __initdata omap3_cbc_ball[] = {
> + _OMAP3_BALLENTRY(CAM_D0, "ae16", NULL),
[ snip ]
> + { .reg_offset = OMAP_MUX_TERMINATOR },
> +};
> +#else
> +#define omap3_cbc_ball NULL
> +#endif
> +
> +/*
> + * Pins different on CUS package comapared to CBC package
> + */
Maybe we'll just add the entire package rather than its difference to the CBC
package?
> +struct omap_mux __initdata omap3_cus_subset[] = {
> + _OMAP3_MUXENTRY(CAM_D10, 109,
> + "cam_d10", NULL, NULL, NULL,
> + "gpio_109", NULL, NULL, "safe_mode"),
[ snip ]
> + { .reg_offset = OMAP_MUX_TERMINATOR },
> +};
> +
> +/*
> + * Balls for CUS package
> + * 423-pin s-PBGA Package, 0.65mm Ball Pitch (Bottom)
> + */
> +#ifdef CONFIG_DEBUG_FS
> +struct omap_ball __initdata omap3_cus_ball[] = {
> + _OMAP3_BALLENTRY(CAM_D0, "ab18", NULL),
[ snip ]
> + { .reg_offset = OMAP_MUX_TERMINATOR },
> +};
> +#else
> +#define omap3_cus_ball NULL
> +#endif
> +
> +/*
> + * Pins different on CBB package comapared to CBC package
> + */
ditto
> +struct omap_mux __initdata omap3_cbb_subset[] = {
> + _OMAP3_MUXENTRY(CAM_D10, 109,
> + "cam_d10", NULL, NULL, NULL,
> + "gpio_109", NULL, NULL, "safe_mode"),
[ snip ]
> + { .reg_offset = OMAP_MUX_TERMINATOR },
> +};
> +
> +/*
> + * Balls for CBB package
> + * 515-pin s-PBGA Package, 0.50mm Ball Pitch (Top), 0.40mm Ball Pitch (Bottom)
> + */
> +#ifdef CONFIG_DEBUG_FS
> +struct omap_ball __initdata omap3_cbb_ball[] = {
> + _OMAP3_BALLENTRY(CAM_D0, "ag17", NULL),
[ snip ]
> + { .reg_offset = OMAP_MUX_TERMINATOR },
> +};
> +#else
> +#define omap3_cbb_ball NULL
> +#endif
> +
> +int __init omap3_mux_init(struct omap_board_mux *board_subset, int flags)
> +{
> + struct omap_mux *package_subset;
> + struct omap_ball *package_balls;
> +
> + switch (flags & OMAP_PACKAGE_MASK) {
> + case (OMAP_PACKAGE_CBC):
> + package_subset = omap3_cbc_subset;
> + package_balls = omap3_cbc_ball;
> + break;
> + case (OMAP_PACKAGE_CBB):
> + package_subset = omap3_cbb_subset;
> + package_balls = omap3_cbb_ball;
> + break;
> + case (OMAP_PACKAGE_CUS):
> + package_subset = omap3_cus_subset;
> + package_balls = omap3_cus_ball;
> + break;
> + default:
> + printk(KERN_ERR "mux: Unknown omap package, mux disabled\n");
> + return -EINVAL;
> + }
> +
> + return omap_mux_init(OMAP3_CONTROL_PADCONF_MUX_PBASE,
> + OMAP3_CONTROL_PADCONF_MUX_SIZE,
> + omap3_muxmodes, package_subset, board_subset,
> + package_balls, flags);
> +}
> diff --git a/arch/arm/mach-omap2/mux34xx.h b/arch/arm/mach-omap2/mux34xx.h
> new file mode 100644
> index 0000000..8c5f261
> --- /dev/null
> +++ b/arch/arm/mach-omap2/mux34xx.h
> @@ -0,0 +1,352 @@
> +/*
> + * Copyright (C) 2009 Nokia
> + * Copyright (C) 2009 Texas Instruments
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
[ snip ]
> +
> +#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
> + (OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
What about adding defines for each possible mode configuration, except, perhaps,
GPIO?
#define OMAP3_PIN_CAM_D0 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE0 | OMAP_PIN_INPUT, 0)
#define OMAP3_PIN_CAM_D0_CSI2_DX2 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE2 | \
OMAP_PIN_INPUT, 0)
And, I'm for adding OMAP_MUX_GPIO_{OUT,IN,IN_PU,IN_PD}(x) as well.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 2/5] omap: mux: Add new style pin multiplexing code for omap3
2009-11-01 10:30 ` Mike Rapoport
@ 2009-11-02 18:54 ` Tony Lindgren
2009-11-03 6:56 ` Mike Rapoport
0 siblings, 1 reply; 23+ messages in thread
From: Tony Lindgren @ 2009-11-02 18:54 UTC (permalink / raw)
To: Mike Rapoport; +Cc: linux-omap, mike.rapoport
* Mike Rapoport <mike@compulab.co.il> [091101 02:29]:
>
>
> Tony Lindgren wrote:
> > Initially only for 34xx. Keep the old code working
> > until the data has been converted to the new style
> > format.
> >
> > REVISIT: Add support for cmdline parsing
> > REVISIT: Add a function to get mux register by GPIO pin
> > REVISIT: Add a function to set an array of mux entries
> >
> > Signed-off-by: Tony Lindgren <tony@atomide.com>
> > ---
> > arch/arm/mach-omap2/mux.c | 237 +++++++++++++++++++++++++++++++++++++++++++++
> > arch/arm/mach-omap2/mux.h | 125 ++++++++++++++++++++++++
> > 2 files changed, 362 insertions(+), 0 deletions(-)
> > create mode 100644 arch/arm/mach-omap2/mux.h
> >
> > diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
> > index 9841423..45e6d4d 100644
> > --- a/arch/arm/mach-omap2/mux.c
> > +++ b/arch/arm/mach-omap2/mux.c
> > @@ -27,12 +27,15 @@
> > #include <linux/init.h>
> > #include <linux/io.h>
> > #include <linux/spinlock.h>
> > +#include <linux/list.h>
> >
> > #include <asm/system.h>
> >
> > #include <plat/control.h>
> > #include <plat/mux.h>
> >
> > +#include "mux.h"
>
> Wouldn't <mach/mux.h> be better?
Well I've been thinking that we should limit pin muxing to the board-*.c
and platform_data init files under mach-omap2. Keeping the mux.h header
file under mach-omap2/mux.h would certainly flag any attempts to use it
under drivers/* for example.
The reasons being that if we limit muxing to the files under mach-omap2,
we can safely assume that the mux data and code is mostly __initdata
and __init.
And then we can safely do things like multiplex the pins with the real
signal names without having to keep all the mux data wasting memory
later on.
Comments? I'm OK doing keeping it under mach/mux.h, but I'd like to
establish a policy of doing the muxing only in platform init code
under mach-omap2.
>
> > #ifdef CONFIG_OMAP_MUX
> >
> > #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
> > @@ -626,6 +629,11 @@ static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
> > #endif
> >
> > #ifdef CONFIG_ARCH_OMAP34XX
> > +
> > +/*
> > + * NOTE: This function will disappear soon, please use the new
> > + * omap_mux_set() instead
> > + */
>
> I think it's worth adding more visible notice, e.g. marking the function
> deprecated or adding a WARN statement to its body.
Agreed. I was thinking about writing a little script to convert the
old mux entries to the new ones, and drop all the old code and data
for omap3 hopefully this week..
> > static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
> > {
> > static DEFINE_SPINLOCK(mux_spin_lock);
> > @@ -644,6 +652,235 @@ static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
> > #define omap34xx_cfg_reg NULL
> > #endif
> >
> > +/*----------------------------------------------------------------------------*/
> > +
> > +#ifdef CONFIG_ARCH_OMAP34XX
> > +
> > +static LIST_HEAD(muxmodes);
> > +static DEFINE_MUTEX(muxmode_mutex);
> > +
> > +/*
> > + * REVISIT: See if pin is set dynamic, and add it to the list
> > + */
> > +int omap_mux_set(u16 val, u16 mux_offset, int flags)
> > +{
> > + omap_mux_write(val, mux_offset);
> > +
> > + return 0;
> > +}
> > +
> > +struct omap_mux_entry {
> > + struct omap_mux mux;
> > + struct list_head node;
> > +};
> > +
> > +static struct omap_mux *omap_mux_list_add(struct omap_mux *src)
> > +{
> > + struct omap_mux_entry *entry;
> > + struct omap_mux *m;
> > +
> > + int i;
> > +
> > + entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL);
> > + if (!entry)
> > + return NULL;
> > +
> > + m = &entry->mux;
> > + memcpy(m, src, sizeof(struct omap_mux_entry));
> > +
> > +#ifdef CONFIG_DEBUG_FS
> > + for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
> > + if (src->muxnames[i]) {
> > + m->muxnames[i] =
> > + kzalloc(strlen(src->muxnames[i]) + 1,
> > + GFP_KERNEL);
> > + if (!m->muxnames[i])
> > + goto free_names;
> > + strcpy(m->muxnames[i], src->muxnames[i]);
> > + }
> > + }
> > + for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
> > + if (src->balls[i]) {
> > + m->balls[i] =
> > + kzalloc(strlen(src->balls[i]) + 1,
> > + GFP_KERNEL);
> > + if (!m->balls[i])
> > + goto free_balls;
> > + strcpy(m->balls[i], src->balls[i]);
> > + }
> > + }
> > +#endif
> > +
> > + mutex_lock(&muxmode_mutex);
> > + list_add(&entry->node, &muxmodes);
> > + mutex_unlock(&muxmode_mutex);
> > +
> > + return m;
> > +
> > +#ifdef CONFIG_DEBUG_FS
> > +free_balls:
> > + for (i = 0; i < OMAP_MUX_NR_SIDES; i++)
> > + if (m->balls[i])
> > + kfree(m->balls[i]);
> > +free_names:
> > + for (i = 0; i < OMAP_MUX_NR_MODES; i++)
> > + if (m->muxnames[i])
> > + kfree(m->muxnames[i]);
> > +#endif
> > +
> > + kfree(entry);
> > +
> > + return NULL;
> > +}
> > +
> > +static void __init omap_mux_apply_subset(struct omap_mux *p,
> > + struct omap_mux *superset)
> > +{
>
> I'm not sure it is required.
>
> Is it for sure that CBC package will remain superset of all possible mux modes
> for all OMAP3 variants through entire OMAP3 lifespan? What about OMAP3630 and
> OMAP3517? Are their packages also subset of the CBC one?
Basically the mux registers are the same for all omap3, then the
packaging determines which signal options are available for the
package.
Looks like 3630 changes the mux name for few entries, and adds some
new registers, so that should be easily covered too.
The superset may not always be named CBC, but we should have one
omap3 superset still.
> I'd rather keep the entire tables for different packages/CPU variants. They are
> anyway __initdata, so they would be discarded later during boot. And, keeping
> the full tables rather than differences makes omap_mux_apply_subset and
> unnecessary and omap_mux_apply_pins much simpler.
I agree it would make it a bit simpler. But then we need to patch
multiple data tables if we found errors in the data.
And the signal data is mostly the same for all omap3.
> If we keep the full tables instead of diffs we could do something like:
>
> static struct omap_mux *muxmodes;
> static void __init omap_mux_apply_subset(struct omap_mux *p)
> {
> muxmodes = p;
> }
Right, that's the way I had it originally, but the amount of data
duplicated three times so far looked ugly to me :)
> > + while (p->reg_offset != OMAP_MUX_TERMINATOR) {
> > + struct omap_mux *s = superset;
> > + int found = 0;
> > +
> > + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
> > + if (s->reg_offset == p->reg_offset) {
> > + *s = *p;
> > + found++;
> > + break;
> > + }
> > + s++;
> > + }
> > + if (!found)
> > + printk(KERN_ERR "mux: Unknown entry offset 0x%x\n",
> > + p->reg_offset);
> > + p++;
> > + }
> > +}
> > +
> > +#ifdef CONFIG_DEBUG_FS
> > +
> > +static void __init omap_mux_apply_pins(struct omap_ball *b,
> > + struct omap_mux *superset)
> > +{
> > + while (b->reg_offset != OMAP_MUX_TERMINATOR) {
> > + struct omap_mux *s = superset;
> > + int found = 0;
> > +
> > + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
> > + if (s->reg_offset == b->reg_offset) {
> > + s->balls[0] = b->balls[0];
> > + s->balls[1] = b->balls[1];
> > + found++;
> > + break;
> > + }
>
> Again, if we keep the full tables instead of diffs we don't need the nested
> loop. Provided that balls table has pins in the same order as the mux table we
> could have only the assignments here.
The difference with the balls compared to signals is that they are different
for each package. (Just to recap, the naming is a matrix of the pins
where the coordinates are alphabets in one direction, and number
in the other direction).
So the pin data is really separate data from the mux register and
signal data.
Mux registers and signal names are mostly the same for each omap3,
while the ball names are renamed for each package option.
> > + s++;
> > + }
> > + if (!found)
> > + printk(KERN_ERR "mux: Unknown ball offset 0x%x\n",
> > + b->reg_offset);
> > + b++;
> > + }
> > +}
> > +
> > +#else /* CONFIG_DEBUG_FS */
> > +
> > +static inline void omap_mux_apply_pins(struct omap_ball *b,
> > + struct omap_mux *superset)
> > +{
> > +}
> > +
> > +#endif /* CONFIG_DEBUG_FS */
> > +
> > +static void __init omap_mux_set_board(struct omap_board_mux *board)
> > +{
> > + while (board->reg_offset != OMAP_MUX_TERMINATOR) {
> > + omap_mux_write(board->value, board->reg_offset);
> > + board++;
> > + }
> > +}
> > +
> > +static void __init omap_mux_init_dynamic(struct omap_board_mux *board_subset,
> > + struct omap_mux *superset,
> > + int flags)
> > +{
> > + struct omap_mux *s = superset;
> > + int always_dynamic = flags & OMAP_MUX_ALL_DYNAMIC;
> > +
> > + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
> > + struct omap_mux *entry;
> > +
> > + if (!always_dynamic) {
> > + u16 mode;
> > +
> > + /* GPIO pins must be always dynamic for PM */
> > + mode = omap_mux_read(s->reg_offset) & 0x7;
> > + if (mode != OMAP_MUX_MODE4)
> > + continue;
> > + }
> > +
> > + entry = omap_mux_list_add(s);
> > + if (!entry) {
> > + printk(KERN_ERR "mux: Could not add entry\n");
> > + return;
> > + }
> > + s++;
> > + }
> > +
> > + if (always_dynamic)
> > + return;
> > +
> > + /* Search for pins set as dynamic in the board-*.c file */
> > + while (board_subset->reg_offset != OMAP_MUX_TERMINATOR) {
> > +
> > + /* GPIO pins are always dynamic, and already handled */
> > + if ((board_subset->value & 0x7) == OMAP_MUX_MODE4)
> > + continue;
> > +
> > + if (!(board_subset->flags & OMAP_MUX_DYNAMIC))
> > + continue;
> > +
> > + s = superset;
> > + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
> > + if (s->reg_offset == board_subset->reg_offset) {
> > + struct omap_mux *entry = omap_mux_list_add(s);
> > + if (!entry) {
> > + printk(KERN_ERR "mux: Could not add "
> > + "board entry\n");
> > + return;
> > + }
> > + }
> > + s++;
> > + }
> > + board_subset++;
> > + }
> > +}
> > +
> > +/*
> > + * Do not call this from board-*.c files, use omap3_mux_init() instead
> > + */
> > +int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
> > + struct omap_mux *superset,
> > + struct omap_mux *package_subset,
> > + struct omap_board_mux *board_subset,
> > + struct omap_ball *package_balls,
> > + int flags)
> > +{
> > + /*
> > + * REVISIT: Do the ioremap with mux_pbase here once after the old
> > + * code is gone
> > + * REVISIT: Do not initialize again if already called
> > + */
> > +
> > + omap_mux_apply_subset(package_subset, superset);
> > + omap_mux_apply_pins(package_balls, superset);
> > + omap_mux_set_board(board_subset);
> > + omap_mux_init_dynamic(board_subset, superset, flags);
>
> With full tables for each package we won't need superset here.
Right, but the maintenance will be more of a pain because of
the duplicate data. And we still need to copy the __initdata to
the list for the configured entries.
> > +
> > + return 0;
> > +}
> > +
> > +#endif
> > +
> > +/*----------------------------------------------------------------------------*/
> > +
> > int __init omap2_mux_init(void)
> > {
> > u32 mux_pbase;
> > diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
> > new file mode 100644
> > index 0000000..a8453f5
> > --- /dev/null
> > +++ b/arch/arm/mach-omap2/mux.h
>
> Wouldn't arch/arm/mach-omap2/include/mach/mux.h be better?
Unless we want to limit the usage of the code to board-*.c files,
and not allow using it elsewhere. But I'm OK either way.
> > @@ -0,0 +1,125 @@
> > +/*
> > + * Copyright (C) 2009 Nokia
> > + * Copyright (C) 2009 Texas Instruments
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +#define OMAP_MUX_TERMINATOR 0xffff
> > +
> > +/* 34xx mux mode options for each pin. See TRM for options */
> > +#define OMAP_MUX_MODE0 0
> > +#define OMAP_MUX_MODE1 1
> > +#define OMAP_MUX_MODE2 2
> > +#define OMAP_MUX_MODE3 3
> > +#define OMAP_MUX_MODE4 4
> > +#define OMAP_MUX_MODE5 5
> > +#define OMAP_MUX_MODE6 6
> > +#define OMAP_MUX_MODE7 7
> > +
> > +/* 24xx/34xx mux bit defines */
> > +#define OMAP_PULL_ENA (1 << 3)
> > +#define OMAP_PULL_UP (1 << 4)
> > +#define OMAP_ALTELECTRICALSEL (1 << 5)
> > +
> > +/* 34xx specific mux bit defines */
> > +#define OMAP_INPUT_EN (1 << 8)
> > +#define OMAP_OFF_EN (1 << 9)
> > +#define OMAP_OFFOUT_EN (1 << 10)
> > +#define OMAP_OFFOUT_VAL (1 << 11)
> > +#define OMAP_OFF_PULL_EN (1 << 12)
> > +#define OMAP_OFF_PULL_UP (1 << 13)
> > +#define OMAP_WAKEUP_EN (1 << 14)
> > +
> > +/* Active pin states */
> > +#define OMAP_PIN_OUTPUT 0
> > +#define OMAP_PIN_INPUT OMAP_INPUT_EN
> > +#define OMAP_PIN_INPUT_PULLUP (OMAP_PULL_ENA | OMAP_INPUT_EN \
> > + | OMAP_PULL_UP)
> > +#define OMAP_PIN_INPUT_PULLDOWN (OMAP_PULL_ENA | OMAP_INPUT_EN)
> > +
> > +/* Off mode states */
> > +#define OMAP_PIN_OFF_NONE 0
> > +#define OMAP_PIN_OFF_OUTPUT_HIGH (OMAP_OFF_EN | OMAP_OFFOUT_EN \
> > + | OMAP_OFFOUT_VAL)
> > +#define OMAP_PIN_OFF_OUTPUT_LOW (OMAP_OFF_EN | OMAP_OFFOUT_EN)
> > +#define OMAP_PIN_OFF_INPUT_PULLUP (OMAP_OFF_EN | OMAP_OFF_PULL_EN \
> > + | OMAP_OFF_PULL_UP)
> > +#define OMAP_PIN_OFF_INPUT_PULLDOWN (OMAP_OFF_EN | OMAP_OFF_PULL_EN)
> > +#define OMAP_PIN_OFF_WAKEUPENABLE OMAP_WAKEUP_EN
> > +
> > +/* Flags for struct omap_board_mux */
> > +#define OMAP_MUX_DYNAMIC (1 << 0) /* Keep mux in memory */
> > +
> > +/* Flags for omap_mux_init */
> > +#define OMAP_MUX_ALL_DYNAMIC (1 << 16) /* Always in memory */
> > +#define OMAP_PACKAGE_MASK 0xffff
> > +#define OMAP_PACKAGE_CUS 3 /* 423-pin 0.65 */
> > +#define OMAP_PACKAGE_CBB 2 /* 515-pin 0.40 0.50 */
> > +#define OMAP_PACKAGE_CBC 1 /* 515-pin 0.50 0.65 */
> > +
> > +
> > +#define OMAP_MUX_NR_MODES 8 /* Available modes */
> > +#define OMAP_MUX_NR_SIDES 2 /* Bottom & top */
> > +
> > +/**
> > + * struct omap_mux - data for omap mux register offset and it's value
> > + * @reg_offset: mux register offset from the mux base
> > + * @gpio: GPIO number
> > + * @muxnames: available signal modes for a ball
> > + */
> > +struct omap_mux {
> > + u16 reg_offset;
> > + u16 gpio;
> > +#ifdef CONFIG_DEBUG_FS
> > + char *muxnames[OMAP_MUX_NR_MODES];
> > + char *balls[OMAP_MUX_NR_SIDES];
> > +#endif
> > +};
> > +
> > +/**
> > + * struct omap_ball - data for balls on omap package
> > + * @reg_offset: mux register offset from the mux base
> > + * @balls: available balls on the package
> > + */
> > +struct omap_ball {
> > + u16 reg_offset;
> > + char *balls[OMAP_MUX_NR_SIDES];
> > +};
> > +
> > +/**
> > + * struct omap_board_mux - data for initializing mux registers
> > + * @reg_offset: mux register offset from the mux base
> > + * @mux_value: desired mux value to set
> > + * @flags: extra flags
> > + */
> > +struct omap_board_mux {
> > + u16 reg_offset;
> > + u16 value;
> > + u32 flags;
> > +};
> > +
> > +#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_ARCH_OMAP34XX)
> > +
> > +int omap3_mux_init(struct omap_board_mux *board_mux_config, int flags);
> > +int omap_mux_init(u32 mux_pbase, u32 mux_size,
> > + struct omap_mux *superset,
> > + struct omap_mux *package_subset,
> > + struct omap_board_mux *board_subset,
> > + struct omap_ball *package_balls,
> > + int flags);
> > +int omap_mux_set(u16 val, u16 mux_offset, int flags);
> > +
> > +#else
> > +
> > +static inline int omap3_mux_init(struct omap_board_mux *board_mux_config,
> > + int flags)
> > +{
> > +}
> > +static inline int omap_mux_set(u16 val, u16 mux_offset, int flags)
> > +{
> > +}
> > +
> > +#endif
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> >
>
> --
> Sincerely yours,
> Mike.
>
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/5] New mux code for 34xx
2009-11-01 10:29 ` Mike Rapoport
@ 2009-11-02 18:56 ` Tony Lindgren
2009-11-03 6:42 ` Mike Rapoport
0 siblings, 1 reply; 23+ messages in thread
From: Tony Lindgren @ 2009-11-02 18:56 UTC (permalink / raw)
To: Mike Rapoport; +Cc: linux-omap, mike.rapoport
* Mike Rapoport <mike@compulab.co.il> [091101 02:29]:
> Hi Tony,
>
> Tony Lindgren wrote:
> > Hi all,
> >
> > Here's an initial version of the new mux code to play with.
> > Big thanks to Paul & Benoit for the 34xx mux data!
>
> I've tried your patches, they seem to work just fine on CM-T35.
OK cool.
> > To try out the new code, compile a kernel with CONFIG_OMAP_MUX
> > and CONFIG_DEBUG_FS and these patches. The series is also
> > availabe in the l-o git in mux branch.
>
> [ snip ]
>
> >
> > Comments welcome as always.
>
> There are some comments on patches 2 (Add new style pin multiplexing code for
> omap3) and 3 (Add new style pin multiplexing data for 34xx). No nitpicking for
> now, but checkpatch.pl is unhappy with the patchset :)
OK, will run checkpatch.pl --strict on them. Thanks for the
comments!
Regards,
Tony
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx
2009-11-01 10:30 ` Mike Rapoport
@ 2009-11-02 19:10 ` Tony Lindgren
2009-11-03 7:10 ` Mike Rapoport
0 siblings, 1 reply; 23+ messages in thread
From: Tony Lindgren @ 2009-11-02 19:10 UTC (permalink / raw)
To: Mike Rapoport; +Cc: linux-omap, mike.rapoport
* Mike Rapoport <mike@compulab.co.il> [091101 02:30]:
>
>
> Tony Lindgren wrote:
> > Add new style mux data for 34xx. This should also
> > work with 3630 easily by adding the processor subset
> > and ball data.
> >
> > Note that this data is __initdata, and gets optimized
> > out if CONFIG_OMAP_MUX is not set. Also, the debug data
> > gets optimized out if CONFIG_DEBUG_FS is not set.
> >
> > Signed-off-by: Tony Lindgren <tony@atomide.com>
> > ---
> > arch/arm/mach-omap2/Makefile | 4
> > arch/arm/mach-omap2/mux.h | 2
> > arch/arm/mach-omap2/mux34xx.c | 1552 +++++++++++++++++++++++++++++++++++++++++
> > arch/arm/mach-omap2/mux34xx.h | 352 +++++++++
> > 4 files changed, 1910 insertions(+), 0 deletions(-)
> > create mode 100644 arch/arm/mach-omap2/mux34xx.c
> > create mode 100644 arch/arm/mach-omap2/mux34xx.h
> >
> > diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> > index 03cb4fc..4b6d7b9 100644
> > --- a/arch/arm/mach-omap2/Makefile
> > +++ b/arch/arm/mach-omap2/Makefile
> > @@ -23,6 +23,10 @@ obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o
> > obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o
> > obj-$(CONFIG_ARCH_OMAP3) += sram34xx.o
> >
> > +ifeq ($(CONFIG_OMAP_MUX),y)
> > +obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o
> > +endif
> > +
> > # SMS/SDRC
> > obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
> > # obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o
> > diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
> > index a8453f5..0d52318 100644
> > --- a/arch/arm/mach-omap2/mux.h
> > +++ b/arch/arm/mach-omap2/mux.h
> > @@ -7,6 +7,8 @@
> > * published by the Free Software Foundation.
> > */
> >
> > +#include "mux34xx.h"
> > +
> > #define OMAP_MUX_TERMINATOR 0xffff
> >
> > /* 34xx mux mode options for each pin. See TRM for options */
> > diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
> > new file mode 100644
> > index 0000000..62c2b6a
> > --- /dev/null
> > +++ b/arch/arm/mach-omap2/mux34xx.c
> > @@ -0,0 +1,1552 @@
> > +/*
> > + * Copyright (C) 2009 Nokia
> > + * Copyright (C) 2009 Texas Instruments
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + */
> > +
> > +#include <linux/module.h>
> > +#include <linux/init.h>
> > +
> > +#include "mux.h"
> > +
> > +#ifdef CONFIG_DEBUG_FS
> > +
> > +#define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
> > +{ \
> > + .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
> > + .gpio = (g), \
> > + .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \
> > +}
> > +
> > +#else
> > +
> > +#define _OMAP3_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
> > +{ \
> > + .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
> > + .gpio = (g), \
> > +}
> > +
> > +#endif
> > +
> > +#define _OMAP3_BALLENTRY(M0, bb, bt) \
> > +{ \
> > + .reg_offset = (OMAP3_CONTROL_PADCONF_##M0##_OFFSET), \
> > + .balls = { bb, bt }, \
> > +}
> > +
> > +/*
> > + * Superset of all mux modes, same as the CBC package
> > + */
> > +static struct omap_mux __initdata omap3_muxmodes[] = {
>
> Is the CBS package for sure will be superset of all possible OMAP3
> variants/packages?
Not necessarily, but a single superset works for all omap3.
I'll remove the CBC comment, as with 3630 it will be the superset.
> > + _OMAP3_MUXENTRY(CAM_D0, 99,
> > + "cam_d0", NULL, NULL, NULL,
> > + "gpio_99", NULL, NULL, "safe_mode"),
>
> [ snip ]
>
> > + { .reg_offset = OMAP_MUX_TERMINATOR },
> > +};
> > +
> > +/*
> > + * Pins different on CBC package comapared to CBC package
> > + */
> > +struct omap_mux __initdata omap3_cbc_subset[] = {
> > + { .reg_offset = OMAP_MUX_TERMINATOR },
> > +};
> > +
> > +/*
> > + * Balls for CBC package
> > + * 515-pin s-PBGA Package, 0.65mm Ball Pitch (Top), 0.50mm Ball Pitch (Bottom)
> > + *
> > + * FIXME: What's up with the outdated TI documentation? See:
> > + *
> > + * http://wiki.davincidsp.com/index.php/Datasheet_Errata_for_OMAP35x_CBC_Package
> > + * http://community.ti.com/forums/t/10982.aspx
> > + */
> > +#ifdef CONFIG_DEBUG_FS
> > +struct omap_ball __initdata omap3_cbc_ball[] = {
> > + _OMAP3_BALLENTRY(CAM_D0, "ae16", NULL),
>
> [ snip ]
>
> > + { .reg_offset = OMAP_MUX_TERMINATOR },
> > +};
> > +#else
> > +#define omap3_cbc_ball NULL
> > +#endif
> > +
> > +/*
> > + * Pins different on CUS package comapared to CBC package
> > + */
>
> Maybe we'll just add the entire package rather than its difference to the CBC
> package?
IMHO it makes maintenance harder because of duplicating the data
like I commented earlier. Currently the duplicate data would be
for the 3 existing packages + whatever 36xx packages will be
introduces.
<snip>
> > +
> > +#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
> > + (OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
>
> What about adding defines for each possible mode configuration, except, perhaps,
> GPIO?
Yeah it would be nice to make it easy. How about someting like:
int __init omap_mux_init_by_name(char *name, int flags);
...
omap_mux_init_by_name("i2c1_scl", OMAP_PIN_INPUT_PULLUP);
> #define OMAP3_PIN_CAM_D0 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE0 | OMAP_PIN_INPUT, 0)
> #define OMAP3_PIN_CAM_D0_CSI2_DX2 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE2 | \
> OMAP_PIN_INPUT, 0)
>
> And, I'm for adding OMAP_MUX_GPIO_{OUT,IN,IN_PU,IN_PD}(x) as well.
And we could have also:
int __init omap_mux_init_by_gpio(int gpio, int flags);
...
omap_mux_init_by_gpio(99, OMAP_PIN_INPUT);
As the only thing we currently have for flags is the OMAP_MUX_DYNAMIC,
we could mask that too into flags and make it int instead of u16.
Regards,
Tony
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/5] New mux code for 34xx
2009-11-02 18:56 ` Tony Lindgren
@ 2009-11-03 6:42 ` Mike Rapoport
2009-11-03 16:46 ` Tony Lindgren
0 siblings, 1 reply; 23+ messages in thread
From: Mike Rapoport @ 2009-11-03 6:42 UTC (permalink / raw)
To: Tony Lindgren; +Cc: Mike Rapoport, linux-omap
On Mon, Nov 2, 2009 at 8:56 PM, Tony Lindgren <tony@atomide.com> wrote:
> * Mike Rapoport <mike@compulab.co.il> [091101 02:29]:
>> Hi Tony,
>>
>> Tony Lindgren wrote:
>> > Hi all,
>> >
>> > Here's an initial version of the new mux code to play with.
>> > Big thanks to Paul & Benoit for the 34xx mux data!
>>
>> I've tried your patches, they seem to work just fine on CM-T35.
>
> OK cool.
>
>> > To try out the new code, compile a kernel with CONFIG_OMAP_MUX
>> > and CONFIG_DEBUG_FS and these patches. The series is also
>> > availabe in the l-o git in mux branch.
>>
>> [ snip ]
>>
>> >
>> > Comments welcome as always.
>>
>> There are some comments on patches 2 (Add new style pin multiplexing code for
>> omap3) and 3 (Add new style pin multiplexing data for 34xx). No nitpicking for
>> now, but checkpatch.pl is unhappy with the patchset :)
>
> OK, will run checkpatch.pl --strict on them. Thanks for the
> comments!
While on it, can you please update board-cm-t35.c to use CUS package?
> Regards,
>
> Tony
>
--
Sincerely Yours,
Mike.
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 2/5] omap: mux: Add new style pin multiplexing code for omap3
2009-11-02 18:54 ` Tony Lindgren
@ 2009-11-03 6:56 ` Mike Rapoport
0 siblings, 0 replies; 23+ messages in thread
From: Mike Rapoport @ 2009-11-03 6:56 UTC (permalink / raw)
To: Tony Lindgren; +Cc: Mike Rapoport, linux-omap
On Mon, Nov 2, 2009 at 8:54 PM, Tony Lindgren <tony@atomide.com> wrote:
> * Mike Rapoport <mike@compulab.co.il> [091101 02:29]:
>>
>>
>> Tony Lindgren wrote:
>> > Initially only for 34xx. Keep the old code working
>> > until the data has been converted to the new style
>> > format.
>> >
>> > REVISIT: Add support for cmdline parsing
>> > REVISIT: Add a function to get mux register by GPIO pin
>> > REVISIT: Add a function to set an array of mux entries
>> >
>> > Signed-off-by: Tony Lindgren <tony@atomide.com>
>> > ---
>> > arch/arm/mach-omap2/mux.c | 237 +++++++++++++++++++++++++++++++++++++++++++++
>> > arch/arm/mach-omap2/mux.h | 125 ++++++++++++++++++++++++
>> > 2 files changed, 362 insertions(+), 0 deletions(-)
>> > create mode 100644 arch/arm/mach-omap2/mux.h
>> >
>> > diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
>> > index 9841423..45e6d4d 100644
>> > --- a/arch/arm/mach-omap2/mux.c
>> > +++ b/arch/arm/mach-omap2/mux.c
>> > @@ -27,12 +27,15 @@
>> > #include <linux/init.h>
>> > #include <linux/io.h>
>> > #include <linux/spinlock.h>
>> > +#include <linux/list.h>
>> >
>> > #include <asm/system.h>
>> >
>> > #include <plat/control.h>
>> > #include <plat/mux.h>
>> >
>> > +#include "mux.h"
>>
>> Wouldn't <mach/mux.h> be better?
>
> Well I've been thinking that we should limit pin muxing to the board-*.c
> and platform_data init files under mach-omap2. Keeping the mux.h header
> file under mach-omap2/mux.h would certainly flag any attempts to use it
> under drivers/* for example.
>
> The reasons being that if we limit muxing to the files under mach-omap2,
> we can safely assume that the mux data and code is mostly __initdata
> and __init.
>
> And then we can safely do things like multiplex the pins with the real
> signal names without having to keep all the mux data wasting memory
> later on.
>
> Comments? I'm OK doing keeping it under mach/mux.h, but I'd like to
> establish a policy of doing the muxing only in platform init code
> under mach-omap2.
I have no strong prefernce for <mach/mux.h>. Keeping it under
mach-omap2 will make the policy definition easier. I'm ok with
"arch/arm/mach-omap2/mux.h".
>>
>> > #ifdef CONFIG_OMAP_MUX
>> >
>> > #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
>> > @@ -626,6 +629,11 @@ static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
>> > #endif
>> >
>> > #ifdef CONFIG_ARCH_OMAP34XX
>> > +
>> > +/*
>> > + * NOTE: This function will disappear soon, please use the new
>> > + * omap_mux_set() instead
>> > + */
>>
>> I think it's worth adding more visible notice, e.g. marking the function
>> deprecated or adding a WARN statement to its body.
>
> Agreed. I was thinking about writing a little script to convert the
> old mux entries to the new ones, and drop all the old code and data
> for omap3 hopefully this week..
>
>> > static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
>> > {
>> > static DEFINE_SPINLOCK(mux_spin_lock);
>> > @@ -644,6 +652,235 @@ static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
>> > #define omap34xx_cfg_reg NULL
>> > #endif
>> >
>> > +/*----------------------------------------------------------------------------*/
>> > +
>> > +#ifdef CONFIG_ARCH_OMAP34XX
>> > +
>> > +static LIST_HEAD(muxmodes);
>> > +static DEFINE_MUTEX(muxmode_mutex);
>> > +
>> > +/*
>> > + * REVISIT: See if pin is set dynamic, and add it to the list
>> > + */
>> > +int omap_mux_set(u16 val, u16 mux_offset, int flags)
>> > +{
>> > + omap_mux_write(val, mux_offset);
>> > +
>> > + return 0;
>> > +}
>> > +
>> > +struct omap_mux_entry {
>> > + struct omap_mux mux;
>> > + struct list_head node;
>> > +};
>> > +
>> > +static struct omap_mux *omap_mux_list_add(struct omap_mux *src)
>> > +{
>> > + struct omap_mux_entry *entry;
>> > + struct omap_mux *m;
>> > +
>> > + int i;
>> > +
>> > + entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL);
>> > + if (!entry)
>> > + return NULL;
>> > +
>> > + m = &entry->mux;
>> > + memcpy(m, src, sizeof(struct omap_mux_entry));
>> > +
>> > +#ifdef CONFIG_DEBUG_FS
>> > + for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
>> > + if (src->muxnames[i]) {
>> > + m->muxnames[i] =
>> > + kzalloc(strlen(src->muxnames[i]) + 1,
>> > + GFP_KERNEL);
>> > + if (!m->muxnames[i])
>> > + goto free_names;
>> > + strcpy(m->muxnames[i], src->muxnames[i]);
>> > + }
>> > + }
>> > + for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
>> > + if (src->balls[i]) {
>> > + m->balls[i] =
>> > + kzalloc(strlen(src->balls[i]) + 1,
>> > + GFP_KERNEL);
>> > + if (!m->balls[i])
>> > + goto free_balls;
>> > + strcpy(m->balls[i], src->balls[i]);
>> > + }
>> > + }
>> > +#endif
>> > +
>> > + mutex_lock(&muxmode_mutex);
>> > + list_add(&entry->node, &muxmodes);
>> > + mutex_unlock(&muxmode_mutex);
>> > +
>> > + return m;
>> > +
>> > +#ifdef CONFIG_DEBUG_FS
>> > +free_balls:
>> > + for (i = 0; i < OMAP_MUX_NR_SIDES; i++)
>> > + if (m->balls[i])
>> > + kfree(m->balls[i]);
>> > +free_names:
>> > + for (i = 0; i < OMAP_MUX_NR_MODES; i++)
>> > + if (m->muxnames[i])
>> > + kfree(m->muxnames[i]);
>> > +#endif
>> > +
>> > + kfree(entry);
>> > +
>> > + return NULL;
>> > +}
>> > +
>> > +static void __init omap_mux_apply_subset(struct omap_mux *p,
>> > + struct omap_mux *superset)
>> > +{
>>
>> I'm not sure it is required.
>>
>> Is it for sure that CBC package will remain superset of all possible mux modes
>> for all OMAP3 variants through entire OMAP3 lifespan? What about OMAP3630 and
>> OMAP3517? Are their packages also subset of the CBC one?
>
> Basically the mux registers are the same for all omap3, then the
> packaging determines which signal options are available for the
> package.
>
> Looks like 3630 changes the mux name for few entries, and adds some
> new registers, so that should be easily covered too.
>
> The superset may not always be named CBC, but we should have one
> omap3 superset still.
Agreed.
>> I'd rather keep the entire tables for different packages/CPU variants. They are
>> anyway __initdata, so they would be discarded later during boot. And, keeping
>> the full tables rather than differences makes omap_mux_apply_subset and
>> unnecessary and omap_mux_apply_pins much simpler.
>
> I agree it would make it a bit simpler. But then we need to patch
> multiple data tables if we found errors in the data.
>
> And the signal data is mostly the same for all omap3.
>
>> If we keep the full tables instead of diffs we could do something like:
>>
>> static struct omap_mux *muxmodes;
>> static void __init omap_mux_apply_subset(struct omap_mux *p)
>> {
>> muxmodes = p;
>> }
>
> Right, that's the way I had it originally, but the amount of data
> duplicated three times so far looked ugly to me :)
>
>> > + while (p->reg_offset != OMAP_MUX_TERMINATOR) {
>> > + struct omap_mux *s = superset;
>> > + int found = 0;
>> > +
>> > + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
>> > + if (s->reg_offset == p->reg_offset) {
>> > + *s = *p;
>> > + found++;
>> > + break;
>> > + }
>> > + s++;
>> > + }
>> > + if (!found)
>> > + printk(KERN_ERR "mux: Unknown entry offset 0x%x\n",
>> > + p->reg_offset);
>> > + p++;
>> > + }
>> > +}
>> > +
>> > +#ifdef CONFIG_DEBUG_FS
>> > +
>> > +static void __init omap_mux_apply_pins(struct omap_ball *b,
>> > + struct omap_mux *superset)
>> > +{
>> > + while (b->reg_offset != OMAP_MUX_TERMINATOR) {
>> > + struct omap_mux *s = superset;
>> > + int found = 0;
>> > +
>> > + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
>> > + if (s->reg_offset == b->reg_offset) {
>> > + s->balls[0] = b->balls[0];
>> > + s->balls[1] = b->balls[1];
>> > + found++;
>> > + break;
>> > + }
>>
>> Again, if we keep the full tables instead of diffs we don't need the nested
>> loop. Provided that balls table has pins in the same order as the mux table we
>> could have only the assignments here.
>
> The difference with the balls compared to signals is that they are different
> for each package. (Just to recap, the naming is a matrix of the pins
> where the coordinates are alphabets in one direction, and number
> in the other direction).
>
> So the pin data is really separate data from the mux register and
> signal data.
>
> Mux registers and signal names are mostly the same for each omap3,
> while the ball names are renamed for each package option.
>
>> > + s++;
>> > + }
>> > + if (!found)
>> > + printk(KERN_ERR "mux: Unknown ball offset 0x%x\n",
>> > + b->reg_offset);
>> > + b++;
>> > + }
>> > +}
>> > +
>> > +#else /* CONFIG_DEBUG_FS */
>> > +
>> > +static inline void omap_mux_apply_pins(struct omap_ball *b,
>> > + struct omap_mux *superset)
>> > +{
>> > +}
>> > +
>> > +#endif /* CONFIG_DEBUG_FS */
>> > +
>> > +static void __init omap_mux_set_board(struct omap_board_mux *board)
>> > +{
>> > + while (board->reg_offset != OMAP_MUX_TERMINATOR) {
>> > + omap_mux_write(board->value, board->reg_offset);
>> > + board++;
>> > + }
>> > +}
>> > +
>> > +static void __init omap_mux_init_dynamic(struct omap_board_mux *board_subset,
>> > + struct omap_mux *superset,
>> > + int flags)
>> > +{
>> > + struct omap_mux *s = superset;
>> > + int always_dynamic = flags & OMAP_MUX_ALL_DYNAMIC;
>> > +
>> > + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
>> > + struct omap_mux *entry;
>> > +
>> > + if (!always_dynamic) {
>> > + u16 mode;
>> > +
>> > + /* GPIO pins must be always dynamic for PM */
>> > + mode = omap_mux_read(s->reg_offset) & 0x7;
>> > + if (mode != OMAP_MUX_MODE4)
>> > + continue;
>> > + }
>> > +
>> > + entry = omap_mux_list_add(s);
>> > + if (!entry) {
>> > + printk(KERN_ERR "mux: Could not add entry\n");
>> > + return;
>> > + }
>> > + s++;
>> > + }
>> > +
>> > + if (always_dynamic)
>> > + return;
>> > +
>> > + /* Search for pins set as dynamic in the board-*.c file */
>> > + while (board_subset->reg_offset != OMAP_MUX_TERMINATOR) {
>> > +
>> > + /* GPIO pins are always dynamic, and already handled */
>> > + if ((board_subset->value & 0x7) == OMAP_MUX_MODE4)
>> > + continue;
>> > +
>> > + if (!(board_subset->flags & OMAP_MUX_DYNAMIC))
>> > + continue;
>> > +
>> > + s = superset;
>> > + while (s->reg_offset != OMAP_MUX_TERMINATOR) {
>> > + if (s->reg_offset == board_subset->reg_offset) {
>> > + struct omap_mux *entry = omap_mux_list_add(s);
>> > + if (!entry) {
>> > + printk(KERN_ERR "mux: Could not add "
>> > + "board entry\n");
>> > + return;
>> > + }
>> > + }
>> > + s++;
>> > + }
>> > + board_subset++;
>> > + }
>> > +}
>> > +
>> > +/*
>> > + * Do not call this from board-*.c files, use omap3_mux_init() instead
>> > + */
>> > +int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
>> > + struct omap_mux *superset,
>> > + struct omap_mux *package_subset,
>> > + struct omap_board_mux *board_subset,
>> > + struct omap_ball *package_balls,
>> > + int flags)
>> > +{
>> > + /*
>> > + * REVISIT: Do the ioremap with mux_pbase here once after the old
>> > + * code is gone
>> > + * REVISIT: Do not initialize again if already called
>> > + */
>> > +
>> > + omap_mux_apply_subset(package_subset, superset);
>> > + omap_mux_apply_pins(package_balls, superset);
>> > + omap_mux_set_board(board_subset);
>> > + omap_mux_init_dynamic(board_subset, superset, flags);
>>
>> With full tables for each package we won't need superset here.
>
> Right, but the maintenance will be more of a pain because of
> the duplicate data. And we still need to copy the __initdata to
> the list for the configured entries.
>
>> > +
>> > + return 0;
>> > +}
>> > +
>> > +#endif
>> > +
>> > +/*----------------------------------------------------------------------------*/
>> > +
>> > int __init omap2_mux_init(void)
>> > {
>> > u32 mux_pbase;
>> > diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
>> > new file mode 100644
>> > index 0000000..a8453f5
>> > --- /dev/null
>> > +++ b/arch/arm/mach-omap2/mux.h
>>
>> Wouldn't arch/arm/mach-omap2/include/mach/mux.h be better?
>
> Unless we want to limit the usage of the code to board-*.c files,
> and not allow using it elsewhere. But I'm OK either way.
I think restricting mux usage to files under mach-omap2 is the right
thing to do, so let's keep it "arch/arm/mach-omap2/mux.h"
>> > @@ -0,0 +1,125 @@
>> > +/*
>> > + * Copyright (C) 2009 Nokia
>> > + * Copyright (C) 2009 Texas Instruments
>> > + *
>> > + * This program is free software; you can redistribute it and/or modify
>> > + * it under the terms of the GNU General Public License version 2 as
>> > + * published by the Free Software Foundation.
>> > + */
>> > +
>> > +#define OMAP_MUX_TERMINATOR 0xffff
>> > +
>> > +/* 34xx mux mode options for each pin. See TRM for options */
>> > +#define OMAP_MUX_MODE0 0
>> > +#define OMAP_MUX_MODE1 1
>> > +#define OMAP_MUX_MODE2 2
>> > +#define OMAP_MUX_MODE3 3
>> > +#define OMAP_MUX_MODE4 4
>> > +#define OMAP_MUX_MODE5 5
>> > +#define OMAP_MUX_MODE6 6
>> > +#define OMAP_MUX_MODE7 7
>> > +
>> > +/* 24xx/34xx mux bit defines */
>> > +#define OMAP_PULL_ENA (1 << 3)
>> > +#define OMAP_PULL_UP (1 << 4)
>> > +#define OMAP_ALTELECTRICALSEL (1 << 5)
>> > +
>> > +/* 34xx specific mux bit defines */
>> > +#define OMAP_INPUT_EN (1 << 8)
>> > +#define OMAP_OFF_EN (1 << 9)
>> > +#define OMAP_OFFOUT_EN (1 << 10)
>> > +#define OMAP_OFFOUT_VAL (1 << 11)
>> > +#define OMAP_OFF_PULL_EN (1 << 12)
>> > +#define OMAP_OFF_PULL_UP (1 << 13)
>> > +#define OMAP_WAKEUP_EN (1 << 14)
>> > +
>> > +/* Active pin states */
>> > +#define OMAP_PIN_OUTPUT 0
>> > +#define OMAP_PIN_INPUT OMAP_INPUT_EN
>> > +#define OMAP_PIN_INPUT_PULLUP (OMAP_PULL_ENA | OMAP_INPUT_EN \
>> > + | OMAP_PULL_UP)
>> > +#define OMAP_PIN_INPUT_PULLDOWN (OMAP_PULL_ENA | OMAP_INPUT_EN)
>> > +
>> > +/* Off mode states */
>> > +#define OMAP_PIN_OFF_NONE 0
>> > +#define OMAP_PIN_OFF_OUTPUT_HIGH (OMAP_OFF_EN | OMAP_OFFOUT_EN \
>> > + | OMAP_OFFOUT_VAL)
>> > +#define OMAP_PIN_OFF_OUTPUT_LOW (OMAP_OFF_EN | OMAP_OFFOUT_EN)
>> > +#define OMAP_PIN_OFF_INPUT_PULLUP (OMAP_OFF_EN | OMAP_OFF_PULL_EN \
>> > + | OMAP_OFF_PULL_UP)
>> > +#define OMAP_PIN_OFF_INPUT_PULLDOWN (OMAP_OFF_EN | OMAP_OFF_PULL_EN)
>> > +#define OMAP_PIN_OFF_WAKEUPENABLE OMAP_WAKEUP_EN
>> > +
>> > +/* Flags for struct omap_board_mux */
>> > +#define OMAP_MUX_DYNAMIC (1 << 0) /* Keep mux in memory */
>> > +
>> > +/* Flags for omap_mux_init */
>> > +#define OMAP_MUX_ALL_DYNAMIC (1 << 16) /* Always in memory */
>> > +#define OMAP_PACKAGE_MASK 0xffff
>> > +#define OMAP_PACKAGE_CUS 3 /* 423-pin 0.65 */
>> > +#define OMAP_PACKAGE_CBB 2 /* 515-pin 0.40 0.50 */
>> > +#define OMAP_PACKAGE_CBC 1 /* 515-pin 0.50 0.65 */
>> > +
>> > +
>> > +#define OMAP_MUX_NR_MODES 8 /* Available modes */
>> > +#define OMAP_MUX_NR_SIDES 2 /* Bottom & top */
>> > +
>> > +/**
>> > + * struct omap_mux - data for omap mux register offset and it's value
>> > + * @reg_offset: mux register offset from the mux base
>> > + * @gpio: GPIO number
>> > + * @muxnames: available signal modes for a ball
>> > + */
>> > +struct omap_mux {
>> > + u16 reg_offset;
>> > + u16 gpio;
>> > +#ifdef CONFIG_DEBUG_FS
>> > + char *muxnames[OMAP_MUX_NR_MODES];
>> > + char *balls[OMAP_MUX_NR_SIDES];
>> > +#endif
>> > +};
>> > +
>> > +/**
>> > + * struct omap_ball - data for balls on omap package
>> > + * @reg_offset: mux register offset from the mux base
>> > + * @balls: available balls on the package
>> > + */
>> > +struct omap_ball {
>> > + u16 reg_offset;
>> > + char *balls[OMAP_MUX_NR_SIDES];
>> > +};
>> > +
>> > +/**
>> > + * struct omap_board_mux - data for initializing mux registers
>> > + * @reg_offset: mux register offset from the mux base
>> > + * @mux_value: desired mux value to set
>> > + * @flags: extra flags
>> > + */
>> > +struct omap_board_mux {
>> > + u16 reg_offset;
>> > + u16 value;
>> > + u32 flags;
>> > +};
>> > +
>> > +#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_ARCH_OMAP34XX)
>> > +
>> > +int omap3_mux_init(struct omap_board_mux *board_mux_config, int flags);
>> > +int omap_mux_init(u32 mux_pbase, u32 mux_size,
>> > + struct omap_mux *superset,
>> > + struct omap_mux *package_subset,
>> > + struct omap_board_mux *board_subset,
>> > + struct omap_ball *package_balls,
>> > + int flags);
>> > +int omap_mux_set(u16 val, u16 mux_offset, int flags);
>> > +
>> > +#else
>> > +
>> > +static inline int omap3_mux_init(struct omap_board_mux *board_mux_config,
>> > + int flags)
>> > +{
>> > +}
>> > +static inline int omap_mux_set(u16 val, u16 mux_offset, int flags)
>> > +{
>> > +}
>> > +
>> > +#endif
>> >
>> > --
>> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> > the body of a message to majordomo@vger.kernel.org
>> > More majordomo info at http://vger.kernel.org/majordomo-info.html
>> >
>>
>> --
>> Sincerely yours,
>> Mike.
>>
>>
>>
>
--
Sincerely Yours,
Mike.
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx
2009-11-02 19:10 ` Tony Lindgren
@ 2009-11-03 7:10 ` Mike Rapoport
2009-11-03 16:43 ` Tony Lindgren
0 siblings, 1 reply; 23+ messages in thread
From: Mike Rapoport @ 2009-11-03 7:10 UTC (permalink / raw)
To: Tony Lindgren; +Cc: Mike Rapoport, linux-omap
On Mon, Nov 2, 2009 at 9:10 PM, Tony Lindgren <tony@atomide.com> wrote:
> * Mike Rapoport <mike@compulab.co.il> [091101 02:30]:
>>
>>
>> Tony Lindgren wrote:
>> > Add new style mux data for 34xx. This should also
>> > work with 3630 easily by adding the processor subset
>> > and ball data.
>> >
>> > Note that this data is __initdata, and gets optimized
>> > out if CONFIG_OMAP_MUX is not set. Also, the debug data
>> > gets optimized out if CONFIG_DEBUG_FS is not set.
>> >
>> > Signed-off-by: Tony Lindgren <tony@atomide.com>
>> > ---
>> > arch/arm/mach-omap2/Makefile | 4
>> > arch/arm/mach-omap2/mux.h | 2
>> > arch/arm/mach-omap2/mux34xx.c | 1552 +++++++++++++++++++++++++++++++++++++++++
>> > arch/arm/mach-omap2/mux34xx.h | 352 +++++++++
>> > 4 files changed, 1910 insertions(+), 0 deletions(-)
>> > create mode 100644 arch/arm/mach-omap2/mux34xx.c
>> > create mode 100644 arch/arm/mach-omap2/mux34xx.h
>> >
[ snip ]
>> > +
>> > +#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
>> > + (OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
>>
>> What about adding defines for each possible mode configuration, except, perhaps,
>> GPIO?
>
> Yeah it would be nice to make it easy. How about someting like:
>
> int __init omap_mux_init_by_name(char *name, int flags);
> ...
>
> omap_mux_init_by_name("i2c1_scl", OMAP_PIN_INPUT_PULLUP);
>
>> #define OMAP3_PIN_CAM_D0 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE0 | OMAP_PIN_INPUT, 0)
>> #define OMAP3_PIN_CAM_D0_CSI2_DX2 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE2 | \
>> OMAP_PIN_INPUT, 0)
>>
>> And, I'm for adding OMAP_MUX_GPIO_{OUT,IN,IN_PU,IN_PD}(x) as well.
>
> And we could have also:
>
> int __init omap_mux_init_by_gpio(int gpio, int flags);
> ...
>
> omap_mux_init_by_gpio(99, OMAP_PIN_INPUT);
>
> As the only thing we currently have for flags is the OMAP_MUX_DYNAMIC,
> we could mask that too into flags and make it int instead of u16.
It seems we are thinking in really different directions :) You propose
imporved and easy to use replacements of omap_cfg_reg while I'm aming
nice tables descibing board pin configuration like, e.g,
cm_x300_mfp_cfg in arch/arm/mach-pxa/cm-x300.c. Probably it's just too
hard to me to break my PXA habbits, but I think such tables make the
board code easier to write/maintain/understand.
Besides, having both simple aliases for OMAP3_MUX(mode0, mux_value,
mux_flags) for dedicated pins does not contadict having
omap_mux_init_by_{name,gpio} helpers.
> Regards,
>
> Tony
>
--
Sincerely Yours,
Mike.
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx
2009-11-03 7:10 ` Mike Rapoport
@ 2009-11-03 16:43 ` Tony Lindgren
2009-11-03 22:55 ` [PATCH] omap: mux: Replace omap_cfg_reg() with new style signal or gpio functions (Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx) Tony Lindgren
2009-11-04 7:14 ` [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx Mike Rapoport
0 siblings, 2 replies; 23+ messages in thread
From: Tony Lindgren @ 2009-11-03 16:43 UTC (permalink / raw)
To: Mike Rapoport; +Cc: Mike Rapoport, linux-omap
* Mike Rapoport <mike.rapoport@gmail.com> [091102 23:10]:
> On Mon, Nov 2, 2009 at 9:10 PM, Tony Lindgren <tony@atomide.com> wrote:
> > * Mike Rapoport <mike@compulab.co.il> [091101 02:30]:
> >>
> >>
> >> Tony Lindgren wrote:
> >> > Add new style mux data for 34xx. This should also
> >> > work with 3630 easily by adding the processor subset
> >> > and ball data.
> >> >
> >> > Note that this data is __initdata, and gets optimized
> >> > out if CONFIG_OMAP_MUX is not set. Also, the debug data
> >> > gets optimized out if CONFIG_DEBUG_FS is not set.
> >> >
> >> > Signed-off-by: Tony Lindgren <tony@atomide.com>
> >> > ---
> >> > arch/arm/mach-omap2/Makefile | 4
> >> > arch/arm/mach-omap2/mux.h | 2
> >> > arch/arm/mach-omap2/mux34xx.c | 1552 +++++++++++++++++++++++++++++++++++++++++
> >> > arch/arm/mach-omap2/mux34xx.h | 352 +++++++++
> >> > 4 files changed, 1910 insertions(+), 0 deletions(-)
> >> > create mode 100644 arch/arm/mach-omap2/mux34xx.c
> >> > create mode 100644 arch/arm/mach-omap2/mux34xx.h
> >> >
>
> [ snip ]
>
> >> > +
> >> > +#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
> >> > + (OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
> >>
> >> What about adding defines for each possible mode configuration, except, perhaps,
> >> GPIO?
> >
> > Yeah it would be nice to make it easy. How about someting like:
> >
> > int __init omap_mux_init_by_name(char *name, int flags);
> > ...
> >
> > omap_mux_init_by_name("i2c1_scl", OMAP_PIN_INPUT_PULLUP);
> >
> >> #define OMAP3_PIN_CAM_D0 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE0 | OMAP_PIN_INPUT, 0)
> >> #define OMAP3_PIN_CAM_D0_CSI2_DX2 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE2 | \
> >> OMAP_PIN_INPUT, 0)
> >>
> >> And, I'm for adding OMAP_MUX_GPIO_{OUT,IN,IN_PU,IN_PD}(x) as well.
> >
> > And we could have also:
> >
> > int __init omap_mux_init_by_gpio(int gpio, int flags);
> > ...
> >
> > omap_mux_init_by_gpio(99, OMAP_PIN_INPUT);
> >
> > As the only thing we currently have for flags is the OMAP_MUX_DYNAMIC,
> > we could mask that too into flags and make it int instead of u16.
>
> It seems we are thinking in really different directions :) You propose
> imporved and easy to use replacements of omap_cfg_reg while I'm aming
> nice tables descibing board pin configuration like, e.g,
> cm_x300_mfp_cfg in arch/arm/mach-pxa/cm-x300.c. Probably it's just too
> hard to me to break my PXA habbits, but I think such tables make the
> board code easier to write/maintain/understand.
> Besides, having both simple aliases for OMAP3_MUX(mode0, mux_value,
> mux_flags) for dedicated pins does not contadict having
> omap_mux_init_by_{name,gpio} helpers.
Agreed, we should make the pin muxing as easy as possible as it's
probably the biggest hurdle to anybody to start making changes to a
development board. And we should have easy to to read board specific
pin configuration tables like you're suggesting.
In the long run, we should probably start using the real signal names
as they seem to be more future proof across omaps than the register
names.
We can easily do something like this if we add char *muxname to
struct omap_board_mux (untested):
#define OMAP_MUX_SIGNAL(signal, mux_flags) \
{ \
.muxname = #signal, \
.flags = (mux_flags), \
}
#define OMAP_MUX_GPIO(gpio, mux_flags) \
{ \
.muxname = gpio_##signal, \
.flags = (mux_flags), \
}
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
OMAP_MUX_SIGNAL(i2c1_scl, OMAP_PIN_INPUT),
OMAP_MUX_GPIO(98, OMAP_PIN_INPUT_PULLUP),
OMAP_MUX_GPIO(99, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_DYNAMIC),
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#endif
Of course then we have to warn on potential duplicate signal names,
but those can be specified using the register offset + mode as
needed.
Is the above close enough to what you have in mind regarding the
board specific mux tables, or do you have still something else
in mind?
Regards,
Tony
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^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/5] New mux code for 34xx
2009-11-03 6:42 ` Mike Rapoport
@ 2009-11-03 16:46 ` Tony Lindgren
0 siblings, 0 replies; 23+ messages in thread
From: Tony Lindgren @ 2009-11-03 16:46 UTC (permalink / raw)
To: Mike Rapoport; +Cc: Mike Rapoport, linux-omap
* Mike Rapoport <mike.rapoport@gmail.com> [091102 22:42]:
> On Mon, Nov 2, 2009 at 8:56 PM, Tony Lindgren <tony@atomide.com> wrote:
> > * Mike Rapoport <mike@compulab.co.il> [091101 02:29]:
> >> Hi Tony,
> >>
> >> Tony Lindgren wrote:
> >> > Hi all,
> >> >
> >> > Here's an initial version of the new mux code to play with.
> >> > Big thanks to Paul & Benoit for the 34xx mux data!
> >>
> >> I've tried your patches, they seem to work just fine on CM-T35.
> >
> > OK cool.
> >
> >> > To try out the new code, compile a kernel with CONFIG_OMAP_MUX
> >> > and CONFIG_DEBUG_FS and these patches. The series is also
> >> > availabe in the l-o git in mux branch.
> >>
> >> [ snip ]
> >>
> >> >
> >> > Comments welcome as always.
> >>
> >> There are some comments on patches 2 (Add new style pin multiplexing code for
> >> omap3) and 3 (Add new style pin multiplexing data for 34xx). No nitpicking for
> >> now, but checkpatch.pl is unhappy with the patchset :)
> >
> > OK, will run checkpatch.pl --strict on them. Thanks for the
> > comments!
>
> While on it, can you please update board-cm-t35.c to use CUS package?
OK, will do.
FYI, currently working on converting the old style omap_cfg_reg()
calls so we can remove the old code for 34xx. It will be probably
few days before I get around posting updated patches because of
some meetings over next few days.
Regards,
Tony
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH] omap: mux: Replace omap_cfg_reg() with new style signal or gpio functions (Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx)
2009-11-03 16:43 ` Tony Lindgren
@ 2009-11-03 22:55 ` Tony Lindgren
2009-11-04 7:14 ` [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx Mike Rapoport
1 sibling, 0 replies; 23+ messages in thread
From: Tony Lindgren @ 2009-11-03 22:55 UTC (permalink / raw)
To: Mike Rapoport; +Cc: Mike Rapoport, linux-omap
[-- Attachment #1: Type: text/plain, Size: 2108 bytes --]
* Tony Lindgren <tony@atomide.com> [091103 08:44]:
> * Mike Rapoport <mike.rapoport@gmail.com> [091102 23:10]:
> > On Mon, Nov 2, 2009 at 9:10 PM, Tony Lindgren <tony@atomide.com> wrote:
> > > * Mike Rapoport <mike@compulab.co.il> [091101 02:30]:
> > >>
> > >>
> > >> Tony Lindgren wrote:
> > >> > Add new style mux data for 34xx. This should also
> > >> > work with 3630 easily by adding the processor subset
> > >> > and ball data.
> > >> >
> > >> > Note that this data is __initdata, and gets optimized
> > >> > out if CONFIG_OMAP_MUX is not set. Also, the debug data
> > >> > gets optimized out if CONFIG_DEBUG_FS is not set.
> > >> >
> > >> > Signed-off-by: Tony Lindgren <tony@atomide.com>
> > >> > ---
> > >> > arch/arm/mach-omap2/Makefile | 4
> > >> > arch/arm/mach-omap2/mux.h | 2
> > >> > arch/arm/mach-omap2/mux34xx.c | 1552 +++++++++++++++++++++++++++++++++++++++++
> > >> > arch/arm/mach-omap2/mux34xx.h | 352 +++++++++
> > >> > 4 files changed, 1910 insertions(+), 0 deletions(-)
> > >> > create mode 100644 arch/arm/mach-omap2/mux34xx.c
> > >> > create mode 100644 arch/arm/mach-omap2/mux34xx.h
> > >> >
> >
> > [ snip ]
> >
> > >> > +
> > >> > +#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
> > >> > + (OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
> > >>
> > >> What about adding defines for each possible mode configuration, except, perhaps,
> > >> GPIO?
> > >
> > > Yeah it would be nice to make it easy. How about someting like:
> > >
> > > int __init omap_mux_init_by_name(char *name, int flags);
> > > ...
> > >
> > > omap_mux_init_by_name("i2c1_scl", OMAP_PIN_INPUT_PULLUP);
Here's an experimental patch to replace the omap_cfg_reg() calls
for omap3. It at least seems to make the code more readable with
the gpio numbers and signal names :)
The arch/arm/plat-omap/i2c.c muxing needs to be implemented
under mach-omap2.
The functions are only stubs right now in the mux branch in the
linux-omap tree, so that's only compile tested right now..
Will repost the whole series once things are working properly
again.
Regards,
Tony
[-- Attachment #2: mux-replace.patch --]
[-- Type: text/x-diff, Size: 16541 bytes --]
>From 763a5474f2c304e1cc8f3f8ce805c1bb84bafece Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Tue, 3 Nov 2009 14:46:00 -0800
Subject: [PATCH] omap: mux: Replace omap_cfg_reg() with new style signal or gpio functions
Replace omap_cfg_reg() with new style signal or gpio functions
Signed-off-by: Tony Lindgren <tony@atomide.com>
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 94d850d..dc1bbc1 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -482,7 +482,7 @@ static inline void board_smc91x_init(void)
static void enable_board_wakeup_source(void)
{
- omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
+ omap_mux_init_signal("sys_nirq", OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); /* T2 interrupt line (keypad) */
}
static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 1143588..7acb3a2 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -469,7 +469,7 @@ static void __init cm_t35_init(void)
usb_musb_init();
- omap_cfg_reg(AF26_34XX_SYS_NIRQ);
+ omap_mux_init_signal("sys_nirq", OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CUS);
}
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 5bb096a..fb5f33a 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -141,10 +141,10 @@ static int beagle_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
if (system_rev >= 0x20 && system_rev <= 0x34301000) {
- omap_cfg_reg(AG9_34XX_GPIO23);
+ omap_mux_init_gpio(23, OMAP_PIN_INPUT);
mmc[0].gpio_wp = 23;
} else {
- omap_cfg_reg(AH8_34XX_GPIO29);
+ omap_mux_init_gpio(29, OMAP_PIN_INPUT);
}
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
mmc[0].gpio_cd = gpio + 0;
@@ -426,7 +426,7 @@ static void __init omap3_beagle_init(void)
ARRAY_SIZE(omap3_beagle_devices));
omap_serial_init();
- omap_cfg_reg(J25_34XX_GPIO170);
+ omap_mux_init_gpio(170, OMAP_PIN_INPUT);
gpio_request(170, "DVI_nPD");
/* REVISIT leave DVI powered down until it's needed ... */
gpio_direction_output(170, true);
@@ -436,8 +436,8 @@ static void __init omap3_beagle_init(void)
omap3beagle_flash_init();
/* Ensure SDRC pins are mux'd for self-refresh */
- omap_cfg_reg(H16_34XX_SDRC_CKE0);
- omap_cfg_reg(H17_34XX_SDRC_CKE1);
+ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
+ omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 77b1a20..7ca673a 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -171,7 +171,7 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
- omap_cfg_reg(L8_34XX_GPIO63);
+ omap_mux_init_gpio(63, OMAP_PIN_INPUT);
mmc[0].gpio_cd = gpio + 0;
twl4030_mmc_init(mmc);
@@ -378,7 +378,7 @@ static void __init omap3_evm_init(void)
#endif
usb_musb_init();
/* Setup EHCI phy reset padconfig */
- omap_cfg_reg(AF4_34XX_GPIO135_OUT);
+ omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
usb_ehci_init(&ehci_pdata);
ads7846_dev_init();
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index d1ea8d5..5cb81f0 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -420,8 +420,8 @@ static void __init omap3pandora_init(void)
usb_musb_init();
/* Ensure SDRC pins are mux'd for self-refresh */
- omap_cfg_reg(H16_34XX_SDRC_CKE0);
- omap_cfg_reg(H17_34XX_SDRC_CKE1);
+ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
+ omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 63e85c2..16f25a0 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -414,8 +414,8 @@ static void __init overo_init(void)
overo_init_smsc911x();
/* Ensure SDRC pins are mux'd for self-refresh */
- omap_cfg_reg(H16_34XX_SDRC_CKE0);
- omap_cfg_reg(H17_34XX_SDRC_CKE1);
+ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
+ omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
if ((gpio_request(OVERO_GPIO_W2W_NRESET,
"OVERO_GPIO_W2W_NRESET") == 0) &&
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index cf4583a..da42018 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -31,6 +31,7 @@
#include <plat/onenand.h>
#include <plat/gpmc-smc91x.h>
+#include "mux.h"
#include "mmc-twl4030.h"
#define SYSTEM_REV_B_USES_VAUX3 0x1699
@@ -521,9 +522,9 @@ static struct omap_smc91x_platform_data board_smc91x_data = {
static void __init board_smc91x_init(void)
{
- omap_cfg_reg(U8_34XX_GPIO54_DOWN);
- omap_cfg_reg(G25_34XX_GPIO86_OUT);
- omap_cfg_reg(H19_34XX_GPIO164_OUT);
+ omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
+ omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
gpmc_smc91x_init(&board_smc91x_data);
}
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 6bfe4db..03787ba 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -79,8 +79,8 @@ static void __init rx51_init(void)
rx51_peripherals_init();
/* Ensure SDRC pins are mux'd for self-refresh */
- omap_cfg_reg(H16_34XX_SDRC_CKE0);
- omap_cfg_reg(H17_34XX_SDRC_CKE1);
+ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
+ omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
omap3_mux_init(board_mux, OMAP_MUX_ALL_DYNAMIC | OMAP_PACKAGE_CBB);
}
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7d4513b..8a7882d 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -27,6 +27,8 @@
#include <mach/gpio.h>
#include <plat/mmc.h>
+#include "mux.h"
+
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
static struct resource cam_resources[] = {
@@ -577,27 +579,27 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
if (cpu_is_omap3430()) {
if (controller_nr == 0) {
- omap_cfg_reg(N28_3430_MMC1_CLK);
- omap_cfg_reg(M27_3430_MMC1_CMD);
- omap_cfg_reg(N27_3430_MMC1_DAT0);
+ omap_mux_init_signal("mmc1_clk", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc1_cmd", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc1_dat0", OMAP_PIN_INPUT_PULLUP);
if (mmc_controller->slots[0].wires == 4 ||
mmc_controller->slots[0].wires == 8) {
- omap_cfg_reg(N26_3430_MMC1_DAT1);
- omap_cfg_reg(N25_3430_MMC1_DAT2);
- omap_cfg_reg(P28_3430_MMC1_DAT3);
+ omap_mux_init_signal("mmc1_dat1", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc1_dat2", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc1_dat3", OMAP_PIN_INPUT_PULLUP);
}
if (mmc_controller->slots[0].wires == 8) {
- omap_cfg_reg(P27_3430_MMC1_DAT4);
- omap_cfg_reg(P26_3430_MMC1_DAT5);
- omap_cfg_reg(R27_3430_MMC1_DAT6);
- omap_cfg_reg(R25_3430_MMC1_DAT7);
+ omap_mux_init_signal("mmc1_dat4", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc1_dat5", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc1_dat6", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc1_dat7", OMAP_PIN_INPUT_PULLUP);
}
}
if (controller_nr == 1) {
/* MMC2 */
- omap_cfg_reg(AE2_3430_MMC2_CLK);
- omap_cfg_reg(AG5_3430_MMC2_CMD);
- omap_cfg_reg(AH5_3430_MMC2_DAT0);
+ omap_mux_init_signal("mmc2_clk", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc2_cmd", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc2_dat0", OMAP_PIN_INPUT_PULLUP);
/*
* For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
@@ -605,9 +607,9 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
*/
if (mmc_controller->slots[0].wires == 4 ||
mmc_controller->slots[0].wires == 8) {
- omap_cfg_reg(AH4_3430_MMC2_DAT1);
- omap_cfg_reg(AG4_3430_MMC2_DAT2);
- omap_cfg_reg(AF4_3430_MMC2_DAT3);
+ omap_mux_init_signal("mmc2_dat1", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc2_dat2", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("mmc2_dat3", OMAP_PIN_INPUT_PULLUP);
}
}
diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
index e448abd..d0f11fb 100644
--- a/arch/arm/mach-omap2/usb-ehci.c
+++ b/arch/arm/mach-omap2/usb-ehci.c
@@ -27,6 +27,8 @@
#include <mach/irqs.h>
#include <plat/usb.h>
+#include "mux.h"
+
#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
static struct resource ehci_resources[] = {
@@ -72,32 +74,32 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
{
switch (port_mode[0]) {
case EHCI_HCD_OMAP_MODE_PHY:
- omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
- omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
- omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
- omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT);
- omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0);
- omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1);
- omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2);
- omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3);
- omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4);
- omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
- omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
- omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
+ omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT);
+ omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT);
+ omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN);
break;
case EHCI_HCD_OMAP_MODE_TLL:
- omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
- omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
- omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
- omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT);
- omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0);
- omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1);
- omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2);
- omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3);
- omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4);
- omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
- omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
- omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
+ omap_mux_init_signal("hsusb1_tll_stp", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("hsusb1_tll_clk", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_dir", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_nxt", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_data0", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_data1", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_data2", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_data3", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_data4", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_data5", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_data6", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb1_tll_data7", OMAP_PIN_INPUT_PULLDOWN);
break;
case EHCI_HCD_OMAP_MODE_UNKNOWN:
/* FALLTHROUGH */
@@ -107,32 +109,32 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
switch (port_mode[1]) {
case EHCI_HCD_OMAP_MODE_PHY:
- omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
- omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
- omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
- omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
- omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
- omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
- omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
- omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
- omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
- omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
- omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
- omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
+ omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT);
+ omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT);
+ omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_nxt", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_data0", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_data1", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_data2", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_data3", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_data4", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_data5", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_data6", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_data7", OMAP_PIN_INPUT_PULLDOWN);
break;
case EHCI_HCD_OMAP_MODE_TLL:
- omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
- omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
- omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
- omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT);
- omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0);
- omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1);
- omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2);
- omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3);
- omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4);
- omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
- omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
- omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
+ omap_mux_init_signal("hsusb2_tll_stp", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("hsusb2_tll_clk", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_dir", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_nxt", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_data0", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_data1", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_data2", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_data3", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_data4", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_data5", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_data6", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb2_tll_data7", OMAP_PIN_INPUT_PULLDOWN);
break;
case EHCI_HCD_OMAP_MODE_UNKNOWN:
/* FALLTHROUGH */
@@ -145,18 +147,18 @@ static void setup_ehci_io_mux(enum ehci_hcd_omap_mode *port_mode)
printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
break;
case EHCI_HCD_OMAP_MODE_TLL:
- omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
- omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
- omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
- omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT);
- omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0);
- omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1);
- omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2);
- omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3);
- omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4);
- omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
- omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
- omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
+ omap_mux_init_signal("hsusb3_tll_stp", OMAP_PIN_INPUT_PULLUP);
+ omap_mux_init_signal("hsusb3_tll_clk", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_dir", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_nxt", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_data0", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_data1", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_data2", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_data3", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_data4", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_data5", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_data6", OMAP_PIN_INPUT_PULLDOWN);
+ omap_mux_init_signal("hsusb3_tll_data7", OMAP_PIN_INPUT_PULLDOWN);
break;
case EHCI_HCD_OMAP_MODE_UNKNOWN:
/* FALLTHROUGH */
^ permalink raw reply related [flat|nested] 23+ messages in thread
* Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx
2009-11-03 16:43 ` Tony Lindgren
2009-11-03 22:55 ` [PATCH] omap: mux: Replace omap_cfg_reg() with new style signal or gpio functions (Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx) Tony Lindgren
@ 2009-11-04 7:14 ` Mike Rapoport
2009-11-10 22:37 ` Tony Lindgren
1 sibling, 1 reply; 23+ messages in thread
From: Mike Rapoport @ 2009-11-04 7:14 UTC (permalink / raw)
To: Tony Lindgren; +Cc: Mike Rapoport, linux-omap
Tony Lindgren wrote:
> * Mike Rapoport <mike.rapoport@gmail.com> [091102 23:10]:
>> On Mon, Nov 2, 2009 at 9:10 PM, Tony Lindgren <tony@atomide.com> wrote:
>>> * Mike Rapoport <mike@compulab.co.il> [091101 02:30]:
>>>>
>>>> Tony Lindgren wrote:
>>>>> Add new style mux data for 34xx. This should also
>>>>> work with 3630 easily by adding the processor subset
>>>>> and ball data.
>>>>>
>>>>> Note that this data is __initdata, and gets optimized
>>>>> out if CONFIG_OMAP_MUX is not set. Also, the debug data
>>>>> gets optimized out if CONFIG_DEBUG_FS is not set.
>>>>>
>>>>> Signed-off-by: Tony Lindgren <tony@atomide.com>
>>>>> ---
>>>>> arch/arm/mach-omap2/Makefile | 4
>>>>> arch/arm/mach-omap2/mux.h | 2
>>>>> arch/arm/mach-omap2/mux34xx.c | 1552 +++++++++++++++++++++++++++++++++++++++++
>>>>> arch/arm/mach-omap2/mux34xx.h | 352 +++++++++
>>>>> 4 files changed, 1910 insertions(+), 0 deletions(-)
>>>>> create mode 100644 arch/arm/mach-omap2/mux34xx.c
>>>>> create mode 100644 arch/arm/mach-omap2/mux34xx.h
>>>>>
>> [ snip ]
>>
>>>>> +
>>>>> +#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
>>>>> + (OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
>>>> What about adding defines for each possible mode configuration, except, perhaps,
>>>> GPIO?
>>> Yeah it would be nice to make it easy. How about someting like:
>>>
>>> int __init omap_mux_init_by_name(char *name, int flags);
>>> ...
>>>
>>> omap_mux_init_by_name("i2c1_scl", OMAP_PIN_INPUT_PULLUP);
>>>
>>>> #define OMAP3_PIN_CAM_D0 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE0 | OMAP_PIN_INPUT, 0)
>>>> #define OMAP3_PIN_CAM_D0_CSI2_DX2 OMAP3_MUX(CAM_D0, OMAP_PIN_MODE2 | \
>>>> OMAP_PIN_INPUT, 0)
>>>>
>>>> And, I'm for adding OMAP_MUX_GPIO_{OUT,IN,IN_PU,IN_PD}(x) as well.
>>> And we could have also:
>>>
>>> int __init omap_mux_init_by_gpio(int gpio, int flags);
>>> ...
>>>
>>> omap_mux_init_by_gpio(99, OMAP_PIN_INPUT);
>>>
>>> As the only thing we currently have for flags is the OMAP_MUX_DYNAMIC,
>>> we could mask that too into flags and make it int instead of u16.
>> It seems we are thinking in really different directions :) You propose
>> imporved and easy to use replacements of omap_cfg_reg while I'm aming
>> nice tables descibing board pin configuration like, e.g,
>> cm_x300_mfp_cfg in arch/arm/mach-pxa/cm-x300.c. Probably it's just too
>> hard to me to break my PXA habbits, but I think such tables make the
>> board code easier to write/maintain/understand.
>> Besides, having both simple aliases for OMAP3_MUX(mode0, mux_value,
>> mux_flags) for dedicated pins does not contadict having
>> omap_mux_init_by_{name,gpio} helpers.
>
> Agreed, we should make the pin muxing as easy as possible as it's
> probably the biggest hurdle to anybody to start making changes to a
> development board. And we should have easy to to read board specific
> pin configuration tables like you're suggesting.
>
> In the long run, we should probably start using the real signal names
> as they seem to be more future proof across omaps than the register
> names.
>
> We can easily do something like this if we add char *muxname to
> struct omap_board_mux (untested):
>
> #define OMAP_MUX_SIGNAL(signal, mux_flags) \
> { \
> .muxname = #signal, \
> .flags = (mux_flags), \
> }
>
> #define OMAP_MUX_GPIO(gpio, mux_flags) \
> { \
> .muxname = gpio_##signal, \
> .flags = (mux_flags), \
> }
>
> #ifdef CONFIG_OMAP_MUX
> static struct omap_board_mux board_mux[] __initdata = {
> OMAP_MUX_SIGNAL(i2c1_scl, OMAP_PIN_INPUT),
> OMAP_MUX_GPIO(98, OMAP_PIN_INPUT_PULLUP),
> OMAP_MUX_GPIO(99, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_DYNAMIC),
> { .reg_offset = OMAP_MUX_TERMINATOR },
> };
> #endif
>
> Of course then we have to warn on potential duplicate signal names,
> but those can be specified using the register offset + mode as
> needed.
>
> Is the above close enough to what you have in mind regarding the
> board specific mux tables, or do you have still something else
> in mind?
It's closer :)
What I have in mind is a simple wrapper macro defining mux configuration for
straightforward cases, just like a bunch of defines in
arch/arm/mach-omap2/include/mach/mux34xx.h in my earlier patch [1].
And just use OMAP_MUX_SIGNAL, or OMAP3_MUX for more complicated cases where
flags and/or OFF mode settings are required.
For instance, for making i2c1_scl to be actually routed to its pin you would have
static struct omap_board_mux board_mux[] __initdata = {
OMAP_MUX_I2C1_SCL,
...
}
and for dss_pclk to became hw_dbg12 you have
static struct omap_board_mux board_mux[] __initdata = {
OMAP_MUX_PCLK_HW_DBG12,
...
}
Another my point was, that each board-* file will have all the mux settings in
one consolidated place. Indeed, currently there are no many uses of omap_cfg_reg
in the board files, but think of crappy bootloaders that fail to configure half
of the pins or cases when you delibarately want to setup mux configuration in
kernel.
I agree, that having the macros I'm talking about is more or less "syntactic
sugar" and I'm Ok to live without them :)
The most important that we don't need to add enumerated mux setting to
arch/arm/*omap*/mux.[ch] for each pin that was not there and mux setup can
completely defined by the board-* files.
[1] http://thread.gmane.org/gmane.linux.ports.arm.omap/25681
> Regards,
>
> Tony
>
>
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx
2009-11-04 7:14 ` [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx Mike Rapoport
@ 2009-11-10 22:37 ` Tony Lindgren
2009-11-11 8:23 ` Mike Rapoport
0 siblings, 1 reply; 23+ messages in thread
From: Tony Lindgren @ 2009-11-10 22:37 UTC (permalink / raw)
To: Mike Rapoport; +Cc: Mike Rapoport, linux-omap
Hi,
Sorry for the delay, have not had a chance to work on this for a few
days.
* Mike Rapoport <mike@compulab.co.il> [091103 23:14]:
>
>
> Tony Lindgren wrote:
> > * Mike Rapoport <mike.rapoport@gmail.com> [091102 23:10]:
> >> On Mon, Nov 2, 2009 at 9:10 PM, Tony Lindgren <tony@atomide.com> wrote:
> >>> * Mike Rapoport <mike@compulab.co.il> [091101 02:30]:
> >>>>
> >>>> Tony Lindgren wrote:
<snip snip>
> > We can easily do something like this if we add char *muxname to
> > struct omap_board_mux (untested):
> >
> > #define OMAP_MUX_SIGNAL(signal, mux_flags) \
> > { \
> > .muxname = #signal, \
> > .flags = (mux_flags), \
> > }
> >
> > #define OMAP_MUX_GPIO(gpio, mux_flags) \
> > { \
> > .muxname = gpio_##signal, \
> > .flags = (mux_flags), \
> > }
> >
> > #ifdef CONFIG_OMAP_MUX
> > static struct omap_board_mux board_mux[] __initdata = {
> > OMAP_MUX_SIGNAL(i2c1_scl, OMAP_PIN_INPUT),
> > OMAP_MUX_GPIO(98, OMAP_PIN_INPUT_PULLUP),
> > OMAP_MUX_GPIO(99, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_DYNAMIC),
> > { .reg_offset = OMAP_MUX_TERMINATOR },
> > };
> > #endif
> >
> > Of course then we have to warn on potential duplicate signal names,
> > but those can be specified using the register offset + mode as
> > needed.
Or use mode0_name.modeX_name for the full naming.
> > Is the above close enough to what you have in mind regarding the
> > board specific mux tables, or do you have still something else
> > in mind?
>
> It's closer :)
OK, hopefully that means close to usable then :)
> What I have in mind is a simple wrapper macro defining mux configuration for
> straightforward cases, just like a bunch of defines in
> arch/arm/mach-omap2/include/mach/mux34xx.h in my earlier patch [1].
> And just use OMAP_MUX_SIGNAL, or OMAP3_MUX for more complicated cases where
> flags and/or OFF mode settings are required.
> For instance, for making i2c1_scl to be actually routed to its pin you would have
>
> static struct omap_board_mux board_mux[] __initdata = {
> OMAP_MUX_I2C1_SCL,
> ...
> }
>
> and for dss_pclk to became hw_dbg12 you have
>
> static struct omap_board_mux board_mux[] __initdata = {
> OMAP_MUX_PCLK_HW_DBG12,
> ...
> }
The more I've been thinking about it, I think we should move away from using
the register offsets if we can use the signal names instead. A lot of the board
init code can be done in a generic way then, and should work across various
omaps better.
For example, see what setup_ehci_io_mux() becomes then:
switch (port_mode[0]) {
case EHCI_HCD_OMAP_MODE_PHY:
omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT);
omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT);
omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN);
omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN);
break;
...
Of course, that does not mean that we should not allow muxing by using the
register offsets especially for board specific custom devices. But it helps
with the common platform init code for the integrated devices.
> Another my point was, that each board-* file will have all the mux settings in
> one consolidated place. Indeed, currently there are no many uses of omap_cfg_reg
> in the board files, but think of crappy bootloaders that fail to configure half
> of the pins or cases when you delibarately want to setup mux configuration in
> kernel.
Agreed. We should do it in the board-*.c files because bootloaders do what they
do. And for common integrated devices we can do it in the common platform init
code based on the nr_lines like we do for MMC and USB already.
> I agree, that having the macros I'm talking about is more or less "syntactic
> sugar" and I'm Ok to live without them :)
OK, let's see how it works once I get back to working on it..
> The most important that we don't need to add enumerated mux setting to
> arch/arm/*omap*/mux.[ch] for each pin that was not there and mux setup can
> completely defined by the board-* files.
:)
Except we still have it for mach-omap1. The mux registers are scattered in
multiple registers, so let's not mess with that right now.
Regards,
Tony
>
>
> [1] http://thread.gmane.org/gmane.linux.ports.arm.omap/25681
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx
2009-11-10 22:37 ` Tony Lindgren
@ 2009-11-11 8:23 ` Mike Rapoport
0 siblings, 0 replies; 23+ messages in thread
From: Mike Rapoport @ 2009-11-11 8:23 UTC (permalink / raw)
To: Tony Lindgren; +Cc: Mike Rapoport, linux-omap, Mike Rapoport
Tony Lindgren wrote:
> Hi,
>
> Sorry for the delay, have not had a chance to work on this for a few
> days.
>
> * Mike Rapoport <mike@compulab.co.il> [091103 23:14]:
>>
>> Tony Lindgren wrote:
>>> * Mike Rapoport <mike.rapoport@gmail.com> [091102 23:10]:
>>>> On Mon, Nov 2, 2009 at 9:10 PM, Tony Lindgren <tony@atomide.com> wrote:
>>>>> * Mike Rapoport <mike@compulab.co.il> [091101 02:30]:
>>>>>> Tony Lindgren wrote:
>
> <snip snip>
>
>>> We can easily do something like this if we add char *muxname to
>>> struct omap_board_mux (untested):
>>>
>>> #define OMAP_MUX_SIGNAL(signal, mux_flags) \
>>> { \
>>> .muxname = #signal, \
>>> .flags = (mux_flags), \
>>> }
>>>
>>> #define OMAP_MUX_GPIO(gpio, mux_flags) \
>>> { \
>>> .muxname = gpio_##signal, \
>>> .flags = (mux_flags), \
>>> }
>>>
>>> #ifdef CONFIG_OMAP_MUX
>>> static struct omap_board_mux board_mux[] __initdata = {
>>> OMAP_MUX_SIGNAL(i2c1_scl, OMAP_PIN_INPUT),
>>> OMAP_MUX_GPIO(98, OMAP_PIN_INPUT_PULLUP),
>>> OMAP_MUX_GPIO(99, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_DYNAMIC),
>>> { .reg_offset = OMAP_MUX_TERMINATOR },
>>> };
>>> #endif
>>>
>>> Of course then we have to warn on potential duplicate signal names,
>>> but those can be specified using the register offset + mode as
>>> needed.
>
> Or use mode0_name.modeX_name for the full naming.
Agreed.
>>> Is the above close enough to what you have in mind regarding the
>>> board specific mux tables, or do you have still something else
>>> in mind?
>> It's closer :)
>
> OK, hopefully that means close to usable then :)
It became usable as soon as you don't have to patch common mux enumerations to
add board specific mux settings :)
With mode0_name.modeX_name the mux setup code is slightly more complicated but
once it's working adding new data both to SoC files and to the board files will
be easy.
>> What I have in mind is a simple wrapper macro defining mux configuration for
>> straightforward cases, just like a bunch of defines in
>> arch/arm/mach-omap2/include/mach/mux34xx.h in my earlier patch [1].
>> And just use OMAP_MUX_SIGNAL, or OMAP3_MUX for more complicated cases where
>> flags and/or OFF mode settings are required.
>> For instance, for making i2c1_scl to be actually routed to its pin you would have
>>
>> static struct omap_board_mux board_mux[] __initdata = {
>> OMAP_MUX_I2C1_SCL,
>> ...
>> }
>>
>> and for dss_pclk to became hw_dbg12 you have
>>
>> static struct omap_board_mux board_mux[] __initdata = {
>> OMAP_MUX_PCLK_HW_DBG12,
>> ...
>> }
>
> The more I've been thinking about it, I think we should move away from using
> the register offsets if we can use the signal names instead. A lot of the board
> init code can be done in a generic way then, and should work across various
> omaps better.
>
> For example, see what setup_ehci_io_mux() becomes then:
>
> switch (port_mode[0]) {
> case EHCI_HCD_OMAP_MODE_PHY:
> omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT);
> omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT);
> omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN);
> omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN);
> break;
> ...
>
> Of course, that does not mean that we should not allow muxing by using the
> register offsets especially for board specific custom devices. But it helps
> with the common platform init code for the integrated devices.
>
>> Another my point was, that each board-* file will have all the mux settings in
>> one consolidated place. Indeed, currently there are no many uses of omap_cfg_reg
>> in the board files, but think of crappy bootloaders that fail to configure half
>> of the pins or cases when you delibarately want to setup mux configuration in
>> kernel.
>
> Agreed. We should do it in the board-*.c files because bootloaders do what they
> do. And for common integrated devices we can do it in the common platform init
> code based on the nr_lines like we do for MMC and USB already.
>
>> I agree, that having the macros I'm talking about is more or less "syntactic
>> sugar" and I'm Ok to live without them :)
>
> OK, let's see how it works once I get back to working on it..
>
>> The most important that we don't need to add enumerated mux setting to
>> arch/arm/*omap*/mux.[ch] for each pin that was not there and mux setup can
>> completely defined by the board-* files.
>
> :)
>
> Except we still have it for mach-omap1. The mux registers are scattered in
> multiple registers, so let's not mess with that right now.
I have nether HW nor docs for omap1 so I afraid I won't be much help here...
> Regards,
>
> Tony
>
>>
>> [1] http://thread.gmane.org/gmane.linux.ports.arm.omap/25681
>
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2009-11-11 8:23 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-10-29 20:35 [PATCH 0/5] New mux code for 34xx Tony Lindgren
2009-10-29 20:36 ` [PATCH 1/5] omap2: mux: intoduce omap_mux_{read,write} Tony Lindgren
2009-10-29 20:36 ` [PATCH 2/5] omap: mux: Add new style pin multiplexing code for omap3 Tony Lindgren
2009-11-01 10:30 ` Mike Rapoport
2009-11-02 18:54 ` Tony Lindgren
2009-11-03 6:56 ` Mike Rapoport
2009-10-29 20:36 ` [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx Tony Lindgren
2009-11-01 10:30 ` Mike Rapoport
2009-11-02 19:10 ` Tony Lindgren
2009-11-03 7:10 ` Mike Rapoport
2009-11-03 16:43 ` Tony Lindgren
2009-11-03 22:55 ` [PATCH] omap: mux: Replace omap_cfg_reg() with new style signal or gpio functions (Re: [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx) Tony Lindgren
2009-11-04 7:14 ` [PATCH 3/5] omap: mux: Add new style pin multiplexing data for 34xx Mike Rapoport
2009-11-10 22:37 ` Tony Lindgren
2009-11-11 8:23 ` Mike Rapoport
2009-10-29 20:36 ` [PATCH 4/5] omap: mux: Add new style init functions to omap3 board-*.c files Tony Lindgren
2009-10-29 20:36 ` [PATCH 5/5] omap: mux: Add debugfs support for new mux code Tony Lindgren
2009-10-29 21:19 ` [PATCH 0/5] New mux code for 34xx Mike Rapoport
2009-10-29 21:59 ` Tony Lindgren
2009-11-01 10:29 ` Mike Rapoport
2009-11-02 18:56 ` Tony Lindgren
2009-11-03 6:42 ` Mike Rapoport
2009-11-03 16:46 ` Tony Lindgren
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