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From: Pu Wen <puwen@hygon.cn>
To: Jan Beulich <JBeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Wei Liu <wei.liu2@citrix.com>,
	xen-devel <xen-devel@lists.xenproject.org>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: Re: [PATCH v3 01/14] x86/cpu: Create Hygon Dhyana architecture support file
Date: Wed, 27 Mar 2019 16:14:53 +0800	[thread overview]
Message-ID: <f8aa80d5-5a5e-b8b9-932b-bc9310f75a59@hygon.cn> (raw)
In-Reply-To: <5C9A49DA0200007800221F7F@prv1-mh.provo.novell.com>

On 2019/3/26 23:49, Jan Beulich wrote:
> On 25.03.19 at 14:29, <puwen@hygon.cn> wrote:
>> -static unsigned int __initdata opt_cpuid_mask_l7s0_eax = ~0u;
>> -integer_param("cpuid_mask_l7s0_eax", opt_cpuid_mask_l7s0_eax);
>> -static unsigned int __initdata opt_cpuid_mask_l7s0_ebx = ~0u;
>> -integer_param("cpuid_mask_l7s0_ebx", opt_cpuid_mask_l7s0_ebx);
> 
> This is no longer needed - all references are now local to amd.c.

Okay, will put them back to amd.c.

>> @@ -116,6 +121,9 @@ bool __init probe_cpuid_faulting(void)
>>   	uint64_t val;
>>   	int rc;
>>   
>> +	if(boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
>> +		return false;
>> +
>>   	if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0)
> 
> Isn't this similarly true for AMD, in which case adding both at the

There is no MSR_INTEL_PLATFORM_INFO for AMD family 17h and Hygon family
18h. Reading this MSR will stall on Hygon system. I don't know if it
would successfully returned when reading it on AMD system.

> same time in a separate patch would seem better? Yet then again -

In a separate patch is fine.

> did you look at the description of the commit moving the function
> here (6e2fdc0f89 ["x86: Common cpuid faulting support"])? Hence
> if anything this would need qualifying by !cpu_has_hypervisor.

Then it would be like this:
	if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON &&
	    !cpu_has_hypervisor)
		return false;

> Also the contextual if() tells you that there's a blank missing in the
> one you add. However, there's a wider style question to raise:
> This file is not a Linux clone, so generally I'd expect it to be
> written in plain Xen style.

I'm sorry for the missing blank. Okay, will use the right style.

>> +static void early_init_hygon(struct cpuinfo_x86 *c)
>> +{
>> +	early_init_amd(c);
>> +}
> 
> Why the wrapper function? It can be introduced once you actually

To keep the functions uniform Hygon ones in hygon_cpu_dev.

> need to do more than just the call.

Okay, will remove the wrapper and directly call early_init_amd().

>> +static void init_hygon(struct cpuinfo_x86 *c)
>> +{
>> +	u32 l, h;
> 
> As mentioned before, please prefer uint32_t et al over u32 and
> friends. While that's applicable to the entire series (and then
> also to use basic types in preference to the fixed width ones,

Okay.

> where possible), in this particular case it would be even better if
> you dropped the variables altogether, using ...
>> +	unsigned long long value;
...
>> +	if (cpu_has(c, X86_FEATURE_EFRO)) {
>> +		rdmsr(MSR_K7_HWCR, l, h);
>> +		l |= (1 << 27); /* Enable read-only APERF/MPERF bit */
>> +		wrmsr(MSR_K7_HWCR, l, h);
>> +	}
> 
> ... "value" and rdmsrl() / wrmsrl() here instead.

Will use rdmsrl()/wrmsrl() instead.

-- 
Regards,
Pu Wen

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  reply	other threads:[~2019-03-27  8:20 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-25 13:29 [PATCH v3 00/14] Add support for Hygon Dhyana Family 18h processor Pu Wen
2019-03-25 13:29 ` [PATCH v3 01/14] x86/cpu: Create Hygon Dhyana architecture support file Pu Wen
2019-03-26 15:48   ` Jan Beulich
2019-03-27  8:14     ` Pu Wen [this message]
2019-03-27  8:30       ` Jan Beulich
2019-03-27 10:08         ` Pu Wen
2019-03-25 13:30 ` [PATCH v3 02/14] x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 Pu Wen
2019-03-25 13:30 ` [PATCH v3 03/14] x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU Pu Wen
2019-03-26 16:10   ` Jan Beulich
2019-03-27  8:16     ` Pu Wen
2019-03-27  8:37       ` Jan Beulich
2019-03-27 10:08         ` Pu Wen
2019-03-25 13:30 ` [PATCH v3 04/14] x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure Pu Wen
2019-03-25 13:30 ` [PATCH v3 05/14] x86/spec_ctrl: Add Hygon Dhyana to the respective mitigation machinery Pu Wen
2019-03-25 13:30 ` [PATCH v3 06/14] x86/apic: Add Hygon Dhyana support Pu Wen
2019-03-25 13:30 ` [PATCH v3 07/14] x86/acpi: " Pu Wen
2019-03-25 13:31 ` [PATCH v3 08/14] x86/iommu: " Pu Wen
2019-03-25 13:31 ` [PATCH v3 09/14] x86/pv: Add Hygon Dhyana support to emulate MSRs access Pu Wen
2019-03-25 13:31 ` [PATCH v3 10/14] x86/domain: Add Hygon Dhyana support Pu Wen
2019-03-25 13:31 ` [PATCH v3 11/14] x86/domctl: " Pu Wen
2019-03-25 13:31 ` [PATCH v3 12/14] x86/traps: " Pu Wen
2019-03-25 13:32 ` [PATCH v3 13/14] x86/cpuid: " Pu Wen
2019-03-25 13:32 ` [PATCH v3 14/14] tools/libxc: " Pu Wen

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